Entry Kitahara:1990:GBM from ieeemicro.bib
Last update: Fri Jul 3 02:09:12 MDT 2009
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BibTeX entry
@Article{Kitahara:1990:GBM,
author = "Takeshi Kitahara and Taizo Satoh",
title = "The {Gmicro\slash 300 32-Bit} Microprocessor",
journal = j-IEEE-MICRO,
volume = "10",
number = "3",
pages = "68--75",
month = jun,
year = "1990",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000)",
abstract = "Executing an instruction with a memory operand and a
register operand in one clock cycle presents no problem
for this TRON-architecture chip.",
acknowledgement = ack-nhfb,
affiliation = "Fujitsu Ltd, Kawasaki, Jpn",
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips)",
classification = "722; 723",
conference = "First Annual Hot Chips Symposium",
corpsource = "Fujitsu Ltd., Kawasaki, Japan",
keywords = "32 bit; cache; Computer Architecture; Computer
Systems, Digital--Pipeline Processing; Computers,
Microcomputer; Gmicro/300 32-Bit Microprocessor;
Gmicro/300 32-bit microprocessor; Internal Caches;
internal caches; memories; memory operand;
Microcomputer Instructions; microprocessor chips;
one-cycle structures; register operand; specification;
TRON Architecture",
meetingabr = "First Annu Hot Chips Symp",
meetingaddress = "Palo Alto, CA, USA",
meetingdate = "Jun 26--27 1989",
meetingdate2 = "06/26--27/89",
sponsor = "IEEE Computer Soc, Palo Alto, CA, USA",
treatment = "P Practical",
}
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