Entry Yoshida:1991:GBM from ieeemicro.bib

Last update: Fri Jul 3 02:09:12 MDT 2009                Valid HTML 3.2!

Index sections

Top | Symbols | Math | A | B | C | D | E | F | G | H | I | J | K | L | M | N | O | P | Q | R | S | T | U | V | W | X | Y | Z

BibTeX entry

@Article{Yoshida:1991:GBM,
  author =       "Toyohiko Yoshida and Toru Shimizu and Shigeo Mizugaki
                 and Junichi Hinata",
  title =        "The {Gmicro\slash 100} 32-Bit Microprocessor",
  journal =      j-IEEE-MICRO,
  volume =       "11",
  number =       "4",
  pages =        "20--23, 62--72",
  month =        aug,
  year =         "1991",
  CODEN =        "IEMIDZ",
  ISSN =         "0272-1732",
  bibdate =      "Thu Dec 14 06:08:58 MST 2000",
  bibsource =    "Science Citation Index database (1980--2000);
                 Compendex database",
  abstract =     "Elevating performance of a core VSLI system by using a
                 prejump mechanism and optimized microinstructions",
  acknowledgement = ack-nhfb,
  affiliation =  "Mitsubishi Electric Corp, Itami, Hyogo, Japan",
  classcodes =   "B1265F (Microprocessors and microcomputers); B2570
                 (Semiconductor integrated circuits); C5130
                 (Microprocessor chips)",
  classification = "722; 723",
  corpsource =   "Mitsubishi Electr. Corp., Hyogo, Japan",
  keywords =     "32 bit; 32-b VLSI; application specific integrated
                 circuits; application-specific standard; benchmark
                 programs; Bitmap Manipulation; bitmap-manipulation;
                 chips; Computer Architecture --- Microprogramming;
                 Computer Systems, Digital --- Pipeline Processing;
                 Five-Stage Pipeline; five-stage pipeline; Gmicro/100;
                 instructions; microprocessor; Microprocessor Chips;
                 optimised microinstructions; Prejump Mechanism; prejump
                 mechanism; product; software loops; TRON specification;
                 VLSI",
  treatment =    "P Practical",
}

Related entries