Entry Mirapuri:1992:MRP from ieeemicro.bib

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BibTeX entry

@Article{Mirapuri:1992:MRP,
  author =       "Sunil Mirapuri and Michael Woodacre and Nader
                 Vasseghi",
  title =        "The {MIPS R4000} Processor",
  journal =      j-IEEE-MICRO,
  volume =       "12",
  number =       "2",
  pages =        "10--22",
  month =        apr,
  year =         "1992",
  CODEN =        "IEMIDZ",
  ISSN =         "0272-1732",
  bibdate =      "Thu Dec 14 06:08:58 MST 2000",
  bibsource =    "Compiler/Compiler.Lins.bib; Compendex database;
                 Science Citation Index database (1980--2000)",
  note =         "Presented at Hot Chips III, Stanford University,
                 1992.",
  abstract =     "Offering solutions for the increasing demands on
                 address space",
  acknowledgement = ack-nhfb,
  classcodes =   "C5130 (Microprocessor chips); C5220P (Parallel
                 architecture)",
  classification = "714; 722; 723",
  corpsource =   "MIPS Comput. Syst., Sunnyvale, CA, USA",
  keywords =     "64 bits; benchmark tests; Computer Architecture;
                 Computer Systems, Digital --- Pipeline Processing;
                 Computers, Microcomputer; Electronics Packaging;
                 Floating-Point Unit; Integer Data Path; Integrated
                 Circuits, cmos; Memory Management Unit; microprocessor
                 chips; MIPS processors; Primary Cache; R4000; Reduced
                 Instruction Set Computing; reduced instruction set
                 computing; RISC microprocessor; RISC Processor;
                 Secondary Cache; superpipelining",
  treatment =    "P Practical; R Product Review",
}

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