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BibTeX entry
@Article{Hsu:1994:DTM,
author = "Peter Yan-Tek Hsu",
title = "Designing the {TFP} Microprocessor",
journal = j-IEEE-MICRO,
volume = "14",
number = "2",
pages = "23--33",
month = apr,
year = "1994",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Tue Jan 09 19:16:08 2001",
bibsource = "Science Citation Index database (1980--2000)",
abstract = "Efficiently supporting large, real-world,
floating-point-intensive applications with
microprocessor technology",
acknowledgement = ack-nhfb,
classcodes = "B1265F (Microprocessors and microcomputers); C5130
(Microprocessor chips); C5230 (Digital arithmetic
methods)",
corpsource = "Silicon Graphics Comput. Syst., Mountain View, CA,
USA",
keywords = "16 kByte; 16-Kbyte on-chip cache; 4 MByte;
computation-; digital arithmetic; execution units;
floating-point data; floating-point-intensive
applications; implementation; integer; integer data;
memory load/store units; microprocessor chips; MIPS
R8000; MIPS Technologies architecture; oriented
processor; references; split-level cache structure;
superscalar; TFP microprocessor; Tremendous
Floating-Point microprocessor",
treatment = "P Practical",
URL = "ftp://ftp.sgi.com/sgi/doc/TFP/R8000_Micro_Paper.ps.Z",
}
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