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BibTeX entry
@Article{Cates:1988:PAC,
author = "Ron Cates",
title = "Processor architecture considerations for embedded
controller applications",
journal = j-IEEE-MICRO,
volume = "8",
number = "3",
pages = "28--38",
month = jun,
year = "1988",
CODEN = "IEMIDZ",
ISSN = "0272-1732",
bibdate = "Thu Dec 14 06:08:58 MST 2000",
bibsource = "Compendex database; Science Citation Index database
(1980--2000)",
acknowledgement = ack-nhfb,
affiliationaddress = "VLSI Technology Inc, Tempe, AZ, USA",
classcodes = "C5130 (Microprocessor chips); C5220 (Computer
architecture)",
classification = "722; 723; 731",
corpsource = "VLSI Technol. Inc., Tempe, AZ, USA",
keywords = "32 bit; 32-bit VL86C010; Acorn RISC; Applications;
computer architecture; computer networks --- Control;
computers, microcomputer; control systems, digital ---
Computer Interfaces; direct memory access controller
(DMAC); embedded controller; embedded controller
applications; general-purpose cpu; general-purpose CPU;
latency; microprocessor chips; network interface;
processor architecture; reduced instruction set
computing; reduced-instruction-set computer;
reduced-instruction-set computer (RISC); system; system
latency impact",
treatment = "P Practical",
}
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