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BibTeX entry
@Article{De:1997:FPM,
author = "Mallika De and Bhabani P. Sinha",
title = "Fast parallel multiplication using redundant
quarternary number system",
journal = j-PARALLEL-PROCESS-LETT,
volume = "7",
number = "1",
pages = "13--23",
month = mar,
year = "1997",
CODEN = "PPLTEE",
ISSN = "0129-6264",
bibdate = "Tue Oct 21 18:27:39 MDT 1997",
acknowledgement = ack-nhfb,
classification = "C4240P (Parallel programming and algorithm theory);
C5230 (Digital arithmetic methods)",
corpsource = "Univ. Sci. Instrum. Centre, Kalyani Univ., West
Bengal, India",
keywords = "adders; AT-value; high-speed VLSI multiplication
scheme; integer multiplication; m-digit multiplier;
multiplying circuits; parallel algorithms; parallel
multiplication; redundant number systems; redundant
quarternary adders; redundant quarternary number
system; redundant radix-4 representation; regular
cellular array structure",
pubcountry = "Singapore",
treatment = "A Application; P Practical",
}
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