Entry Uhlig:1994:TST from sigplan1990.bib

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BibTeX entry

@Article{Uhlig:1994:TST,
  author =       "Richard Uhlig and David Nagle and Trevor Mudge and
                 Stuart Sechrest",
  title =        "Trap-driven simulation with {Tapeworm II}",
  journal =      j-SIGPLAN,
  volume =       "29",
  number =       "11",
  pages =        "132--144",
  month =        nov,
  year =         "1994",
  CODEN =        "SINODQ",
  ISSN =         "0362-1340 (print), 1523-2867 (print), 1558-1160 (electronic)",
  ISSN-L =       "0362-1340",
  bibdate =      "Sat May 1 15:50:17 MDT 1999",
  bibsource =    "http://www.acm.org/pubs/toc/",
  URL =          "http://www.acm.org:80/pubs/citations/proceedings/asplos/195473/p132-uhlig/",
  abstract =     "Tapeworm II is a software-based simulation tool that
                 evaluates the cache and TLB performance of
                 multiple-task and operating system intensive workloads.
                 Tapeworm resides in an OS kernel and causes a host
                 machine's hardware to drive simulations with kernel
                 traps instead of with address traces, as is
                 conventionally done. This allows Tapeworm to quickly
                 and accurately capture complete memory referencing
                 behavior with a limited degradation in overall system
                 performance. This paper compares trap-driven
                 simulation, as implemented in Tapeworm, with the more
                 common technique of trace-driven memory simulation with
                 respect to speed, accuracy, portability and
                 flexibility.",
  acknowledgement = ack-nhfb,
  classification = "C5470 (Performance evaluation and testing); C6150J
                 (Operating systems); C6185 (Simulation techniques);
                 C7430 (Computer engineering)",
  conflocation = "San Jose, CA, USA; 4-7 Oct. 1994",
  conftitle =    "Sixth International Conference on Architectural
                 Support for Programming Languages and Operating Systems
                 (ASPLOS-VI)",
  corpsource =   "Dept. of Electr. Eng. and Comput. Sci., Michigan
                 Univ., Ann Arbor, MI, USA",
  keywords =     "accuracy; address traces; algorithms; cache; cache
                 storage; design; flexibility; host machine; kernel
                 traps; measurement; memory referencing behavior;
                 multiple-task; operating system intensive workloads;
                 operating system kernel; operating system kernels;
                 performance; performance evaluation; portability;
                 reliability; software portability; software-based
                 simulation tool; speed; system performance; Tapeworm
                 II; theory; trace-driven memory simulation; trap-driven
                 simulation; virtual machines",
  sponsororg =   "ACM; IEEE Comput. Soc",
  subject =      "{\bf D.4.8} Software, OPERATING SYSTEMS, Performance,
                 Modeling and prediction. {\bf D.4.2} Software,
                 OPERATING SYSTEMS, Storage Management.",
  treatment =    "P Practical",
}

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