# bibtab

bibtype: misc
filename: fparith.bib
label: Goldberg:2003:WEC
author: David Goldberg
title: What Every Computer Scientist Should Know About Floating-Point Arithmetic
pages: 87--94
year: 2003
bibdate: Wed Jun 19 07:57:39 2019
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2019.06.19 07:57:39 ???
URL: https://docs.oracle.com/cd/E19060-01/stud8.compiler/817-0932/ncg_goldberg.html
acknowledgement: ack-nhfb
howpublished: Oracle Web site.
rawauthor: David Goldberg
rawtitle: What Every Computer Scientist Should Know About Floating-Point Arithmetic
note:
This is a reprint of cite Goldberg:1991:WEC with a new section, booktitle Differences Among IEEE 754 Implementations, by Doug Priest.

rawnote:
This is a reprint of \cite{Goldberg:1991:WEC} with a new section, \booktitle{Differences Among IEEE 754 Implementations}, by Doug Priest.

entry:
@Misc{Goldberg:2003:WEC,
  author =       "David Goldberg",
  title =        "What Every Computer Scientist Should Know About
                 Floating-Point Arithmetic",
  howpublished = "Oracle Web site.",
  year =         "2003",
  bibdate =      "Wed Jun 19 07:57:39 2019",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "This is a reprint of \cite{Goldberg:1991:WEC} with a
                 new section, \booktitle{Differences Among IEEE 754
                 Implementations}, by Doug Priest.",
  URL =          "https://docs.oracle.com/cd/E19060-01/stud8.compiler/817-0932/ncg_goldberg.html",
  acknowledgement = ack-nhfb,
}


bibtype: book
filename: fparith.bib
label: Grabmeier:2003:CAH
editor: Johannes Grabmeier and Erich Kaltofen and Volker Weispfenning
title: Computer algebra handbook: foundations, applications, systems
publisher: pub-SV
address: pub-SV:adr
pages: xx + 637
year: 2003
ISBN: 3-540-65466-6 OR 3540654666
ISBN13: 978-3-540-65466-7 OR 9783540654667
LCCN: QA155.7.E4 C64954 2003
MRclass: 68W30, 00B15, 68-06
bibdate: Tue Nov 22 06:00:25 MST 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; z3950.loc.gov:7090/Voyager
bibtimestamp: 2005.11.22 06:00:25 MST
note: Includes CD-ROM.
URL: http://www.springer.com/sgw/cda/frontpage/0,11855,1-102-22-1477871-0,00.html
subject: Algebra; Data processing
acknowledgement: ack-nhfb
raweditor: Johannes Grabmeier and Erich Kaltofen and Volker Weispfenning
rawnote: Includes CD-ROM.
rawtitle: Computer algebra handbook: foundations, applications, systems
keywords:
accurate floating-point summation; Aldor; AXIOM; Derive; exact arithmetic; Macsyma; Magma; Maple Mathematica; MuPAD; REDUCE; TI-92

entry:
@Book{Grabmeier:2003:CAH,
  editor =       "Johannes Grabmeier and Erich Kaltofen and Volker
                 Weispfenning",
  title =        "Computer algebra handbook: foundations, applications,
                 systems",
  publisher =    pub-SV,
  address =      pub-SV:adr,
  pages =        "xx + 637",
  year =         "2003",
  ISBN =         "3-540-65466-6",
  ISBN-13 =      "978-3-540-65466-7",
  LCCN =         "QA155.7.E4 C64954 2003",
  MRclass =      "68W30, 00B15, 68-06",
  bibdate =      "Tue Nov 22 06:00:25 MST 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 z3950.loc.gov:7090/Voyager",
  note =         "Includes CD-ROM.",
  URL =          "http://www.springer.com/sgw/cda/frontpage/0,11855,1-102-22-1477871-0,00.html",
  acknowledgement = ack-nhfb,
  keywords =     "accurate floating-point summation; Aldor; AXIOM;
                 Derive; exact arithmetic; Macsyma; Magma; Maple
                 Mathematica; MuPAD; REDUCE; TI-92",
  subject =      "Algebra; Data processing",
}


bibtype: article
filename: fparith.bib
label: Grossschadl:2003:ASL
author: Johann Gross schadl
title: Architectural Support for Long Integer Modulo Arithmetic on RISC-Based Smart Cards
journal: j-IJHPCA
volume: 17
number: 2
pages: 135--146
month: Summer
year: 2003
CODEN: IHPCFL
ISSN: 1094-3420 (print), 1741-2846 (electronic) OR 10943420 (print), 17412846 (electronic)
ISSNL: 1094-3420 OR 10943420
bibdate: Fri Nov 28 06:52:13 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.28 06:52:13 ???
acknowledgement: ack-nhfb
journalURL: http://hpc.sagepub.com/content/by/year
rawauthor: Johann Gro{\ss}sch{\"a}dl
rawtitle: Architectural Support for Long Integer Modulo Arithmetic on {RISC}-Based {Smart Cards}
keywords:
application-specific instruct set processor (ASIP); coarsely-integrated operand scanning (CIOS); Diffie--Hellman; inner-loop operation; Montgomery multiplication; processor specialization; public-key cryptography; Rivest-Shamir-Adelman

entry:
@Article{Grossschadl:2003:ASL,
  author =       "Johann Gro{\ss}sch{\"a}dl",
  title =        "Architectural Support for Long Integer Modulo
                 Arithmetic on {RISC}-Based {Smart Cards}",
  journal =      j-IJHPCA,
  volume =       "17",
  number =       "2",
  pages =        "135--146",
  month =        "Summer",
  year =         "2003",
  CODEN =        "IHPCFL",
  ISSN =         "1094-3420 (print), 1741-2846 (electronic)",
  ISSN-L =       "1094-3420",
  bibdate =      "Fri Nov 28 06:52:13 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  journal-URL =  "http://hpc.sagepub.com/content/by/year",
  keywords =     "application-specific instruct set processor (ASIP);
                 coarsely-integrated operand scanning (CIOS);
                 Diffie--Hellman; inner-loop operation; Montgomery
                 multiplication; processor specialization; public-key
                 cryptography; Rivest-Shamir-Adelman",
}


bibtype: article
filename: fparith.bib
label: Hanrot:2003:DRF
author: G. Hanrot and J. Rivat and G. Tenenbaum and P. Zimmermann
title: Density results on floating-point invertible numbers
journal: j-THEOR-COMP-SCI
volume: 291
number: 2
pages: 135--141
year: 2003
CODEN: TCSDIQ
ISSN: 0304-3975 (print), 1879-2294 (electronic) OR 03043975 (print), 18792294 (electronic)
ISSNL: 0304-3975 OR 03043975
MRclass: 68M07 (65G30)
MRnumber: MR1957436 (2005b:68028)
bibdate: Thu Nov 8 19:16:14 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.08 19:16:14 ???
note: Real numbers and computers (Schloss Dagstuhl, 2000)
fjournal: Theoretical Computer Science
acknowledgement: ack-nhfb
journalURL: http://www.sciencedirect.com/science/journal/03043975
rawauthor: G. Hanrot and J. Rivat and G. Tenenbaum and P. Zimmermann
rawnote: Real numbers and computers (Schloss Dagstuhl, 2000)
rawtitle: Density results on floating-point invertible numbers
entry:
@Article{Hanrot:2003:DRF,
  author =       "G. Hanrot and J. Rivat and G. Tenenbaum and P.
                 Zimmermann",
  title =        "Density results on floating-point invertible numbers",
  journal =      j-THEOR-COMP-SCI,
  volume =       "291",
  number =       "2",
  pages =        "135--141",
  year =         "2003",
  CODEN =        "TCSDIQ",
  ISSN =         "0304-3975 (print), 1879-2294 (electronic)",
  ISSN-L =       "0304-3975",
  MRclass =      "68M07 (65G30)",
  MRnumber =     "MR1957436 (2005b:68028)",
  bibdate =      "Thu Nov 8 19:16:14 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "Real numbers and computers (Schloss Dagstuhl, 2000)",
  acknowledgement = ack-nhfb,
  fjournal =     "Theoretical Computer Science",
  journal-URL =  "http://www.sciencedirect.com/science/journal/03043975",
}


bibtype: article
filename: fparith.bib
label: Harrison:2003:FVS
author: John Harrison
title: Formal verification of square root algorithms
journal: j-FORM-METHODS-SYST-DES
volume: 22
number: 2
pages: 143--153
month: mar
monthnumber: 3
year: 2003
CODEN: FMSDE6
DOI: https://doi.org/10.1023/A:1022973506233
ISSN: 0925-9856 (print), 1572-8102 (electronic) OR 09259856 (print), 15728102 (electronic)
ISSNL: 0925-9856 OR 09259856
bibdate: Sat Feb 08 08:47:21 2020
bibtimestamp: 2020.02.08 08:47:21 ???
URL: https://dl.acm.org/doi/abs/10.1023/A:1022973506233
fjournal: Formal Methods in System Design
acknowledgement: ack-nhfb
journalURL: https://dl.acm.org/loi/fmsd
rawauthor: John Harrison
rawtitle: Formal verification of square root algorithms
bibsource:
https://www.math.utah.edu/pub/tex/bib/elefunt.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/intel-ia-64.bib

abstract:
We discuss the formal verification of some low-level mathematical software for the Intel Itanium architecture. A number of important algorithms have been proven correct using the HOL Light theorem prover. After briefly surveying some of our formal verification work, we discuss in more detail the verification of a square root algorithm, which helps to illustrate why some features of HOL Light, in particular programmability, make it especially suitable for these applications.

rawabstract:
We discuss the formal verification of some low-level mathematical software for the Intel Itanium architecture. A number of important algorithms have been proven correct using the HOL Light theorem prover. After briefly surveying some of our formal verification work, we discuss in more detail the verification of a square root algorithm, which helps to illustrate why some features of HOL Light, in particular programmability, make it especially suitable for these applications.

entry:
@Article{Harrison:2003:FVS,
  author =       "John Harrison",
  title =        "Formal verification of square root algorithms",
  journal =      j-FORM-METHODS-SYST-DES,
  volume =       "22",
  number =       "2",
  pages =        "143--153",
  month =        mar,
  year =         "2003",
  CODEN =        "FMSDE6",
  DOI =          "https://doi.org/10.1023/A:1022973506233",
  ISSN =         "0925-9856 (print), 1572-8102 (electronic)",
  ISSN-L =       "0925-9856",
  bibdate =      "Sat Feb 08 08:47:21 2020",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/elefunt.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/intel-ia-64.bib",
  URL =          "https://dl.acm.org/doi/abs/10.1023/A:1022973506233",
  abstract =     "We discuss the formal verification of some low-level
                 mathematical software for the Intel Itanium
                 architecture. A number of important algorithms have
                 been proven correct using the HOL Light theorem prover.
                 After briefly surveying some of our formal verification
                 work, we discuss in more detail the verification of a
                 square root algorithm, which helps to illustrate why
                 some features of HOL Light, in particular
                 programmability, make it especially suitable for these
                 applications.",
  acknowledgement = ack-nhfb,
  fjournal =     "Formal Methods in System Design",
  journal-URL =  "https://dl.acm.org/loi/fmsd",
}


bibtype: inproceedings
filename: fparith.bib
label: Harrison:2003:ICC
author: John Harrison
title: Isolating critical cases for reciprocals using integer factorization
crossref: Bajard:2003:ISC
pages: 148--157
year: 2003
bibdate: Wed Nov 26 12:04:35 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:35 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Harrison.pdf
keywords: ARITH-16; correct rounding; floating-point arithmetic
acknowledgement: ack-nhfb
rawauthor: John Harrison
rawtitle: Isolating critical cases for reciprocals using integer factorization
abstract:
One approach to testing and / or proving correctness of a floating-point algorithm computing a function $f$ is based on finding input floating-point numbers $ alpha $ such that the exact result $ f(alpha ) $ is very close to a ``rounding boundary'', i.e. a floating-point number or a midpoint between them. In the present paper we show how to do this for the reciprocal function by utilizing prime factorizations. We present the method and show examples, as well as making a fairly detailed study of its expected and worst-case behavior. We point out how this analysis of reciprocals can be useful in analyzing certain reciprocal algorithms, and also show how the approach can be trivially adapted to the reciprocal square root function.

rawabstract:
One approach to testing and\slash or proving correctness of a floating-point algorithm computing a function $f$ is based on finding input floating-point numbers $ \alpha $ such that the exact result $ f(\alpha) $ is very close to a ``rounding boundary'', i.e. a floating-point number or a midpoint between them. In the present paper we show how to do this for the reciprocal function by utilizing prime factorizations. We present the method and show examples, as well as making a fairly detailed study of its expected and worst-case behavior. We point out how this analysis of reciprocals can be useful in analyzing certain reciprocal algorithms, and also show how the approach can be trivially adapted to the reciprocal square root function.

entry:
@InProceedings{Harrison:2003:ICC,
  author =       "John Harrison",
  title =        "Isolating critical cases for reciprocals using integer
                 factorization",
  crossref =     "Bajard:2003:ISC",
  pages =        "148--157",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:35 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Harrison.pdf",
  abstract =     "One approach to testing and\slash or proving
                 correctness of a floating-point algorithm computing a
                 function $f$ is based on finding input floating-point
                 numbers $ \alpha $ such that the exact result $
                 f(\alpha) $ is very close to a ``rounding boundary'',
                 i.e. a floating-point number or a midpoint between
                 them. In the present paper we show how to do this for
                 the reciprocal function by utilizing prime
                 factorizations. We present the method and show
                 examples, as well as making a fairly detailed study of
                 its expected and worst-case behavior. We point out how
                 this analysis of reciprocals can be useful in analyzing
                 certain reciprocal algorithms, and also show how the
                 approach can be trivially adapted to the reciprocal
                 square root function.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16; correct rounding; floating-point
                 arithmetic",
}


bibtype: article
filename: fparith.bib
label: Holmes:2003:PTC
author: Neville Holmes
title: The Profession: Truth and Clarity in Arithmetic
journal: j-COMPUTER
volume: 36
number: 2
pages: 108, 106--107
month: feb
monthnumber: 2
year: 2003
CODEN: CPTRB4
ISSN: 0018-9162 (print), 1558-0814 (electronic) OR 00189162 (print), 15580814 (electronic)
ISSNL: 0018-9162 OR 00189162
bibdate: Fri Dec 12 19:53:54 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.12.12 19:53:54 MST
fjournal: Computer
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=2
rawauthor: Neville Holmes
rawtitle: The Profession: Truth and Clarity in Arithmetic
URL:
http://csdl.computer.org/dl/mags/co/2003/02/r2108.htm; http://csdl.computer.org/dl/mags/co/2003/02/r2108.pdf

entry:
@Article{Holmes:2003:PTC,
  author =       "Neville Holmes",
  title =        "The Profession: Truth and Clarity in Arithmetic",
  journal =      j-COMPUTER,
  volume =       "36",
  number =       "2",
  pages =        "108, 106--107",
  month =        feb,
  year =         "2003",
  CODEN =        "CPTRB4",
  ISSN =         "0018-9162 (print), 1558-0814 (electronic)",
  ISSN-L =       "0018-9162",
  bibdate =      "Fri Dec 12 19:53:54 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://csdl.computer.org/dl/mags/co/2003/02/r2108.htm;
                 http://csdl.computer.org/dl/mags/co/2003/02/r2108.pdf",
  acknowledgement = ack-nhfb,
  fjournal =     "Computer",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=2",
}


bibtype: inproceedings
filename: fparith.bib
label: Huang:2003:HPL
author: Zhijun Huang and Milos D. Ercegovac
title: High-performance left-to-right array multiplier design
crossref: Bajard:2003:ISC
pages: 4--11
year: 2003
bibdate: Wed Nov 26 11:59:51 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 11:59:51 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Huang.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Zhijun Huang and Milo{\v{s}} D. Ercegovac
rawtitle: High-performance left-to-right array multiplier design
abstract:
We propose a split array multiplier organized in a left-to-right leapfrog (LRLF) structure with reduced delay compared to conventional array multipliers. Moreover, the proposed design shows equivalent performance as tree multipliers for $ n leq 32 $. An efficient radix-4 recoding logic generates the partial products in a left-to-right order. The partial products are split into upper and lower groups. Each group is reduced using [3:2] adders with optimized signal flows and the carry-save results from two groups are combined using a [4:2] adder. The final product is obtained with a prefix adder optimized to match the non-uniform arrival profile of the inputs. Layout experiments indicate that upper / lower split multipliers have slightly less area and power than optimized tree multipliers while keeping the same delay for $ n leq 32 $.

rawabstract:
We propose a split array multiplier organized in a left-to-right leapfrog (LRLF) structure with reduced delay compared to conventional array multipliers. Moreover, the proposed design shows equivalent performance as tree multipliers for $ n \leq 32 $. An efficient radix-4 recoding logic generates the partial products in a left-to-right order. The partial products are split into upper and lower groups. Each group is reduced using [3:2] adders with optimized signal flows and the carry-save results from two groups are combined using a [4:2] adder. The final product is obtained with a prefix adder optimized to match the non-uniform arrival profile of the inputs. Layout experiments indicate that upper\slash lower split multipliers have slightly less area and power than optimized tree multipliers while keeping the same delay for $ n \leq 32 $.

entry:
@InProceedings{Huang:2003:HPL,
  author =       "Zhijun Huang and Milo{\v{s}} D. Ercegovac",
  title =        "High-performance left-to-right array multiplier
                 design",
  crossref =     "Bajard:2003:ISC",
  pages =        "4--11",
  year =         "2003",
  bibdate =      "Wed Nov 26 11:59:51 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Huang.pdf",
  abstract =     "We propose a split array multiplier organized in a
                 left-to-right leapfrog (LRLF) structure with reduced
                 delay compared to conventional array multipliers.
                 Moreover, the proposed design shows equivalent
                 performance as tree multipliers for $ n \leq 32 $. An
                 efficient radix-4 recoding logic generates the partial
                 products in a left-to-right order. The partial products
                 are split into upper and lower groups. Each group is
                 reduced using [3:2] adders with optimized signal flows
                 and the carry-save results from two groups are combined
                 using a [4:2] adder. The final product is obtained with
                 a prefix adder optimized to match the non-uniform
                 arrival profile of the inputs. Layout experiments
                 indicate that upper\slash lower split multipliers have
                 slightly less area and power than optimized tree
                 multipliers while keeping the same delay for $ n \leq
                 32 $.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: misc
filename: fparith.bib
label: Intel:2003:DSR
author: Intel
title: Divide, Square Root, and Remainder Algorithms for the Itanium Architecture
pages: 4--11
day: 18
month: dec
monthnumber: 12
year: 2003
bibdate: Tue Nov 18 16:23:36 2008
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2008.11.18 16:23:36 ???
URL: http://www.intel.com/cd/software/products/asmo-na/eng/219863.htm
acknowledgement: ack-nhfb
howpublished: Intel Software Development Products
rawauthor: {Intel}
rawtitle: Divide, Square Root, and Remainder Algorithms for the {Itanium} Architecture
entry:
@Misc{Intel:2003:DSR,
  author =       "{Intel}",
  title =        "Divide, Square Root, and Remainder Algorithms for the
                 {Itanium} Architecture",
  howpublished = "Intel Software Development Products",
  day =          "18",
  month =        dec,
  year =         "2003",
  bibdate =      "Tue Nov 18 16:23:36 2008",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.intel.com/cd/software/products/asmo-na/eng/219863.htm",
  acknowledgement = ack-nhfb,
}


bibtype: misc
filename: fparith.bib
label: Intel:2003:NID
author: Intel
pages: 4--11
day: 18
month: dec
monthnumber: 12
year: 2003
bibdate: Tue Nov 18 16:23:36 2008
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2008.11.18 16:23:36 ???
URL: http://www.intel.com/cd/software/products/asmo-na/eng/219864.htm
acknowledgement: ack-nhfb
howpublished: Intel Software Development Products
rawauthor: {Intel}
title:
Non-IEEE Division, Square Root, Reciprocal, and Reciprocal Square Root Algorithms for the Intel Itanium Architecture

rawtitle:
Non-{IEEE} Division, Square Root, Reciprocal, and Reciprocal Square Root Algorithms for the {Intel Itanium} Architecture

entry:
@Misc{Intel:2003:NID,
  author =       "{Intel}",
  title =        "Non-{IEEE} Division, Square Root, Reciprocal, and
                 Reciprocal Square Root Algorithms for the {Intel
                 Itanium} Architecture",
  howpublished = "Intel Software Development Products",
  day =          "18",
  month =        dec,
  year =         "2003",
  bibdate =      "Tue Nov 18 16:23:36 2008",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.intel.com/cd/software/products/asmo-na/eng/219864.htm",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Iordache:2003:OFP
author: Cristina Iordache and Ping Tak Peter Tang
title: An overview of floating-point support and math library on the Intel XScale architecture
crossref: Bajard:2003:ISC
pages: 122--128
year: 2003
bibdate: Wed Nov 26 12:04:35 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:35 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Iordache.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Cristina Iordache and Ping Tak Peter Tang
rawtitle: An overview of floating-point support and math library on the {Intel XScale} architecture
abstract:
New microprocessor architectures often require software support for basic arithmetic operations such as divide, or square root. The Intelreg XScaleTM processor, designed for low power mobile devices, provides no hardware support for floating-point. We show that an efficient software implementation of the basic operations and math library routines can achieve competitive performance, and effectively hide the lack of hardware floating-point for most applications.

rawabstract:
New microprocessor architectures often require software support for basic arithmetic operations such as divide, or square root. The Intel\reg{} XScale\TM{} processor, designed for low power mobile devices, provides no hardware support for floating-point. We show that an efficient software implementation of the basic operations and math library routines can achieve competitive performance, and effectively hide the lack of hardware floating-point for most applications.

entry:
@InProceedings{Iordache:2003:OFP,
  author =       "Cristina Iordache and Ping Tak Peter Tang",
  title =        "An overview of floating-point support and math library
                 on the {Intel XScale} architecture",
  crossref =     "Bajard:2003:ISC",
  pages =        "122--128",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:35 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Iordache.pdf",
  abstract =     "New microprocessor architectures often require
                 software support for basic arithmetic operations such
                 as divide, or square root. The Intel\reg{} XScale\TM{}
                 processor, designed for low power mobile devices,
                 provides no hardware support for floating-point. We
                 show that an efficient software implementation of the
                 basic operations and math library routines can achieve
                 competitive performance, and effectively hide the lack
                 of hardware floating-point for most applications.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: Kaihara:2003:VAM
author: Marcelo E. Kaihara and Naofumi Takagi
title: A VLSI algorithm for modular multiplication / division
crossref: Bajard:2003:ISC
pages: 220--227
year: 2003
bibdate: Wed Nov 26 12:04:40 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:40 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Kaihara.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Marcelo E. Kaihara and Naofumi Takagi
rawtitle: A {VLSI} algorithm for modular multiplication\slash division
abstract:
We propose an algorithm for modular multiplication / division suitable for VLSI implementation. The algorithm is based on Montgomery's method for modular multiplication and on the extended Binary GCD algorithm for modular division. It can perform either of these operations with a reduced amount of hardware. Both calculations are carried out through iterations of simple operations such as shifts and additions / subtractions. The radix-2 signed-digit representation is employed so that all additions and subtractions are performed without carry propagation. A modular multiplier / divider based on this algorithm has a linear array structure with a bit-slice feature and carries out an n-bit modular multiplication in at most $ floor 2(n + 2) / 3 + 3 $ clock cycles and an $n$-bit modular division in at most $ 2 n + 5 $ clock cycles, where the length of the clock cycle is constant and independent of $n$.

rawabstract:
We propose an algorithm for modular multiplication\slash division suitable for VLSI implementation. The algorithm is based on Montgomery's method for modular multiplication and on the extended Binary GCD algorithm for modular division. It can perform either of these operations with a reduced amount of hardware. Both calculations are carried out through iterations of simple operations such as shifts and additions\slash subtractions. The radix-2 signed-digit representation is employed so that all additions and subtractions are performed without carry propagation. A modular multiplier\slash divider based on this algorithm has a linear array structure with a bit-slice feature and carries out an n-bit modular multiplication in at most $ \floor {2(n + 2) / 3} + 3 $ clock cycles and an $n$-bit modular division in at most $ 2 n + 5 $ clock cycles, where the length of the clock cycle is constant and independent of $n$.

entry:
@InProceedings{Kaihara:2003:VAM,
  author =       "Marcelo E. Kaihara and Naofumi Takagi",
  title =        "A {VLSI} algorithm for modular multiplication\slash
                 division",
  crossref =     "Bajard:2003:ISC",
  pages =        "220--227",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:40 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Kaihara.pdf",
  abstract =     "We propose an algorithm for modular
                 multiplication\slash division suitable for VLSI
                 implementation. The algorithm is based on Montgomery's
                 method for modular multiplication and on the extended
                 Binary GCD algorithm for modular division. It can
                 perform either of these operations with a reduced
                 amount of hardware. Both calculations are carried out
                 through iterations of simple operations such as shifts
                 and additions\slash subtractions. The radix-2
                 signed-digit representation is employed so that all
                 additions and subtractions are performed without carry
                 propagation. A modular multiplier\slash divider based
                 on this algorithm has a linear array structure with a
                 bit-slice feature and carries out an n-bit modular
                 multiplication in at most $ \floor {2(n + 2) / 3} + 3 $
                 clock cycles and an $n$-bit modular division in at most
                 $ 2 n + 5 $ clock cycles, where the length of the clock
                 cycle is constant and independent of $n$.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: article
filename: fparith.bib
label: Kaivola:2003:PEL
author: Roope Kaivola and Katherine Kohatsu
title: Proof engineering in the large: formal verification of Pentiumreg 4 floating-point divider
journal: j-INT-J-SOFTW-TOOLS-TECHNOL-TRANSFER
volume: 4
number: 3
pages: 323--334
month: may
monthnumber: 5
year: 2003
DOI: https://doi.org/10.1007/s10009-002-0081-6
ISSN: 1433-2779 (print), 1433-2787 (electronic) OR 14332779 (print), 14332787 (electronic)
ISSNL: 1433-2779 OR 14332779
bibdate: Tue Nov 23 15:01:41 MST 2004
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.11.23 15:01:41 MST
fjournal: International Journal on Software Tools for Technology Transfer: STTT
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/10009
rawauthor: Roope Kaivola and Katherine Kohatsu
rawtitle: Proof engineering in the large: formal verification of {Pentium\reg{}4} floating-point divider
entry:
@Article{Kaivola:2003:PEL,
  author =       "Roope Kaivola and Katherine Kohatsu",
  title =        "Proof engineering in the large: formal verification of
                 {Pentium\reg{}4} floating-point divider",
  journal =      j-INT-J-SOFTW-TOOLS-TECHNOL-TRANSFER,
  volume =       "4",
  number =       "3",
  pages =        "323--334",
  month =        may,
  year =         "2003",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1007/s10009-002-0081-6",
  ISSN =         "1433-2779 (print), 1433-2787 (electronic)",
  ISSN-L =       "1433-2779",
  bibdate =      "Tue Nov 23 15:01:41 MST 2004",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "International Journal on Software Tools for Technology
                 Transfer: STTT",
  journal-URL =  "http://link.springer.com/journal/10009",
}


bibtype: article
filename: fparith.bib
label: Katti:2003:LCM
author: R. Katti and J. Brennan
title: Low complexity multiplication in a finite field using ring representation
journal: j-IEEE-TRANS-COMPUT
volume: 52
number: 4
pages: 418--427
month: apr
monthnumber: 4
year: 2003
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2003.1190583
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:52:46 MDT 2011
bibtimestamp: 2011.07.05 08:52:46 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1190583
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: R. Katti and J. Brennan
rawtitle: Low complexity multiplication in a finite field using ring representation
entry:
@Article{Katti:2003:LCM,
  author =       "R. Katti and J. Brennan",
  title =        "Low complexity multiplication in a finite field using
                 ring representation",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "52",
  number =       "4",
  pages =        "418--427",
  month =        apr,
  year =         "2003",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2003.1190583",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:52:46 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1190583",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Koren:2003:SCA
author: Israel Koren and Yaron Koren and Bejoy G. Oomman
title: Saturating counters: application and design alternatives
crossref: Bajard:2003:ISC
pages: 228--235
year: 2003
bibdate: Wed Nov 26 12:04:40 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:40 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Koren.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Israel Koren and Yaron Koren and Bejoy G. Oomman
rawtitle: Saturating counters: application and design alternatives
abstract:
We define a new class of parallel counters, Saturating Counters, which provide the exact count of the inputs that are 1 only if this count is below a given threshold. Such counters are useful in, for example, a self-test and repair unit for embedded memories in a system-on-a-chip. We describe this application and present several alternatives for the design of the saturating counter. We then compare the delay and area of the proposed design alternatives.

rawabstract:
We define a new class of parallel counters, Saturating Counters, which provide the exact count of the inputs that are 1 only if this count is below a given threshold. Such counters are useful in, for example, a self-test and repair unit for embedded memories in a system-on-a-chip. We describe this application and present several alternatives for the design of the saturating counter. We then compare the delay and area of the proposed design alternatives.

entry:
@InProceedings{Koren:2003:SCA,
  author =       "Israel Koren and Yaron Koren and Bejoy G. Oomman",
  title =        "Saturating counters: application and design
                 alternatives",
  crossref =     "Bajard:2003:ISC",
  pages =        "228--235",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:40 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Koren.pdf",
  abstract =     "We define a new class of parallel counters, Saturating
                 Counters, which provide the exact count of the inputs
                 that are 1 only if this count is below a given
                 threshold. Such counters are useful in, for example, a
                 self-test and repair unit for embedded memories in a
                 system-on-a-chip. We describe this application and
                 present several alternatives for the design of the
                 saturating counter. We then compare the delay and area
                 of the proposed design alternatives.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: Kornerup:2003:RSQ
author: Peter Kornerup
title: Revisiting SRT quotient digit selection
crossref: Bajard:2003:ISC
pages: 38--45
year: 2003
bibdate: Wed Nov 26 11:59:51 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 11:59:51 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Kornerup.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Peter Kornerup
rawtitle: Revisiting {SRT} quotient digit selection
abstract:
The quotient digit selection in the SRT division algorithm is based on a few most significant bits of the remainder and divisor, where the remainder is usually represented in a redundant representation. The number of leading bits needed depends on the quotient radix and digit set, and is usually found by an extensive search, to assure that the next quotient digit can be chosen as valid for all points (remainder, divisor) in a set defined by the truncated remainder and divisor, i.e., an ``uncertainty rectangle''.par This paper presents expressions for the number of bits needed for the truncated remainder and divisor, thus eliminating the need for a search through the truncation parameter space for validation. It also presents simple algorithms to properly map truncated negative divisors and remainders into non-negative values, allowing the quotient selection function only to be defined on the smaller domain of non-negative values.

rawabstract:
The quotient digit selection in the SRT division algorithm is based on a few most significant bits of the remainder and divisor, where the remainder is usually represented in a redundant representation. The number of leading bits needed depends on the quotient radix and digit set, and is usually found by an extensive search, to assure that the next quotient digit can be chosen as valid for all points (remainder, divisor) in a set defined by the truncated remainder and divisor, i.e., an ``uncertainty rectangle''.\par This paper presents expressions for the number of bits needed for the truncated remainder and divisor, thus eliminating the need for a search through the truncation parameter space for validation. It also presents simple algorithms to properly map truncated negative divisors and remainders into non-negative values, allowing the quotient selection function only to be defined on the smaller domain of non-negative values.

entry:
@InProceedings{Kornerup:2003:RSQ,
  author =       "Peter Kornerup",
  title =        "Revisiting {SRT} quotient digit selection",
  crossref =     "Bajard:2003:ISC",
  pages =        "38--45",
  year =         "2003",
  bibdate =      "Wed Nov 26 11:59:51 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Kornerup.pdf",
  abstract =     "The quotient digit selection in the SRT division
                 algorithm is based on a few most significant bits of
                 the remainder and divisor, where the remainder is
                 usually represented in a redundant representation. The
                 number of leading bits needed depends on the quotient
                 radix and digit set, and is usually found by an
                 extensive search, to assure that the next quotient
                 digit can be chosen as valid for all points (remainder,
                 divisor) in a set defined by the truncated remainder
                 and divisor, i.e., an ``uncertainty
                 rectangle''.\par

                 This paper presents expressions for the number of bits
                 needed for the truncated remainder and divisor, thus
                 eliminating the need for a search through the
                 truncation parameter space for validation. It also
                 presents simple algorithms to properly map truncated
                 negative divisors and remainders into non-negative
                 values, allowing the quotient selection function only
                 to be defined on the smaller domain of non-negative
                 values.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: Krithivasan:2003:MAM
author: S. Krithivasan and M. J. Schulte
title: Multiplier Architectures for Media Processing
crossref: Matthews:2003:PTS
pages: 2193--2197
year: 2003
bibdate: Sun Mar 04 17:52:49 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.03.04 17:52:49 ???
URL: http://mesa.ece.wisc.edu/publications/cp_2003-08.pdf
acknowledgement: ack-nhfb
rawauthor: S. Krithivasan and M. J. Schulte
rawtitle: Multiplier Architectures for Media Processing
entry:
@InProceedings{Krithivasan:2003:MAM,
  author =       "S. Krithivasan and M. J. Schulte",
  title =        "Multiplier Architectures for Media Processing",
  crossref =     "Matthews:2003:PTS",
  pages =        "2193--2197",
  year =         "2003",
  bibdate =      "Sun Mar 04 17:52:49 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://mesa.ece.wisc.edu/publications/cp_2003-08.pdf",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Kwon:2003:LCL
author: Soonhak Kwon
crossref: Bajard:2003:ISC
pages: 196--202
year: 2003
bibdate: Wed Nov 26 12:04:35 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:35 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Kwon.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Soonhak Kwon
title:
A low complexity and a low latency bit parallel systolic multiplier over $ mathrm GF(2^m) $ using an optimal normal basis of type II

abstract:
Using the self duality of an optimal normal basis (ONB) of type II, we present a bit parallel systolic multiplier over $ mathrm GF(2^m) $ which has a low hardware complexity and a low latency. We show that our multiplier has a latency $ m + 1 $ and the basic cell of our circuit design needs 5 latches (flip-flops). On the other hand, most of other multipliers of the same type have latency $ 3 m $ and the basic cell of each multiplier needs 7 latches. Comparing the gates areas in each basic cell, we find that the hardware complexity of our multiplier is 25 percent reduced from the multipliers with 7 latches.

rawabstract:
Using the self duality of an optimal normal basis (ONB) of type II, we present a bit parallel systolic multiplier over $ \mathrm {GF}(2^m) $ which has a low hardware complexity and a low latency. We show that our multiplier has a latency $ m + 1 $ and the basic cell of our circuit design needs 5 latches (flip-flops). On the other hand, most of other multipliers of the same type have latency $ 3 m $ and the basic cell of each multiplier needs 7 latches. Comparing the gates areas in each basic cell, we find that the hardware complexity of our multiplier is 25 percent reduced from the multipliers with 7 latches.

rawtitle:
A low complexity and a low latency bit parallel systolic multiplier over {$ \mathrm {GF}(2^m) $} using an optimal normal basis of type {II}

entry:
@InProceedings{Kwon:2003:LCL,
  author =       "Soonhak Kwon",
  title =        "A low complexity and a low latency bit parallel
                 systolic multiplier over {$ \mathrm {GF}(2^m) $} using
                 an optimal normal basis of type {II}",
  crossref =     "Bajard:2003:ISC",
  pages =        "196--202",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:35 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Kwon.pdf",
  abstract =     "Using the self duality of an optimal normal basis
                 (ONB) of type II, we present a bit parallel systolic
                 multiplier over $ \mathrm {GF}(2^m) $ which has a low
                 hardware complexity and a low latency. We show that our
                 multiplier has a latency $ m + 1 $ and the basic cell
                 of our circuit design needs 5 latches (flip-flops). On
                 the other hand, most of other multipliers of the same
                 type have latency $ 3 m $ and the basic cell of each
                 multiplier needs 7 latches. Comparing the gates areas
                 in each basic cell, we find that the hardware
                 complexity of our multiplier is 25 percent reduced from
                 the multipliers with 7 latches.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: article
filename: fparith.bib
label: Lang:2003:RRS
author: Tomas Lang and Elisardo Antelo
title: Radix-$4$ Reciprocal Square-root and Its Combination with Division and Square Root
journal: j-IEEE-TRANS-COMPUT
volume: 52
number: 9
pages: 1100--1114
month: sep
monthnumber: 9
year: 2003
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2003.1228508
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:52:54 MDT 2011
bibtimestamp: 2011.07.05 08:52:54 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1228508
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Tom{\'a}s Lang and Elisardo Antelo
rawtitle: Radix-$4$ Reciprocal Square-root and Its Combination with Division and Square Root
abstract:
In this work, we present a reciprocal square root algorithm by digit recurrence and selection by a staircase function and the radix-$4$ implementation. As in similar algorithms for division and square root, the results are obtained correctly rounded in a straightforward manner (in contrast to existing methods to compute the reciprocal square root). Although, apparently, a single selection function can only be used for $ j geq 2 $ (the selection constants are different for $ j = 0 $, $ j = 1 $, and $ j geq 2 $) , we show that it is possible to use a single selection function for all iterations. We perform a rough comparison with existing methods and we conclude that our implementation is a low hardware complexity solution with moderate latency, especially for exactly rounded results. We also extend the unit to support division and square root with the same selection function and with slight modifications in the initialization of the reciprocal square root unit.

rawabstract:
In this work, we present a reciprocal square root algorithm by digit recurrence and selection by a staircase function and the radix-$4$ implementation. As in similar algorithms for division and square root, the results are obtained correctly rounded in a straightforward manner (in contrast to existing methods to compute the reciprocal square root). Although, apparently, a single selection function can only be used for $ j \geq 2 $ (the selection constants are different for $ j = 0 $, $ j = 1 $, and $ j \geq 2 $) , we show that it is possible to use a single selection function for all iterations. We perform a rough comparison with existing methods and we conclude that our implementation is a low hardware complexity solution with moderate latency, especially for exactly rounded results. We also extend the unit to support division and square root with the same selection function and with slight modifications in the initialization of the reciprocal square root unit.

entry:
@Article{Lang:2003:RRS,
  author =       "Tom{\'a}s Lang and Elisardo Antelo",
  title =        "Radix-$4$ Reciprocal Square-root and Its Combination
                 with Division and Square Root",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "52",
  number =       "9",
  pages =        "1100--1114",
  month =        sep,
  year =         "2003",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2003.1228508",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:52:54 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1228508",
  abstract =     "In this work, we present a reciprocal square root
                 algorithm by digit recurrence and selection by a
                 staircase function and the radix-$4$ implementation. As
                 in similar algorithms for division and square root, the
                 results are obtained correctly rounded in a
                 straightforward manner (in contrast to existing methods
                 to compute the reciprocal square root). Although,
                 apparently, a single selection function can only be
                 used for $ j \geq 2 $ (the selection constants are
                 different for $ j = 0 $, $ j = 1 $, and $ j \geq 2 $) ,
                 we show that it is possible to use a single selection
                 function for all iterations. We perform a rough
                 comparison with existing methods and we conclude that
                 our implementation is a low hardware complexity
                 solution with moderate latency, especially for exactly
                 rounded results. We also extend the unit to support
                 division and square root with the same selection
                 function and with slight modifications in the
                 initialization of the reciprocal square root unit.",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Lee:2003:DPL
author: B. Lee and N. Burgess
title: A Dual-Path Logarithmic Number System Addition / Subtraction Scheme for FPGA
crossref: Cheung:2003:FPL
pages: 808--817
year: 2003
bibdate: Fri Jun 24 18:24:42 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.24 18:24:42 ???
acknowledgement: ack-nhfb
rawauthor: B. Lee and N. Burgess
rawtitle: A Dual-Path Logarithmic Number System Addition\slash Subtraction Scheme for {FPGA}
entry:
@InProceedings{Lee:2003:DPL,
  author =       "B. Lee and N. Burgess",
  title =        "A Dual-Path Logarithmic Number System Addition\slash
                 Subtraction Scheme for {FPGA}",
  crossref =     "Cheung:2003:FPL",
  pages =        "808--817",
  year =         "2003",
  bibdate =      "Fri Jun 24 18:24:42 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Lefevre:2003:FRR
author: Vincent Lefevre and Jean-Michel Muller
title: On-the-fly Range Reduction
journal: j-J-VLSI-SIGNAL-PROC
volume: 33
number: 1--2
pages: 31--35
month: jan
monthnumber: 1
year: 2003
CODEN: JVSPED
DOI: https://doi.org/10.1023/A:1021137717282
ISSN: 0922-5773 (print), 1573-109x (electronic) OR 09225773 (print), 1573109x (electronic)
ISSNL: 0922-5773 OR 09225773
bibdate: Sat Jun 25 08:56:19 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.25 08:56:19 ???
fjournal: Journal of VLSI Signal Processing
keywords: range reduction
acknowledgement: ack-nhfb
rawauthor: Vincent Lef{\`e}vre and Jean-Michel Muller
rawtitle: On-the-fly Range Reduction
abstract:
In several cases, the input argument of an elementary function evaluation is given bit-serially, most significant bit first. We suggest a solution for performing the first step of the evaluation (namely, the range reduction) on the fly: the computation is overlapped with the reception of the input bits. This algorithm can be used for the trigonometric functions sin, cos, tan as well as for the exponential function.

rawabstract:
In several cases, the input argument of an elementary function evaluation is given bit-serially, most significant bit first. We suggest a solution for performing the first step of the evaluation (namely, the range reduction) on the fly: the computation is overlapped with the reception of the input bits. This algorithm can be used for the trigonometric functions sin, cos, tan as well as for the exponential function.

entry:
@Article{Lefevre:2003:FRR,
  author =       "Vincent Lef{\`e}vre and Jean-Michel Muller",
  title =        "On-the-fly Range Reduction",
  journal =      j-J-VLSI-SIGNAL-PROC,
  volume =       "33",
  number =       "1--2",
  pages =        "31--35",
  month =        jan,
  year =         "2003",
  CODEN =        "JVSPED",
  DOI =          "https://doi.org/10.1023/A:1021137717282",
  ISSN =         "0922-5773 (print), 1573-109x (electronic)",
  ISSN-L =       "0922-5773",
  bibdate =      "Sat Jun 25 08:56:19 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "In several cases, the input argument of an elementary
                 function evaluation is given bit-serially, most
                 significant bit first. We suggest a solution for
                 performing the first step of the evaluation (namely,
                 the range reduction) on the fly: the computation is
                 overlapped with the reception of the input bits. This
                 algorithm can be used for the trigonometric functions
                 sin, cos, tan as well as for the exponential
                 function.",
  acknowledgement = ack-nhfb,
  fjournal =     "Journal of VLSI Signal Processing",
  keywords =     "range reduction",
}


bibtype: misc
filename: fparith.bib
label: Lefevre:2003:TMD
author: Vincent Lefevre and Jean-Michel Muller
title: The Table Maker's Dilemma: our search for worst cases
pages: 31--35
day: 28
month: oct
monthnumber: 10
year: 2003
bibdate: Fri Jun 24 20:08:53 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.24 20:08:53 ???
URL: http://perso.ens-lyon.fr/jean-michel.muller/Intro-to-TMD.htm
acknowledgement: ack-nhfb
howpublished: World-Wide Web software project archive.
rawauthor: Vincent Lef{\`e}vre and Jean-Michel Muller
rawtitle: The {Table Maker's Dilemma}: our search for worst cases
abstract:
The Table Maker's Dilemma consists in finding, for a given function and a given domain, the smallest value of $m$ [the relative error is $ 2^-m $ ] such that rounding this approximate value $ y* $ always gives the same result as rounding the exact value $y$. This is done by looking for ``worst cases'', that is, in the considered domain, the values $x$ such that $ f(x) $ is closest to an exactly representable number or the mid-point of two exactly representable numbers.

rawabstract:
The Table Maker's Dilemma consists in finding, for a given function and a given domain, the smallest value of $m$ [the relative error is $ 2^{-m} $ ] such that rounding this approximate value $ y* $ always gives the same result as rounding the exact value $y$. This is done by looking for ``worst cases'', that is, in the considered domain, the values $x$ such that $ f(x) $ is closest to an exactly representable number or the mid-point of two exactly representable numbers.

entry:
@Misc{Lefevre:2003:TMD,
  author =       "Vincent Lef{\`e}vre and Jean-Michel Muller",
  title =        "The {Table Maker's Dilemma}: our search for worst
                 cases",
  howpublished = "World-Wide Web software project archive.",
  day =          "28",
  month =        oct,
  year =         "2003",
  bibdate =      "Fri Jun 24 20:08:53 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://perso.ens-lyon.fr/jean-michel.muller/Intro-to-TMD.htm",
  abstract =     "The Table Maker's Dilemma consists in finding, for a
                 given function and a given domain, the smallest value
                 of $m$ [the relative error is $ 2^{-m} $ ] such that
                 rounding this approximate value $ y* $ always gives the
                 same result as rounding the exact value $y$. This is
                 done by looking for ``worst cases'', that is, in the
                 considered domain, the values $x$ such that $ f(x) $ is
                 closest to an exactly representable number or the
                 mid-point of two exactly representable numbers.",
  acknowledgement = ack-nhfb,
}


bibtype: techreport
filename: fparith.bib
label: Lefevre:2003:WCC
author: Vincent Lefevre and Jean-Michel Muller
title: Worst Cases for Correct Rounding for the Elementary Functions in Double Precision
type: Technical report
institution: INRIA, Projet Spaces, LORIA, Campus Scientifique
address: B.P. 239, 54506 Vandoeuvre-les-Nancy Cedex, France
pages: 31--35
day: 14
month: aug
monthnumber: 8
year: 2003
bibdate: Thu Jul 08 08:27:53 2004
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.07.08 08:27:53 ???
URL: http://perso.ens-lyon.fr/jean-michel.muller/TMDworstcases.pdf
acknowledgement: ack-nhfb
rawauthor: Vincent Lef{\`e}vre and Jean-Michel Muller
rawtitle: Worst Cases for Correct Rounding for the Elementary Functions in Double Precision
abstract:
We give the results of our search for the worst cases for correct rounding of the major elementary functions in double precision floating-point arithmetic. These results allow the design of reasonably fast routines that will compute these functions with correct rounding, at least in some interval, for any of the four rounding modes specified by the IEEE-754 standard. They will also allow one to easily test libraries that are claimed to provide correctly rounded functions.

keywords:
computer arithmetic; correct rounding; elementary functions; floating-point arithmetic; Table Maker's Dilemma

rawabstract:
We give the results of our search for the worst cases for correct rounding of the major elementary functions in double precision floating-point arithmetic. These results allow the design of reasonably fast routines that will compute these functions with correct rounding, at least in some interval, for any of the four rounding modes specified by the IEEE-754 standard. They will also allow one to easily test libraries that are claimed to provide correctly rounded functions.

entry:
@TechReport{Lefevre:2003:WCC,
  author =       "Vincent Lef{\`e}vre and Jean-Michel Muller",
  title =        "Worst Cases for Correct Rounding for the Elementary
                 Functions in Double Precision",
  type =         "Technical report",
  institution =  "INRIA, Projet Spaces, LORIA, Campus Scientifique",
  address =      "B.P. 239, 54506 Vandoeuvre-l{\`e}s-Nancy Cedex,
                 France",
  day =          "14",
  month =        aug,
  year =         "2003",
  bibdate =      "Thu Jul 08 08:27:53 2004",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://perso.ens-lyon.fr/jean-michel.muller/TMDworstcases.pdf",
  abstract =     "We give the results of our search for the worst cases
                 for correct rounding of the major elementary functions
                 in double precision floating-point arithmetic. These
                 results allow the design of reasonably fast routines
                 that will compute these functions with correct
                 rounding, at least in some interval, for any of the
                 four rounding modes specified by the IEEE-754 standard.
                 They will also allow one to easily test libraries that
                 are claimed to provide correctly rounded functions.",
  acknowledgement = ack-nhfb,
  keywords =     "computer arithmetic; correct rounding; elementary
                 functions; floating-point arithmetic; Table Maker's
                 Dilemma",
}


bibtype: inproceedings
filename: fparith.bib
label: Li:2003:TEA
author: Ren-Cang Li and Sylvie Boldo and Marc Daumas
title: Theorems on efficient argument reductions
crossref: Bajard:2003:ISC
pages: 129--136
year: 2003
bibdate: Wed Nov 26 12:04:35 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:35 MST
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Ren-Cang Li and Sylvie Boldo and Marc Daumas
rawtitle: Theorems on efficient argument reductions
URL:
http://csdl.computer.org/comp/proceedings/arith/2003/1894/00/1894toc.htm; http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Li.pdf

abstract:
A commonly used argument reduction technique in elementary function computations begins with two positive floating point numbers $ alpha $ and $ gamma $ that approximate (usually irrational but not necessarily) numbers $ 1 / C $ and $C$, e.g., $ C = 2 pi $ for trigonometric functions and $ ln 2 $ for $ e^x $. Given an argument to the function of interest it extracts $z$ as defined by $ x alpha = z + zeta $ with $ z = k2^-N $ and $ | zeta | leq 2^N - 1 $ where $k$, $N$ are integers and $ N geq 0 $ is preselected, and then computes $ u = x - z gamma $. Usually $ z gamma $ takes more bits than the working precision provides for storing its significand, and thus exact $ x - z gamma $ may not be represented exactly by a floating point number of the same precision. This will cause a performance penalty when the working precision is the highest available on the underlying hardware and thus considerable extra work is needed to get all the bits of $ x - z gamma $ right. This paper presents theorems that show under mild conditions that can be easily met on today's computer hardware and still allow $ alpha approx 1 / C $ and $ gamma approx C $ to almost the full working precision, $ x - z gamma $ is a floating point number of the same precision. An algorithmic procedure based on the theorems is obtained. The results will enhance performance, in particular on machines that has hardware support for fused multiply-add (fma) instruction(s).

rawabstract:
A commonly used argument reduction technique in elementary function computations begins with two positive floating point numbers $ \alpha $ and $ \gamma $ that approximate (usually irrational but not necessarily) numbers $ 1 / C $ and $C$, e.g., $ C = 2 \pi $ for trigonometric functions and $ \ln 2 $ for $ e^x $. Given an argument to the function of interest it extracts $z$ as defined by $ x \alpha = z + \zeta $ with $ z = k2^{-N} $ and $ | \zeta | \leq 2^{N - 1} $ where $k$, $N$ are integers and $ N \geq 0 $ is preselected, and then computes $ u = x - z \gamma $. Usually $ z \gamma $ takes more bits than the working precision provides for storing its significand, and thus exact $ x - z \gamma $ may not be represented exactly by a floating point number of the same precision. This will cause a performance penalty when the working precision is the highest available on the underlying hardware and thus considerable extra work is needed to get all the bits of $ x - z \gamma $ right. This paper presents theorems that show under mild conditions that can be easily met on today's computer hardware and still allow $ \alpha \approx 1 / C $ and $ \gamma \approx C $ to almost the full working precision, $ x - z \gamma $ is a floating point number of the same precision. An algorithmic procedure based on the theorems is obtained. The results will enhance performance, in particular on machines that has hardware support for fused multiply-add (fma) instruction(s).

entry:
@InProceedings{Li:2003:TEA,
  author =       "Ren-Cang Li and Sylvie Boldo and Marc Daumas",
  title =        "Theorems on efficient argument reductions",
  crossref =     "Bajard:2003:ISC",
  pages =        "129--136",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:35 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://csdl.computer.org/comp/proceedings/arith/2003/1894/00/1894toc.htm;
                 http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Li.pdf",
  abstract =     "A commonly used argument reduction technique in
                 elementary function computations begins with two
                 positive floating point numbers $ \alpha $ and $ \gamma
                 $ that approximate (usually irrational but not
                 necessarily) numbers $ 1 / C $ and $C$, e.g., $ C = 2
                 \pi $ for trigonometric functions and $ \ln 2 $ for $
                 e^x $. Given an argument to the function of interest it
                 extracts $z$ as defined by $ x \alpha = z + \zeta $
                 with $ z = k2^{-N} $ and $ | \zeta | \leq 2^{N - 1} $
                 where $k$, $N$ are integers and $ N \geq 0 $ is
                 preselected, and then computes $ u = x - z \gamma $.
                 Usually $ z \gamma $ takes more bits than the working
                 precision provides for storing its significand, and
                 thus exact $ x - z \gamma $ may not be represented
                 exactly by a floating point number of the same
                 precision. This will cause a performance penalty when
                 the working precision is the highest available on the
                 underlying hardware and thus considerable extra work is
                 needed to get all the bits of $ x - z \gamma $ right.
                 This paper presents theorems that show under mild
                 conditions that can be easily met on today's computer
                 hardware and still allow $ \alpha \approx 1 / C $ and $
                 \gamma \approx C $ to almost the full working
                 precision, $ x - z \gamma $ is a floating point number
                 of the same precision. An algorithmic procedure based
                 on the theorems is obtained. The results will enhance
                 performance, in particular on machines that has
                 hardware support for fused multiply-add (fma)
                 instruction(s).",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: Mamidi:2003:AGC
author: S. Mamidi and M. Senthilvelan and M. J. Schulte and S. Krithivasan
title: Automated Generation of Configurable Media Processors
crossref: Matthews:2003:PTS
pages: 339--343
year: 2003
bibdate: Sun Mar 04 17:51:05 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.03.04 17:51:05 ???
URL: http://mesa.ece.wisc.edu/publications/cp_2003-09.pdf
acknowledgement: ack-nhfb
rawauthor: S. Mamidi and M. Senthilvelan and M. J. Schulte and S. Krithivasan
rawtitle: Automated Generation of Configurable Media Processors
entry:
@InProceedings{Mamidi:2003:AGC,
  author =       "S. Mamidi and M. Senthilvelan and M. J. Schulte and S.
                 Krithivasan",
  title =        "Automated Generation of Configurable Media
                 Processors",
  crossref =     "Matthews:2003:PTS",
  pages =        "339--343",
  year =         "2003",
  bibdate =      "Sun Mar 04 17:51:05 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://mesa.ece.wisc.edu/publications/cp_2003-09.pdf",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Markstein:2003:ASC
author: Peter Markstein
title: Accelerating sine and cosine evaluation with compiler assistance
crossref: Bajard:2003:ISC
pages: 137--140
year: 2003
bibdate: Wed Nov 26 12:04:35 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:35 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Markstein.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Peter Markstein
rawtitle: Accelerating sine and cosine evaluation with compiler assistance
abstract:
Some software libraries add special entry points to enable both the sine and cosine to be evaluated with one call for performance reasons. This paper proposes another methods which does not involve new function names. By having the compiler front end recognize trigonometric function invocations, and replace them with a call to a common function followed by a short routine to produce the desired computation, it is possible to computer both the sine and the cosine when needed in about the same time as to compute only one of them.

rawabstract:
Some software libraries add special entry points to enable both the sine and cosine to be evaluated with one call for performance reasons. This paper proposes another methods which does not involve new function names. By having the compiler front end recognize trigonometric function invocations, and replace them with a call to a common function followed by a short routine to produce the desired computation, it is possible to computer both the sine and the cosine when needed in about the same time as to compute only one of them.

entry:
@InProceedings{Markstein:2003:ASC,
  author =       "Peter Markstein",
  title =        "Accelerating sine and cosine evaluation with compiler
                 assistance",
  crossref =     "Bajard:2003:ISC",
  pages =        "137--140",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:35 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Markstein.pdf",
  abstract =     "Some software libraries add special entry points to
                 enable both the sine and cosine to be evaluated with
                 one call for performance reasons. This paper proposes
                 another methods which does not involve new function
                 names. By having the compiler front end recognize
                 trigonometric function invocations, and replace them
                 with a call to a common function followed by a short
                 routine to produce the desired computation, it is
                 possible to computer both the sine and the cosine when
                 needed in about the same time as to compute only one of
                 them.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: Markstein:2003:FQP
author: Peter Markstein
title: A fast quad precision elementary function library for Itanium
crossref: Anonymous:2003:CRN
pages: 5--12
year: 2003
bibdate: Fri Jun 24 20:14:39 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.24 20:14:39 ???
acknowledgement: ack-nhfb
rawauthor: Peter Markstein
rawtitle: A fast quad precision elementary function library for {Itanium}
abstract:
This talk will describe Itanium's floating point architecture and how it has been used to produce a high performance, highly accurate quad precision elementary function library.par Itanium's floating-point features will first be described, from the point of view of a computer architect. Many conflicting requirements vie for consideration during the design of a new computer architecture. These include instruction word size, number of registers, the set of operations, arithmetic precisions supported, and memory access. Some of the trade-offs during the design phase will be discussed.par One of the objectives of the original Itanium design was to accelerate quad precision arithmetic. The talk will describe how the Itanium elementary function library was constructed, with attention to performance and accuracy. Because a pair of double-extended floating point words are used for internal operations involving quad precision numbers, intermediate results, holding 128 bits, provide 15 guard bits during intermediate calculations, resulting in a very low percentage of misrounded results.

rawabstract:
This talk will describe Itanium's floating point architecture and how it has been used to produce a high performance, highly accurate quad precision elementary function library.\par Itanium's floating-point features will first be described, from the point of view of a computer architect. Many conflicting requirements vie for consideration during the design of a new computer architecture. These include instruction word size, number of registers, the set of operations, arithmetic precisions supported, and memory access. Some of the trade-offs during the design phase will be discussed.\par One of the objectives of the original Itanium design was to accelerate quad precision arithmetic. The talk will describe how the Itanium elementary function library was constructed, with attention to performance and accuracy. Because a pair of double-extended floating point words are used for internal operations involving quad precision numbers, intermediate results, holding 128 bits, provide 15 guard bits during intermediate calculations, resulting in a very low percentage of misrounded results.

entry:
@InProceedings{Markstein:2003:FQP,
  author =       "Peter Markstein",
  title =        "A fast quad precision elementary function library for
                 {Itanium}",
  crossref =     "Anonymous:2003:CRN",
  pages =        "5--12",
  year =         "2003",
  bibdate =      "Fri Jun 24 20:14:39 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "This talk will describe Itanium's floating point
                 architecture and how it has been used to produce a high
                 performance, highly accurate quad precision elementary
                 function library.\par

                 Itanium's floating-point features will first be
                 described, from the point of view of a computer
                 architect. Many conflicting requirements vie for
                 consideration during the design of a new computer
                 architecture. These include instruction word size,
                 number of registers, the set of operations, arithmetic
                 precisions supported, and memory access. Some of the
                 trade-offs during the design phase will be
                 discussed.\par

                 One of the objectives of the original Itanium design
                 was to accelerate quad precision arithmetic. The talk
                 will describe how the Itanium elementary function
                 library was constructed, with attention to performance
                 and accuracy. Because a pair of double-extended
                 floating point words are used for internal operations
                 involving quad precision numbers, intermediate results,
                 holding 128 bits, provide 15 guard bits during
                 intermediate calculations, resulting in a very low
                 percentage of misrounded results.",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Matula:2003:BFM
author: David W. Matula and Lee D. McFearin
title: A $ p times p $ bit fraction model of binary floating point division and extremal rounding cases
journal: j-THEOR-COMP-SCI
volume: 291
number: 2
pages: 159--182
year: 2003
CODEN: TCSDIQ
ISSN: 0304-3975 (print), 1879-2294 (electronic) OR 03043975 (print), 18792294 (electronic)
ISSNL: 0304-3975 OR 03043975
MRclass: 68M07 (65G30)
MRnumber: MR1957438 (2004e:68004)
MRreviewer: Jean-Marie Chesneaux
bibdate: Thu Nov 8 19:16:14 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.08 19:16:14 ???
note: Real numbers and computers (Schloss Dagstuhl, 2000)
fjournal: Theoretical Computer Science
keywords: rounding errors
acknowledgement: ack-nhfb
journalURL: http://www.sciencedirect.com/science/journal/03043975
rawauthor: David W. Matula and Lee D. McFearin
rawnote: Real numbers and computers (Schloss Dagstuhl, 2000)
rawtitle: A $ p \times p $ bit fraction model of binary floating point division and extremal rounding cases
entry:
@Article{Matula:2003:BFM,
  author =       "David W. Matula and Lee D. McFearin",
  title =        "A $ p \times p $ bit fraction model of binary floating
                 point division and extremal rounding cases",
  journal =      j-THEOR-COMP-SCI,
  volume =       "291",
  number =       "2",
  pages =        "159--182",
  year =         "2003",
  CODEN =        "TCSDIQ",
  ISSN =         "0304-3975 (print), 1879-2294 (electronic)",
  ISSN-L =       "0304-3975",
  MRclass =      "68M07 (65G30)",
  MRnumber =     "MR1957438 (2004e:68004)",
  MRreviewer =   "Jean-Marie Chesneaux",
  bibdate =      "Thu Nov 8 19:16:14 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "Real numbers and computers (Schloss Dagstuhl, 2000)",
  acknowledgement = ack-nhfb,
  fjournal =     "Theoretical Computer Science",
  journal-URL =  "http://www.sciencedirect.com/science/journal/03043975",
  keywords =     "rounding errors",
}


bibtype: inproceedings
filename: fparith.bib
label: Matula:2003:CAA
author: David W. Matula
title: Computer Arithmetic --- An Algorithm Engineer's Perspective
crossref: Bajard:2003:ISC
pages: 2--2
year: 2003
bibdate: Wed Nov 26 11:59:51 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 11:59:51 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Matula_keynote.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: David W. Matula
rawtitle: Computer Arithmetic --- An Algorithm Engineer's Perspective
entry:
@InProceedings{Matula:2003:CAA,
  author =       "David W. Matula",
  title =        "Computer Arithmetic --- An Algorithm Engineer's
                 Perspective",
  crossref =     "Bajard:2003:ISC",
  pages =        "2--2",
  year =         "2003",
  bibdate =      "Wed Nov 26 11:59:51 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Matula_keynote.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: Matula:2003:PID
author: David W. Matula and Alex Fit-Florea
title: Prescaled integer division
crossref: Bajard:2003:ISC
pages: 63--68
year: 2003
bibdate: Wed Nov 26 11:59:51 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 11:59:51 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Matula.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: David W. Matula and Alex Fit-Florea
rawtitle: Prescaled integer division
abstract:
We describe a high radix integer division algorithm where the divisor is prescaled and the quotient is post-scaled without modifying the dividend to obtain an identity $ N = Q* times D + R* $ with the quotient $ Q* $ differing from the desired integer quotient $Q$ only in its lowest order high radix digit. Here the ``oversized'' partial remainder $ R* $ is bounded by the scaled divisor with at most one additional high radix digit selection needed to reduce the partial remainder and augment the quotient to obtain the desired integer division result $ N = Q times D + R $ with $ 0 leq R leq D - 1 $.par We present a high radix multiplicative version of this algorithm where a $ k times p $ digit base $ beta $ rectangular aspect ratio multiplier allows quotient digit selection in radix $ beta ^k - 1 $ with a cost of only one $ k times p $ digit multiply per high radix digit, plus the fixed pre- and post-scaling operation costs. We also present a Booth radix $4$ additive version of this algorithm where appropriately compressed representation of the partial remainder with Booth digits $ - 2, - 1, 0, 1, 2 $ allows successive quotient digit selection from the leading partial remainder digit without the iterative table lookups required in SRT division.

rawabstract:
We describe a high radix integer division algorithm where the divisor is prescaled and the quotient is post-scaled without modifying the dividend to obtain an identity $ N = Q* \times D + R* $ with the quotient $ Q* $ differing from the desired integer quotient $Q$ only in its lowest order high radix digit. Here the ``oversized'' partial remainder $ R* $ is bounded by the scaled divisor with at most one additional high radix digit selection needed to reduce the partial remainder and augment the quotient to obtain the desired integer division result $ N = Q \times D + R $ with $ 0 \leq R \leq D - 1 $.\par We present a high radix multiplicative version of this algorithm where a $ k \times p $ digit base $ \beta $ rectangular aspect ratio multiplier allows quotient digit selection in radix $ \beta^{k - 1} $ with a cost of only one $ k \times p $ digit multiply per high radix digit, plus the fixed pre- and post-scaling operation costs. We also present a Booth radix $4$ additive version of this algorithm where appropriately compressed representation of the partial remainder with Booth digits $ \{ - 2, - 1, 0, 1, 2 \} $ allows successive quotient digit selection from the leading partial remainder digit without the iterative table lookups required in SRT division.

entry:
@InProceedings{Matula:2003:PID,
  author =       "David W. Matula and Alex Fit-Florea",
  title =        "Prescaled integer division",
  crossref =     "Bajard:2003:ISC",
  pages =        "63--68",
  year =         "2003",
  bibdate =      "Wed Nov 26 11:59:51 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Matula.pdf",
  abstract =     "We describe a high radix integer division algorithm
                 where the divisor is prescaled and the quotient is
                 post-scaled without modifying the dividend to obtain an
                 identity $ N = Q* \times D + R* $ with the quotient $
                 Q* $ differing from the desired integer quotient $Q$
                 only in its lowest order high radix digit. Here the
                 ``oversized'' partial remainder $ R* $ is bounded by
                 the scaled divisor with at most one additional high
                 radix digit selection needed to reduce the partial
                 remainder and augment the quotient to obtain the
                 desired integer division result $ N = Q \times D + R $
                 with $ 0 \leq R \leq D - 1 $.\par

                 We present a high radix multiplicative version of this
                 algorithm where a $ k \times p $ digit base $ \beta $
                 rectangular aspect ratio multiplier allows quotient
                 digit selection in radix $ \beta^{k - 1} $ with a cost
                 of only one $ k \times p $ digit multiply per high
                 radix digit, plus the fixed pre- and post-scaling
                 operation costs. We also present a Booth radix $4$
                 additive version of this algorithm where appropriately
                 compressed representation of the partial remainder with
                 Booth digits $ \{ - 2, - 1, 0, 1, 2 \} $ allows
                 successive quotient digit selection from the leading
                 partial remainder digit without the iterative table
                 lookups required in SRT division.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: McCann:2003:SDA
author: Mark McCann and Nicholas Pippenger
title: SRT division algorithms as dynamical systems
crossref: Bajard:2003:ISC
pages: 46--53
year: 2003
bibdate: Wed Nov 26 11:59:51 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 11:59:51 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_McCann.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Mark McCann and Nicholas Pippenger
rawtitle: {SRT} division algorithms as dynamical systems
abstract:
SRT division, as it was discovered in the late 1950s represented an important improvement in the speed of division algorithms for computers at the time. A variant of SRT division is still commonly implemented in computers today. Although some bounds on the performance of the original SRT division method were obtained, a great many questions remained unanswered. In this paper, the original version of SRT division is described as a dynamical system. This enables us to bring modern dynamical systems theory, a relatively new development in mathematics, to bear on an older problem. In doing so, we are able to show that SRT division is ergodic, and is even Bernoulli, for all real divisors and dividends. With the Bernoulli property, we are able to use entropy to prove that the natural extensions of SRT division are isomorphic by way of the Kolmogorov-Ornstein Theorem. We demonstrate how our methods and results can be applied to a much larger class of division algorithms.

rawabstract:
SRT division, as it was discovered in the late 1950s represented an important improvement in the speed of division algorithms for computers at the time. A variant of SRT division is still commonly implemented in computers today. Although some bounds on the performance of the original SRT division method were obtained, a great many questions remained unanswered. In this paper, the original version of SRT division is described as a dynamical system. This enables us to bring modern dynamical systems theory, a relatively new development in mathematics, to bear on an older problem. In doing so, we are able to show that SRT division is ergodic, and is even Bernoulli, for all real divisors and dividends. With the Bernoulli property, we are able to use entropy to prove that the natural extensions of SRT division are isomorphic by way of the Kolmogorov-Ornstein Theorem. We demonstrate how our methods and results can be applied to a much larger class of division algorithms.

entry:
@InProceedings{McCann:2003:SDA,
  author =       "Mark McCann and Nicholas Pippenger",
  title =        "{SRT} division algorithms as dynamical systems",
  crossref =     "Bajard:2003:ISC",
  pages =        "46--53",
  year =         "2003",
  bibdate =      "Wed Nov 26 11:59:51 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_McCann.pdf",
  abstract =     "SRT division, as it was discovered in the late 1950s
                 represented an important improvement in the speed of
                 division algorithms for computers at the time. A
                 variant of SRT division is still commonly implemented
                 in computers today. Although some bounds on the
                 performance of the original SRT division method were
                 obtained, a great many questions remained unanswered.
                 In this paper, the original version of SRT division is
                 described as a dynamical system. This enables us to
                 bring modern dynamical systems theory, a relatively new
                 development in mathematics, to bear on an older
                 problem. In doing so, we are able to show that SRT
                 division is ergodic, and is even Bernoulli, for all
                 real divisors and dividends. With the Bernoulli
                 property, we are able to use entropy to prove that the
                 natural extensions of SRT division are isomorphic by
                 way of the Kolmogorov-Ornstein Theorem. We demonstrate
                 how our methods and results can be applied to a much
                 larger class of division algorithms.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: article
filename: fparith.bib
label: Montgomery:2003:FEC
author: Peter L. Montgomery Kirsten Eisentrager, Kristin Lauter
title: Fast Elliptic Curve Arithmetic and Improved Weil Pairing Evaluation
journal: j-LECT-NOTES-COMP-SCI
volume: 2612
pages: 343--354
year: 2003
CODEN: LNCSD9
ISSN: 0302-9743 (print), 1611-3349 (electronic) OR 03029743 (print), 16113349 (electronic)
ISSNL: 0302-9743 OR 03029743
bibdate: Tue Apr 4 18:46:22 2006
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2006.04.04 18:46:22 ???
fjournal: Lecture Notes in Computer Science
keywords: cryptology; Topics in Cryptology CT-RSA 2003
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/bookseries/558
rawauthor: Peter L. Montgomery {Kirsten Eisentr{\"a}ger, Kristin Lauter}
rawtitle: Fast Elliptic Curve Arithmetic and Improved {Weil} Pairing Evaluation
entry:
@Article{Montgomery:2003:FEC,
  author =       "Peter L. Montgomery {Kirsten Eisentr{\"a}ger, Kristin
                 Lauter}",
  title =        "Fast Elliptic Curve Arithmetic and Improved {Weil}
                 Pairing Evaluation",
  journal =      j-LECT-NOTES-COMP-SCI,
  volume =       "2612",
  pages =        "343--354",
  year =         "2003",
  CODEN =        "LNCSD9",
  ISSN =         "0302-9743 (print), 1611-3349 (electronic)",
  ISSN-L =       "0302-9743",
  bibdate =      "Tue Apr 4 18:46:22 2006",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Lecture Notes in Computer Science",
  journal-URL =  "http://link.springer.com/bookseries/558",
  keywords =     "cryptology; Topics in Cryptology CT-RSA 2003",
}


bibtype: inproceedings
filename: fparith.bib
label: Muller:2003:SRS
author: Jean-Michel Muller
crossref: Bajard:2003:ISC
pages: 114--121
year: 2003
bibdate: Wed Nov 26 12:04:35 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:35 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Muller.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Jean-Michel Muller
title:
``Partially rounded'' small-order approximations for accurate, hardware-oriented, table-based methods

rawtitle:
{``Partially} rounded'' small-order approximations for accurate, hardware-oriented, table-based methods

entry:
@InProceedings{Muller:2003:SRS,
  author =       "Jean-Michel Muller",
  title =        "{``Partially} rounded'' small-order approximations for
                 accurate, hardware-oriented, table-based methods",
  crossref =     "Bajard:2003:ISC",
  pages =        "114--121",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:35 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Muller.pdf",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
  summary =      "We aim at evaluating elementary and special functions
                 using small tables and small, rectangular, multipliers.
                 To do that, we show how accurate polynomial
                 approximations whose order-1 coefficients are small in
                 size (a few bits only) can be computed. We compare the
                 obtained results with similar work in the recent
                 literature",
}


bibtype: inproceedings
filename: fparith.bib
label: Nannarelli:2003:PDT
author: A. Nannarelli and G. C. Cardarilli and M. Re
booktitle: ISCAS '03, Proceedings of the 2003 International Symposium on Circuits and Systems, 25--28 May 2003
title: Power-delay tradeoffs in residue number system
volume: 5
publisher: pub-IEEE
address: pub-IEEE:adr
pages: V-413--V-416
year: 2003
DOI: https://doi.org/10.1109/ISCAS.2003.1206300
bibdate: Fri Nov 9 11:38:59 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:59 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: A. Nannarelli and G. C. Cardarilli and M. Re
rawtitle: Power-delay tradeoffs in residue number system
rawbooktitle:
{ISCAS '03}, Proceedings of the 2003 International Symposium on Circuits and Systems, 25--28 May 2003

entry:
@InProceedings{Nannarelli:2003:PDT,
  author =       "A. Nannarelli and G. C. Cardarilli and M. Re",
  booktitle =    "{ISCAS '03}, Proceedings of the 2003 International
                 Symposium on Circuits and Systems, 25--28 May 2003",
  title =        "Power-delay tradeoffs in residue number system",
  volume =       "5",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "V-413--V-416",
  year =         "2003",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/ISCAS.2003.1206300",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:59 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "In this paper we present some tradeoffs between delay
                 and power consumption in the design of digital
                 processors based on the Residue Number System (RNS). We
                 focus on reducing the switching capacitance, and
                 therefore the power, in modular adders and \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Nievergelt:2003:SFM
author: Yves Nievergelt
journal: j-TOMS
volume: 29
number: 1
pages: 27--48
month: mar
monthnumber: 3
year: 2003
CODEN: ACMSCU
DOI: https://doi.org/10.1145/641876.641878
ISSN: 0098-3500 (print), 1557-7295 (electronic) OR 00983500 (print), 15577295 (electronic)
ISSNL: 0098-3500 OR 00983500
MRclass: 68W99 (65Y99 68M99)
MRnumber: MR2001452
bibdate: Fri Mar 28 08:17:55 MST 2003
bibsource: http://www.acm.org/pubs/contents/journals/toms/; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.03.28 08:17:55 MST
fjournal: ACM Transactions on Mathematical Software (TOMS)
acknowledgement: ack-nhfb
journalURL: https://dl.acm.org/loi/toms
rawauthor: Yves Nievergelt
title:
Scalar fused multiply-add instructions produce floating-point matrix arithmetic provably accurate to the penultimate digit

abstract:
Combined with doubly compensated summation, scalar fused multiply-add instructions redefine the concept of floating-point arithmetic, because they allow for the computation of sums of real or complex matrix products accurate to the penultimate digit. Particular cases include complex arithmetic, dot products, cross products, residuals of linear systems, determinants of small matrices, discriminants of quadratic, cubic, or quartic equations, and polynomials.

keywords:
accurate floating-point summation; algorithms; design; doubly compensated summation; floating-point arithmetic; fused multiply-add instruction; languages; matrix arithmetic; provable accuracy; rounding error; standardization; theory

subject:
Primary Classification: B. Hardware, B.2 ARITHMETIC AND LOGIC STRUCTURES, B.2.0 General; Additional Classification: B. Hardware, B.7 INTEGRATED CIRCUITS B.7.1 Types and Design Styles Subjects: Algorithms implemented in hardware B.8 Performance and Reliability B.8.2 Performance Analysis and Design Aids C. Computer Systems Organization C.0 GENERAL Subjects: Instruction set design (e.g., RISC, CISC, VLIW) F. Theory of Computation F.2 ANALYSIS OF ALGORITHMS AND PROBLEM COMPLEXITY F.2.1 Numerical Algorithms and Problems Subjects: Computations on matrices G. Mathematics of Computing G.1 NUMERICAL ANALYSIS G.1.0 General Subjects: Computer arithmetic; Multiple precision arithmetic; Numerical algorithms; Error analysis G.4 MATHEMATICAL SOFTWARE Subjects: Algorithm design and analysis; Certification and testing; Reliability and robustness

rawabstract:
Combined with doubly compensated summation, scalar fused multiply-add instructions redefine the concept of floating-point arithmetic, because they allow for the computation of sums of real or complex matrix products accurate to the penultimate digit. Particular cases include complex arithmetic, dot products, cross products, residuals of linear systems, determinants of small matrices, discriminants of quadratic, cubic, or quartic equations, and polynomials.

rawtitle:
Scalar fused multiply-add instructions produce floating-point matrix arithmetic provably accurate to the penultimate digit

entry:
@Article{Nievergelt:2003:SFM,
  author =       "Yves Nievergelt",
  title =        "Scalar fused multiply-add instructions produce
                 floating-point matrix arithmetic provably accurate to
                 the penultimate digit",
  journal =      j-TOMS,
  volume =       "29",
  number =       "1",
  pages =        "27--48",
  month =        mar,
  year =         "2003",
  CODEN =        "ACMSCU",
  DOI =          "https://doi.org/10.1145/641876.641878",
  ISSN =         "0098-3500 (print), 1557-7295 (electronic)",
  ISSN-L =       "0098-3500",
  MRclass =      "68W99 (65Y99 68M99)",
  MRnumber =     "MR2001452",
  bibdate =      "Fri Mar 28 08:17:55 MST 2003",
  bibsource =    "http://www.acm.org/pubs/contents/journals/toms/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "Combined with doubly compensated summation, scalar
                 fused multiply-add instructions redefine the concept of
                 floating-point arithmetic, because they allow for the
                 computation of sums of real or complex matrix products
                 accurate to the penultimate digit. Particular cases
                 include complex arithmetic, dot products, cross
                 products, residuals of linear systems, determinants of
                 small matrices, discriminants of quadratic, cubic, or
                 quartic equations, and polynomials.",
  acknowledgement = ack-nhfb,
  fjournal =     "ACM Transactions on Mathematical Software (TOMS)",
  journal-URL =  "https://dl.acm.org/loi/toms",
  keywords =     "accurate floating-point summation; algorithms; design;
                 doubly compensated summation; floating-point
                 arithmetic; fused multiply-add instruction; languages;
                 matrix arithmetic; provable accuracy; rounding error;
                 standardization; theory",
  subject =      "Primary Classification: B. Hardware, B.2 ARITHMETIC
                 AND LOGIC STRUCTURES, B.2.0 General;

                 Additional Classification: B. Hardware, B.7 INTEGRATED
                 CIRCUITS B.7.1 Types and Design Styles Subjects:
                 Algorithms implemented in hardware B.8 Performance and
                 Reliability B.8.2 Performance Analysis and Design
                 Aids

                 C. Computer Systems Organization C.0 GENERAL Subjects:
                 Instruction set design (e.g., RISC, CISC, VLIW)

                 F. Theory of Computation F.2 ANALYSIS OF ALGORITHMS AND
                 PROBLEM COMPLEXITY F.2.1 Numerical Algorithms and
                 Problems Subjects: Computations on matrices

                 G. Mathematics of Computing G.1 NUMERICAL ANALYSIS
                 G.1.0 General Subjects: Computer arithmetic; Multiple
                 precision arithmetic; Numerical algorithms; Error
                 analysis G.4 MATHEMATICAL SOFTWARE Subjects: Algorithm
                 design and analysis; Certification and testing;
                 Reliability and robustness",
}


bibtype: article
filename: fparith.bib
label: Okeya:2003:WNM
author: Katsuyuki Okeya and Tsuyoshi Takagi
journal: j-LECT-NOTES-COMP-SCI
volume: 2612
pages: 328--342
year: 2003
CODEN: LNCSD9
ISSN: 0302-9743 (print), 1611-3349 (electronic) OR 03029743 (print), 16113349 (electronic)
ISSNL: 0302-9743 OR 03029743
bibdate: Tue Apr 4 18:46:22 2006
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2006.04.04 18:46:22 ???
fjournal: Lecture Notes in Computer Science
keywords: cryptology; Topics in Cryptology CT-RSA 2003
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/bookseries/558
rawauthor: Katsuyuki Okeya and Tsuyoshi Takagi
title:
The Width-$w$ NAF Method Provides Small Memory and Fast Elliptic Scalar Multiplications Secure against Side Channel Attacks

rawtitle:
The Width-$w$ {NAF} Method Provides Small Memory and Fast Elliptic Scalar Multiplications Secure against Side Channel Attacks

entry:
@Article{Okeya:2003:WNM,
  author =       "Katsuyuki Okeya and Tsuyoshi Takagi",
  title =        "The Width-$w$ {NAF} Method Provides Small Memory and
                 Fast Elliptic Scalar Multiplications Secure against
                 Side Channel Attacks",
  journal =      j-LECT-NOTES-COMP-SCI,
  volume =       "2612",
  pages =        "328--342",
  year =         "2003",
  CODEN =        "LNCSD9",
  ISSN =         "0302-9743 (print), 1611-3349 (electronic)",
  ISSN-L =       "0302-9743",
  bibdate =      "Tue Apr 4 18:46:22 2006",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Lecture Notes in Computer Science",
  journal-URL =  "http://link.springer.com/bookseries/558",
  keywords =     "cryptology; Topics in Cryptology CT-RSA 2003",
}


bibtype: inproceedings
filename: fparith.bib
label: Oklobdzija:2003:EDE
author: Vojin G. Oklobdzija and Bart R. Zeydel and Hoang Dao and Sanu Mathew and Ram Krishnamurthy
title: Energy-delay estimation technique for high-performance microprocessor VLSI adders
crossref: Bajard:2003:ISC
pages: 272--279
year: 2003
bibdate: Wed Nov 26 12:04:40 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:40 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Oklobdzija.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Vojin G. Oklobdzija and Bart R. Zeydel and Hoang Dao and Sanu Mathew and Ram Krishnamurthy
rawtitle: Energy-delay estimation technique for high-performance microprocessor {VLSI} adders
abstract:
In this paper, we motivate the concept of comparing VLSI adders based on their energy-delay trade-offs and present a technique for estimating the energy-delay space of various high-performance VLSI adder topologies. Further, we show that our estimates accurately represent tradeoffs in the energy-delay space for high-performance 32-bit and 64-bit processor adders in 0.13mm and 0.10mm CMOS technologies, with an accuracy of 8% in delay estimates and 20% in energy estimates, compared with simulated data.

rawabstract:
In this paper, we motivate the concept of comparing VLSI adders based on their energy-delay trade-offs and present a technique for estimating the energy-delay space of various high-performance VLSI adder topologies. Further, we show that our estimates accurately represent tradeoffs in the energy-delay space for high-performance 32-bit and 64-bit processor adders in 0.13mm and 0.10mm CMOS technologies, with an accuracy of 8\% in delay estimates and 20\% in energy estimates, compared with simulated data.

entry:
@InProceedings{Oklobdzija:2003:EDE,
  author =       "Vojin G. Oklobdzija and Bart R. Zeydel and Hoang Dao
                 and Sanu Mathew and Ram Krishnamurthy",
  title =        "Energy-delay estimation technique for high-performance
                 microprocessor {VLSI} adders",
  crossref =     "Bajard:2003:ISC",
  pages =        "272--279",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:40 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Oklobdzija.pdf",
  abstract =     "In this paper, we motivate the concept of comparing
                 VLSI adders based on their energy-delay trade-offs and
                 present a technique for estimating the energy-delay
                 space of various high-performance VLSI adder
                 topologies. Further, we show that our estimates
                 accurately represent tradeoffs in the energy-delay
                 space for high-performance 32-bit and 64-bit processor
                 adders in 0.13mm and 0.10mm CMOS technologies, with an
                 accuracy of 8\% in delay estimates and 20\% in energy
                 estimates, compared with simulated data.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: Oklobdzija:2003:TDP
author: V. G. Oklobdzija and R. Krishnamurthy
title: Tutorial: Design of power efficient VLSI arithmetic: speed and power trade-offs
crossref: Bajard:2003:ISC
pages: 280--280
year: 2003
bibdate: Wed Nov 26 12:04:40 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:40 MST
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: V. G. Oklobdzija and R. Krishnamurthy
rawtitle: Tutorial: Design of power efficient {VLSI} arithmetic: speed and power trade-offs
entry:
@InProceedings{Oklobdzija:2003:TDP,
  author =       "V. G. Oklobdzija and R. Krishnamurthy",
  title =        "Tutorial: Design of power efficient {VLSI} arithmetic:
                 speed and power trade-offs",
  crossref =     "Bajard:2003:ISC",
  pages =        "280--280",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:40 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: article
filename: fparith.bib
label: ORourke:2003:ANM
author: C. O'Rourke and B. Sunar
title: Achieving NTRU with Montgomery multiplication
journal: j-IEEE-TRANS-COMPUT
volume: 52
number: 4
pages: 440--448
month: apr
monthnumber: 4
year: 2003
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2003.1190585
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:52:46 MDT 2011
bibtimestamp: 2011.07.05 08:52:46 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1190585
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: C. O'Rourke and B. Sunar
rawtitle: Achieving {NTRU} with {Montgomery} multiplication
entry:
@Article{ORourke:2003:ANM,
  author =       "C. O'Rourke and B. Sunar",
  title =        "Achieving {NTRU} with {Montgomery} multiplication",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "52",
  number =       "4",
  pages =        "440--448",
  month =        apr,
  year =         "2003",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2003.1190585",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:52:46 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1190585",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Parhami:2003:TUB
author: B. Parhami
journal: j-IEEE-TRANS-COMPUT
volume: 52
number: 11
pages: 1509--1514
month: nov
monthnumber: 11
year: 2003
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2003.1244949
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:52:58 MDT 2011
bibtimestamp: 2011.07.05 08:52:58 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1244949
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: B. Parhami
title:
Tight upper bounds on the minimum precision required of the divisor and the partial remainder in high-radix division

rawtitle:
Tight upper bounds on the minimum precision required of the divisor and the partial remainder in high-radix division

entry:
@Article{Parhami:2003:TUB,
  author =       "B. Parhami",
  title =        "Tight upper bounds on the minimum precision required
                 of the divisor and the partial remainder in high-radix
                 division",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "52",
  number =       "11",
  pages =        "1509--1514",
  month =        nov,
  year =         "2003",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2003.1244949",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:52:58 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1244949",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Paschalakis:2003:DPF
author: S. Paschalakis and P. Lee
title: Double precision floating-point arithmetic on FPGAs
crossref: IEEE:2003:IICb
pages: 352--358
year: 2003
DOI: https://doi.org/10.1109/FPT.2003.1275775
bibdate: Sat Oct 9 12:57:30 2010
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2010.10.09 12:57:30 ???
acknowledgement: ack-nhfb
rawauthor: S. Paschalakis and P. Lee
rawtitle: Double precision floating-point arithmetic on {FPGAs}
abstract:
We present low cost FPGA floating-point arithmetic circuits for all the common operations, i.e. addition/subtraction, multiplication, division and square root. Such circuits can be extremely useful in the FPGA implementation of complex systems that benefit from the reprogrammability and parallelism of the FPGA device but also require a general purpose arithmetic unit. While previous work has considered circuits for low precision floating-point formats, we consider the implementation of 64-bit double precision circuits that also provide rounding and exception handling.

rawabstract:
We present low cost FPGA floating-point arithmetic circuits for all the common operations, i.e. addition/subtraction, multiplication, division and square root. Such circuits can be extremely useful in the FPGA implementation of complex systems that benefit from the reprogrammability and parallelism of the FPGA device but also require a general purpose arithmetic unit. While previous work has considered circuits for low precision floating-point formats, we consider the implementation of 64-bit double precision circuits that also provide rounding and exception handling.

entry:
@InProceedings{Paschalakis:2003:DPF,
  author =       "S. Paschalakis and P. Lee",
  title =        "Double precision floating-point arithmetic on
                 {FPGAs}",
  crossref =     "IEEE:2003:IICb",
  pages =        "352--358",
  year =         "2003",
  DOI =          "https://doi.org/10.1109/FPT.2003.1275775",
  bibdate =      "Sat Oct 9 12:57:30 2010",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "We present low cost FPGA floating-point arithmetic
                 circuits for all the common operations, i.e.
                 addition/subtraction, multiplication, division and
                 square root. Such circuits can be extremely useful in
                 the FPGA implementation of complex systems that benefit
                 from the reprogrammability and parallelism of the FPGA
                 device but also require a general purpose arithmetic
                 unit. While previous work has considered circuits for
                 low precision floating-point formats, we consider the
                 implementation of 64-bit double precision circuits that
                 also provide rounding and exception handling.",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Percival:2003:RMM
author: Colin Percival
title: Rapid multiplication modulo the sum and difference of highly composite numbers
journal: j-MATH-COMPUT
volume: 72
number: 241
pages: 387--395
month: jan
monthnumber: 1
year: 2003
CODEN: MCMPAF
ISSN: 0025-5718 (print), 1088-6842 (electronic) OR 00255718 (print), 10886842 (electronic)
ISSNL: 0025-5718 OR 00255718
bibdate: Fri Nov 22 10:22:27 MST 2002
bibsource: http://www.ams.org/mcom/2003-72-241; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2002.11.22 10:22:27 MST
fjournal: Mathematics of Computation
acknowledgement: ack-nhfb
ajournal: Math. Comput.
journalURL: http://www.ams.org/mcom/
rawauthor: Colin Percival
rawtitle: Rapid multiplication modulo the sum and difference of highly composite numbers
URL:
http://www.ams.org/journal-getitem?pii=S0025-5718-02-01419-9; http://www.ams.org/mcom/2003-72-241/S0025-5718-02-01419-9/S0025-5718-02-01419-9.dvi; http://www.ams.org/mcom/2003-72-241/S0025-5718-02-01419-9/S0025-5718-02-01419-9.pdf; http://www.ams.org/mcom/2003-72-241/S0025-5718-02-01419-9/S0025-5718-02-01419-9.ps; http://www.ams.org/mcom/2003-72-241/S0025-5718-02-01419-9/S0025-5718-02-01419-9.tex

abstract:
We extend the work of Richard Crandall et al. to demonstrate how the Discrete Weighted Transform (DWT) can be applied to speed up multiplication modulo any number of the form $ a pm b $ where $ prod _p vert abp $ is small. In particular this allows rapid computation modulo numbers of the form $ k cdot 2^n pm 1 $.par In addition, we prove tight bounds on the rounding errors which naturally occur in floating-point implementations of FFT and DWT multiplications. This makes it possible for FFT multiplications to be used in situations where correctness is essential, for example in computer algebra packages.

rawabstract:
We extend the work of Richard Crandall et al. to demonstrate how the Discrete Weighted Transform (DWT) can be applied to speed up multiplication modulo any number of the form $ a \pm b $ where $ \prod_{p \vert ab}{p} $ is small. In particular this allows rapid computation modulo numbers of the form $ k \cdot 2^n \pm 1 $.\par In addition, we prove tight bounds on the rounding errors which naturally occur in floating-point implementations of FFT and DWT multiplications. This makes it possible for FFT multiplications to be used in situations where correctness is essential, for example in computer algebra packages.

entry:
@Article{Percival:2003:RMM,
  author =       "Colin Percival",
  title =        "Rapid multiplication modulo the sum and difference of
                 highly composite numbers",
  journal =      j-MATH-COMPUT,
  volume =       "72",
  number =       "241",
  pages =        "387--395",
  month =        jan,
  year =         "2003",
  CODEN =        "MCMPAF",
  ISSN =         "0025-5718 (print), 1088-6842 (electronic)",
  ISSN-L =       "0025-5718",
  bibdate =      "Fri Nov 22 10:22:27 MST 2002",
  bibsource =    "http://www.ams.org/mcom/2003-72-241;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.ams.org/journal-getitem?pii=S0025-5718-02-01419-9;
                 http://www.ams.org/mcom/2003-72-241/S0025-5718-02-01419-9/S0025-5718-02-01419-9.dvi;
                 http://www.ams.org/mcom/2003-72-241/S0025-5718-02-01419-9/S0025-5718-02-01419-9.pdf;
                 http://www.ams.org/mcom/2003-72-241/S0025-5718-02-01419-9/S0025-5718-02-01419-9.ps;
                 http://www.ams.org/mcom/2003-72-241/S0025-5718-02-01419-9/S0025-5718-02-01419-9.tex",
  abstract =     "We extend the work of Richard Crandall et al. to
                 demonstrate how the Discrete Weighted Transform (DWT)
                 can be applied to speed up multiplication modulo any
                 number of the form $ a \pm b $ where $ \prod_{p \vert
                 ab}{p} $ is small. In particular this allows rapid
                 computation modulo numbers of the form $ k \cdot 2^n
                 \pm 1 $.\par

                 In addition, we prove tight bounds on the rounding
                 errors which naturally occur in floating-point
                 implementations of FFT and DWT multiplications. This
                 makes it possible for FFT multiplications to be used in
                 situations where correctness is essential, for example
                 in computer algebra packages.",
  acknowledgement = ack-nhfb,
  ajournal =     "Math. Comput.",
  fjournal =     "Mathematics of Computation",
  journal-URL =  "http://www.ams.org/mcom/",
}


bibtype: inproceedings
filename: fparith.bib
label: Phillips:2003:SRR
author: B. Phillips
booktitle: Conference Record of the Thirty-Seventh Asilomar Conference on Signals, Systems and Computers, 2003
title: Scaling and reduction in the residue number system with pairs of conjugate moduli
volume: 2
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 2247--2251
year: 2003
DOI: https://doi.org/10.1109/ACSSC.2003.1292380
bibdate: Fri Nov 9 11:38:59 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:59 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: B. Phillips
rawbooktitle: Conference Record of the Thirty-Seventh Asilomar Conference on Signals, Systems and Computers, 2003
rawtitle: Scaling and reduction in the residue number system with pairs of conjugate moduli
entry:
@InProceedings{Phillips:2003:SRR,
  author =       "B. Phillips",
  booktitle =    "Conference Record of the Thirty-Seventh Asilomar
                 Conference on Signals, Systems and Computers, 2003",
  title =        "Scaling and reduction in the residue number system
                 with pairs of conjugate moduli",
  volume =       "2",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "2247--2251",
  year =         "2003",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/ACSSC.2003.1292380",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:59 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "The residue number system (RNS) with pairs of
                 conjugate moduli uses a modulus set containing pairs of
                 moduli of the form {2/sup k/-1, 2/sup k/+1}. This RNS
                 provides a good trade-off between large dynamic range
                 and channel width. It also supports \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Pineiro:2003:HRI
author: J.-A. Pineiro and M. D. Ercegovac and J. D. Bruguera
title: High-radix iterative algorithm for powering computation
crossref: Bajard:2003:ISC
pages: 204--211
year: 2003
bibdate: Wed Nov 26 12:04:35 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:35 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Pineiro.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: J.-A. Pi{\~n}eiro and M. D. Ercegovac and J. D. Bruguera
rawtitle: High-radix iterative algorithm for powering computation
abstract:
A high-radix composite algorithm for the computation of the powering function ($ X^Y $) is presented in this paper. The algorithm consists of a sequence of overlapped operations: (i) digit-recurrence logarithm, (ii) left-to-right carry-free (LRCF) multiplications, and (iii) on-line exponential. A redundant number system is used, and the selection in (i) and (iii) is done by rounding except from the first iteration, when selection by table look-up is necessary to guarantee the convergence of the recurrences. A sequential implementation of the algorithm is proposed, and the execution times and hardware requirements are estimated for single and double-precision floating-point computations, for radix $ r = 128 $ showing that powering can be computed with similar performance as high-radix CORDIC algorithms.

rawabstract:
A high-radix composite algorithm for the computation of the powering function ($ X^Y $) is presented in this paper. The algorithm consists of a sequence of overlapped operations: (i) digit-recurrence logarithm, (ii) left-to-right carry-free (LRCF) multiplications, and (iii) on-line exponential. A redundant number system is used, and the selection in (i) and (iii) is done by rounding except from the first iteration, when selection by table look-up is necessary to guarantee the convergence of the recurrences. A sequential implementation of the algorithm is proposed, and the execution times and hardware requirements are estimated for single and double-precision floating-point computations, for radix $ r = 128 $ showing that powering can be computed with similar performance as high-radix CORDIC algorithms.

entry:
@InProceedings{Pineiro:2003:HRI,
  author =       "J.-A. Pi{\~n}eiro and M. D. Ercegovac and J. D.
                 Bruguera",
  title =        "High-radix iterative algorithm for powering
                 computation",
  crossref =     "Bajard:2003:ISC",
  pages =        "204--211",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:35 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Pineiro.pdf",
  abstract =     "A high-radix composite algorithm for the computation
                 of the powering function ($ X^Y $) is presented in this
                 paper. The algorithm consists of a sequence of
                 overlapped operations: (i) digit-recurrence logarithm,
                 (ii) left-to-right carry-free (LRCF) multiplications,
                 and (iii) on-line exponential. A redundant number
                 system is used, and the selection in (i) and (iii) is
                 done by rounding except from the first iteration, when
                 selection by table look-up is necessary to guarantee
                 the convergence of the recurrences. A sequential
                 implementation of the algorithm is proposed, and the
                 execution times and hardware requirements are estimated
                 for single and double-precision floating-point
                 computations, for radix $ r = 128 $ showing that
                 powering can be computed with similar performance as
                 high-radix CORDIC algorithms.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: Pineiro:2003:LHR
author: J.-A. Pineiro and J. D. Bruguera and M. D. Ercegovac
title: On-line high-radix exponential with selection by rounding
volume: 4
publisher: pub-IEEE
address: pub-IEEE:adr
pages: IV-121--IV-124
year: 2003
bibdate: Sat Jul 16 11:25:05 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 11:25:05 MDT
acknowledgement: ack-nhfb
rawauthor: J.-A. Pineiro and J. D. Bruguera and M. D. Ercegovac
rawtitle: On-line high-radix exponential with selection by rounding
booktitle:
2003. ISCAS '03. Proceedings of the 2003 International Symposium on Circuits and Systems. 25--28 May 2003

rawbooktitle:
2003. {ISCAS '03}. Proceedings of the 2003 International Symposium on Circuits and Systems. 25--28 May 2003

entry:
@InProceedings{Pineiro:2003:LHR,
  author =       "J.-A. Pineiro and J. D. Bruguera and M. D. Ercegovac",
  booktitle =    "2003. {ISCAS '03}. Proceedings of the 2003
                 International Symposium on Circuits and Systems. 25--28
                 May 2003",
  title =        "On-line high-radix exponential with selection by
                 rounding",
  volume =       "4",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "IV-121--IV-124",
  year =         "2003",
  CODEN =        "????",
  ISSN =         "????",
  bibdate =      "Sat Jul 16 11:25:05 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  summary =      "An on-line high-radix algorithm for computing the
                 exponential function ($e^x$) with arbitrary precision
                 $n$ is presented. Selection by rounding and a redundant
                 digit-set for the digits $e_j$ are used, with selection
                 by table in the first \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Reyhani-Masoleh:2003:EMB
author: A. Reyhani-Masoleh and M. A. Hasan
title: Efficient multiplication beyond optimal normal bases
journal: j-IEEE-TRANS-COMPUT
volume: 52
number: 4
pages: 428--439
month: apr
monthnumber: 4
year: 2003
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2003.1190584
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:52:46 MDT 2011
bibtimestamp: 2011.07.05 08:52:46 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1190584
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: A. Reyhani-Masoleh and M. A. Hasan
rawtitle: Efficient multiplication beyond optimal normal bases
entry:
@Article{Reyhani-Masoleh:2003:EMB,
  author =       "A. Reyhani-Masoleh and M. A. Hasan",
  title =        "Efficient multiplication beyond optimal normal bases",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "52",
  number =       "4",
  pages =        "428--439",
  month =        apr,
  year =         "2003",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2003.1190584",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:52:46 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1190584",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Reyhani-Masoleh:2003:FNB
author: A. Reyhani-Masoleh and M. A. Hasan
title: Fast normal basis multiplication using general purpose processors
journal: j-IEEE-TRANS-COMPUT
volume: 52
number: 11
pages: 1379--1390
month: nov
monthnumber: 11
year: 2003
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2003.1244936
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:52:57 MDT 2011
bibtimestamp: 2011.07.05 08:52:57 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1244936
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: A. Reyhani-Masoleh and M. A. Hasan
rawtitle: Fast normal basis multiplication using general purpose processors
entry:
@Article{Reyhani-Masoleh:2003:FNB,
  author =       "A. Reyhani-Masoleh and M. A. Hasan",
  title =        "Fast normal basis multiplication using general purpose
                 processors",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "52",
  number =       "11",
  pages =        "1379--1390",
  month =        nov,
  year =         "2003",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2003.1244936",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:52:57 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1244936",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Reyhani-Masoleh:2003:LCB
author: Arash Reyhani-Masoleh and M. Anwar Hasan
title: On Low Complexity Bit Parallel Polynomial Basis Multipliers
journal: j-LECT-NOTES-COMP-SCI
volume: 2779
pages: 189--202
year: 2003
CODEN: LNCSD9
ISSN: 0302-9743 (print), 1611-3349 (electronic) OR 03029743 (print), 16113349 (electronic)
ISSNL: 0302-9743 OR 03029743
bibdate: Tue Apr 4 18:12:50 2006
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2006.04.04 18:12:50 ???
fjournal: Lecture Notes in Computer Science
keywords: CHES 2003; cryptography
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/bookseries/558
rawauthor: Arash Reyhani-Masoleh and M. Anwar Hasan
rawtitle: On Low Complexity Bit Parallel Polynomial Basis Multipliers
entry:
@Article{Reyhani-Masoleh:2003:LCB,
  author =       "Arash Reyhani-Masoleh and M. Anwar Hasan",
  title =        "On Low Complexity Bit Parallel Polynomial Basis
                 Multipliers",
  journal =      j-LECT-NOTES-COMP-SCI,
  volume =       "2779",
  pages =        "189--202",
  year =         "2003",
  CODEN =        "LNCSD9",
  ISSN =         "0302-9743 (print), 1611-3349 (electronic)",
  ISSN-L =       "0302-9743",
  bibdate =      "Tue Apr 4 18:12:50 2006",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Lecture Notes in Computer Science",
  journal-URL =  "http://link.springer.com/bookseries/558",
  keywords =     "CHES 2003; cryptography",
}


bibtype: inproceedings
filename: fparith.bib
label: Reyhani-Masoleh:2003:LCS
author: Arash Reyhani-Masoleh and M. Anwar Hasan
title: Low complexity sequential normal basis multipliers over $ mathrm GF(2^m) $
crossref: Bajard:2003:ISC
pages: 188--195
year: 2003
bibdate: Wed Nov 26 12:04:35 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:35 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Reyhani-Masoleh.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Arash Reyhani-Masoleh and M. Anwar Hasan
rawtitle: Low complexity sequential normal basis multipliers over {$ \mathrm {GF}(2^m) $}
abstract:
For efficient hardware implementation of finite field arithmetic units, the use of a normal basis is advantageous. In this article, two architectures for multipliers over the finite field $ mathrm GF(2^m) $ are proposed. Both of these multipliers are of sequential type --- after receiving the coordinates of the two input field elements, they go through $m$ iterations (or clock cycles) to finally yield all the coordinates of the product in parallel. These multipliers are highly area efficient and require fewer number of logic gates even when compared with the most area efficient multiplier available in the open literature. This makes the proposed multipliers suitable for applications where the value of is large but space is of concern, e.g., resource constrained cryptographic systems. Additionally, the AND gate count for one of the multipliers is $ floor m / 2 + 1 $ only. This implies that if the multiplication over $ mathrm GF(2^m) $ is performed using a suitable subfield $ mathrm GF(2^n) $ where $ n > 1 $ and $ n | m $, then the corresponding multiplier architecture will yield a highly efficient digit or word serial multiplier.

rawabstract:
For efficient hardware implementation of finite field arithmetic units, the use of a normal basis is advantageous. In this article, two architectures for multipliers over the finite field $ \mathrm {GF}(2^m) $ are proposed. Both of these multipliers are of sequential type --- after receiving the coordinates of the two input field elements, they go through $m$ iterations (or clock cycles) to finally yield all the coordinates of the product in parallel. These multipliers are highly area efficient and require fewer number of logic gates even when compared with the most area efficient multiplier available in the open literature. This makes the proposed multipliers suitable for applications where the value of is large but space is of concern, e.g., resource constrained cryptographic systems. Additionally, the AND gate count for one of the multipliers is $ \floor {m / 2} + 1 $ only. This implies that if the multiplication over $ \mathrm {GF}(2^m) $ is performed using a suitable subfield $ \mathrm {GF}(2^n) $ where $ n > 1 $ and $ n | m $, then the corresponding multiplier architecture will yield a highly efficient digit or word serial multiplier.

entry:
@InProceedings{Reyhani-Masoleh:2003:LCS,
  author =       "Arash Reyhani-Masoleh and M. Anwar Hasan",
  title =        "Low complexity sequential normal basis multipliers
                 over {$ \mathrm {GF}(2^m) $}",
  crossref =     "Bajard:2003:ISC",
  pages =        "188--195",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:35 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Reyhani-Masoleh.pdf",
  abstract =     "For efficient hardware implementation of finite field
                 arithmetic units, the use of a normal basis is
                 advantageous. In this article, two architectures for
                 multipliers over the finite field $ \mathrm {GF}(2^m) $
                 are proposed. Both of these multipliers are of
                 sequential type --- after receiving the coordinates of
                 the two input field elements, they go through $m$
                 iterations (or clock cycles) to finally yield all the
                 coordinates of the product in parallel. These
                 multipliers are highly area efficient and require fewer
                 number of logic gates even when compared with the most
                 area efficient multiplier available in the open
                 literature. This makes the proposed multipliers
                 suitable for applications where the value of is large
                 but space is of concern, e.g., resource constrained
                 cryptographic systems. Additionally, the AND gate count
                 for one of the multipliers is $ \floor {m / 2} + 1 $
                 only. This implies that if the multiplication over $
                 \mathrm {GF}(2^m) $ is performed using a suitable
                 subfield $ \mathrm {GF}(2^n) $ where $ n > 1 $ and $ n
                 | m $, then the corresponding multiplier architecture
                 will yield a highly efficient digit or word serial
                 multiplier.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: Rice:2003:NIS
author: Eric Rice and Richard Hughey
title: A new iterative structure for hardware division: the parallel paths algorithm
crossref: Bajard:2003:ISC
pages: 54--62
year: 2003
bibdate: Wed Nov 26 11:59:51 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 11:59:51 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Rice.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Eric Rice and Richard Hughey
rawtitle: A new iterative structure for hardware division: the parallel paths algorithm
abstract:
This paper presents a new approach to hardware division --- the parallel paths algorithm. In this approach, prescaling allows the division recurrence to be implemented by three processes which can be calculated in parallel during iterations. While two of the processes must complete in a single iteration, the third --- which includes the most expensive division operations --- can be calculated over multiple iterations. Iteration latency is determined by the slowest of the three paths, and in many cases can be limited to that of carry-save addition and latching. A radix-4 implementation of the algorithm is shown to achieve better performance than other commonly used methods while requiring a modest increase in area.

rawabstract:
This paper presents a new approach to hardware division --- the parallel paths algorithm. In this approach, prescaling allows the division recurrence to be implemented by three processes which can be calculated in parallel during iterations. While two of the processes must complete in a single iteration, the third --- which includes the most expensive division operations --- can be calculated over multiple iterations. Iteration latency is determined by the slowest of the three paths, and in many cases can be limited to that of carry-save addition and latching. A radix-4 implementation of the algorithm is shown to achieve better performance than other commonly used methods while requiring a modest increase in area.

entry:
@InProceedings{Rice:2003:NIS,
  author =       "Eric Rice and Richard Hughey",
  title =        "A new iterative structure for hardware division: the
                 parallel paths algorithm",
  crossref =     "Bajard:2003:ISC",
  pages =        "54--62",
  year =         "2003",
  bibdate =      "Wed Nov 26 11:59:51 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Rice.pdf",
  abstract =     "This paper presents a new approach to hardware
                 division --- the parallel paths algorithm. In this
                 approach, prescaling allows the division recurrence to
                 be implemented by three processes which can be
                 calculated in parallel during iterations. While two of
                 the processes must complete in a single iteration, the
                 third --- which includes the most expensive division
                 operations --- can be calculated over multiple
                 iterations. Iteration latency is determined by the
                 slowest of the three paths, and in many cases can be
                 limited to that of carry-save addition and latching. A
                 radix-4 implementation of the algorithm is shown to
                 achieve better performance than other commonly used
                 methods while requiring a modest increase in area.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: article
filename: fparith.bib
label: Rodriguez-Henriquez:2003:PMB
author: F. Rodriguez-Henriquez and C. K. Koc
title: Parallel multipliers based on special irreducible pentanomials
journal: j-IEEE-TRANS-COMPUT
volume: 52
number: 12
pages: 1535--1542
month: dec
monthnumber: 12
year: 2003
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2003.1252850
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:52:59 MDT 2011
bibtimestamp: 2011.07.05 08:52:59 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1252850
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: F. Rodriguez-Henriquez and {\c{C}}. K. Ko{\c{c}}
rawtitle: Parallel multipliers based on special irreducible pentanomials
entry:
@Article{Rodriguez-Henriquez:2003:PMB,
  author =       "F. Rodriguez-Henriquez and {\c{C}}. K. Ko{\c{c}}",
  title =        "Parallel multipliers based on special irreducible
                 pentanomials",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "52",
  number =       "12",
  pages =        "1535--1542",
  month =        dec,
  year =         "2003",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2003.1252850",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:52:59 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1252850",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Schonfelder:2003:VPA
author: J. L. Schonfelder
title: Variable precision arithmetic: a Fortran 95 module
journal: j-SCI-PROG
volume: 11
number: 1
pages: 67--76
year: 2003
CODEN: SCIPEV
ISSN: 1058-9244 (print), 1875-919X (electronic) OR 10589244 (print), 1875919X (electronic)
ISSNL: 1058-9244 OR 10589244
bibdate: Mon Jan 12 06:28:15 MST 2004
bibsource: http://www.iospress.nl/site/html/10589244.html; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.01.12 06:28:15 MST
fjournal: Scientific Programming
acknowledgement: ack-nhfb
journalURL: http://iospress.metapress.com/content/1058-9244
rawauthor: J. L. Schonfelder
rawtitle: Variable precision arithmetic: a {Fortran 95} module
entry:
@Article{Schonfelder:2003:VPA,
  author =       "J. L. Schonfelder",
  title =        "Variable precision arithmetic: a {Fortran 95} module",
  journal =      j-SCI-PROG,
  volume =       "11",
  number =       "1",
  pages =        "67--76",
  year =         "2003",
  CODEN =        "SCIPEV",
  ISSN =         "1058-9244 (print), 1875-919X (electronic)",
  ISSN-L =       "1058-9244",
  bibdate =      "Mon Jan 12 06:28:15 MST 2004",
  bibsource =    "http://www.iospress.nl/site/html/10589244.html;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Scientific Programming",
  journal-URL =  "http://iospress.metapress.com/content/1058-9244",
}


bibtype: inproceedings
filename: fparith.bib
label: Schulte:2003:CMS
author: M. J. Schulte and L. P. Marquette and S. Krithivasan and E. G. Walters and J. Glossner
title: Combined Multiplication and Sum of Squares Units
crossref: Deprettere:2003:IIC
pages: 204--214
year: 2003
bibdate: Sun Mar 04 20:46:13 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.03.04 20:46:13 ???
URL: http://mesa.ece.wisc.edu/publications/cp_2003-02.pdf
remark: One of three finalists for the best paper award.
acknowledgement: ack-nhfb
rawauthor: M. J. Schulte and L. P. Marquette and S. Krithivasan and E. G. Walters and J. Glossner
rawtitle: Combined Multiplication and Sum of Squares Units
entry:
@InProceedings{Schulte:2003:CMS,
  author =       "M. J. Schulte and L. P. Marquette and S. Krithivasan
                 and E. G. Walters and J. Glossner",
  title =        "Combined Multiplication and Sum of Squares Units",
  crossref =     "Deprettere:2003:IIC",
  pages =        "204--214",
  year =         "2003",
  bibdate =      "Sun Mar 04 20:46:13 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://mesa.ece.wisc.edu/publications/cp_2003-02.pdf",
  acknowledgement = ack-nhfb,
  remark =       "One of three finalists for the best paper award.",
}


bibtype: inproceedings
filename: fparith.bib
label: Schwarz:2003:HID
author: Eric M. Schwarz and Martin Schmookler and Son Dao Trong
title: Hardware implementations of denormalized numbers
crossref: Bajard:2003:ISC
pages: 70--78
year: 2003
DOI: https://doi.org/10.1109/ARITH.2003.1207662
bibdate: Wed Nov 26 11:59:51 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 11:59:51 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Schwarz.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Eric M. Schwarz and Martin Schmookler and Son Dao Trong
rawtitle: Hardware implementations of denormalized numbers
abstract:
Denormalized numbers are the most difficult type of numbers to implement in floating-point units. They are so complex that some designs have elected to handle them in software rather than in hardware. This has results in execution times in the tens of thousands of cycle, which as made denormalized numbers useless to programmers. This does not have to happen. With a small amount of additional hardware, denormalized numbers and underflows can be handled close to the speed of normalized numbers. Most of the techniques discussed here have only been discussed in filed or pending patent applications.

rawabstract:
Denormalized numbers are the most difficult type of numbers to implement in floating-point units. They are so complex that some designs have elected to handle them in software rather than in hardware. This has results in execution times in the tens of thousands of cycle, which as made denormalized numbers useless to programmers. This does not have to happen. With a small amount of additional hardware, denormalized numbers and underflows can be handled close to the speed of normalized numbers. Most of the techniques discussed here have only been discussed in filed or pending patent applications.

entry:
@InProceedings{Schwarz:2003:HID,
  author =       "Eric M. Schwarz and Martin Schmookler and Son Dao
                 Trong",
  title =        "Hardware implementations of denormalized numbers",
  crossref =     "Bajard:2003:ISC",
  pages =        "70--78",
  year =         "2003",
  DOI =          "https://doi.org/10.1109/ARITH.2003.1207662",
  bibdate =      "Wed Nov 26 11:59:51 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Schwarz.pdf",
  abstract =     "Denormalized numbers are the most difficult type of
                 numbers to implement in floating-point units. They are
                 so complex that some designs have elected to handle
                 them in software rather than in hardware. This has
                 results in execution times in the tens of thousands of
                 cycle, which as made denormalized numbers useless to
                 programmers. This does not have to happen. With a small
                 amount of additional hardware, denormalized numbers and
                 underflows can be handled close to the speed of
                 normalized numbers. Most of the techniques discussed
                 here have only been discussed in filed or pending
                 patent applications.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: Schwarz:2003:PRI
author: E. Schwarz
title: Panel: Revisions to the IEEE 754 standard for floating-point arithmetic
crossref: Bajard:2003:ISC
pages: 112--112
year: 2003
bibdate: Wed Nov 26 12:04:35 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:35 MST
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: E. Schwarz
rawtitle: Panel: Revisions to the {IEEE 754} standard for floating-point arithmetic
entry:
@InProceedings{Schwarz:2003:PRI,
  author =       "E. Schwarz",
  title =        "Panel: Revisions to the {IEEE 754} standard for
                 floating-point arithmetic",
  crossref =     "Bajard:2003:ISC",
  pages =        "112--112",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:35 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: Seidel:2003:MPI
author: P.-M. Seidel
booktitle: 2003 IEEE International Symposium on Micro-NanoMechatronics and Human Science
title: Multiple Path IEEE Floating-Point Fused Multiply-Add
volume: 3
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1359--1362
year: 2003
DOI: https://doi.org/10.1109/MWSCAS.2003.1562547
bibdate: Fri Jun 24 12:02:41 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.24 12:02:41 ???
acknowledgement: ack-nhfb
rawauthor: P.-M. Seidel
rawbooktitle: {2003 IEEE International Symposium on Micro-NanoMechatronics and Human Science}
rawtitle: Multiple Path {IEEE} Floating-Point Fused Multiply-Add
abstract:
We propose optimizations for the IEEE floating-point fused multiply-add operation by considering multiple exclusive parallel computation paths in the implementation. For the proposed design we can show a significant performance improvement over conventional implementations. Considering a variable latency implementation allows for further reduction of the average latency.

rawabstract:
We propose optimizations for the IEEE floating-point fused multiply-add operation by considering multiple exclusive parallel computation paths in the implementation. For the proposed design we can show a significant performance improvement over conventional implementations. Considering a variable latency implementation allows for further reduction of the average latency.

entry:
@InProceedings{Seidel:2003:MPI,
  author =       "P.-M. Seidel",
  booktitle =    "{2003 IEEE International Symposium on
                 Micro-NanoMechatronics and Human Science}",
  title =        "Multiple Path {IEEE} Floating-Point Fused
                 Multiply-Add",
  volume =       "3",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1359--1362",
  year =         "2003",
  DOI =          "https://doi.org/10.1109/MWSCAS.2003.1562547",
  ISBN =         "????",
  ISBN-13 =      "????",
  LCCN =         "????",
  bibdate =      "Fri Jun 24 12:02:41 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "We propose optimizations for the IEEE floating-point
                 fused multiply-add operation by considering multiple
                 exclusive parallel computation paths in the
                 implementation. For the proposed design we can show a
                 significant performance improvement over conventional
                 implementations. Considering a variable latency
                 implementation allows for further reduction of the
                 average latency.",
  acknowledgement = ack-nhfb,
  xxbooktitle =  "Proc. 46th Int. IEEE MidWest Symposium on Circuits and
                 Systems (MWSCAS)",
}


bibtype: inproceedings
filename: fparith.bib
label: Senthilvelan:2003:FAL
author: M. Senthilvelan and M. J. Schulte
title: A Flexible Arithmetic and Logic Unit for Multimedia Processing
crossref: Luk:2003:PSA
pages: 520--528
year: 2003
bibdate: Sun Mar 04 20:44:10 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.03.04 20:44:10 ???
URL: http://mesa.ece.wisc.edu/publications/cp_2003-05.pdf
acknowledgement: ack-nhfb
rawauthor: M. Senthilvelan and M. J. Schulte
rawtitle: A Flexible Arithmetic and Logic Unit for Multimedia Processing
entry:
@InProceedings{Senthilvelan:2003:FAL,
  author =       "M. Senthilvelan and M. J. Schulte",
  title =        "A Flexible Arithmetic and Logic Unit for Multimedia
                 Processing",
  crossref =     "Luk:2003:PSA",
  pages =        "520--528",
  year =         "2003",
  bibdate =      "Sun Mar 04 20:44:10 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://mesa.ece.wisc.edu/publications/cp_2003-05.pdf",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Sheldon:2003:SRI
author: Jeffrey Sheldon and Walter Lee and Ben Greenwald and Saman Amarasinghe
title: Strength Reduction of Integer Division and Modulo Operations
crossref: Dietz:2003:LCP
pages: 254--273
year: 2003
DOI: https://doi.org/10.1007/3-540-35767-X_17
bibdate: Fri Jun 24 12:09:31 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.24 12:09:31 ???
acknowledgement: ack-nhfb
rawauthor: Jeffrey Sheldon and Walter Lee and Ben Greenwald and Saman Amarasinghe
rawtitle: Strength Reduction of Integer Division and Modulo Operations
URL:
http://www.springerlink.com/link.asp?id=3hfwyuyjxkf23nd2; http://www.springerlink.com/openurl.asp?genre=article&issn=0302-9743&volume=2624&spage=254

abstract:
Integer division, modulo, and remainder operations are expressive and useful operations. They are logical candidates to express complex data accesses such as the wrap-around behavior in queues using ring buffers. In addition, they appear frequently in address computations as a result of compiler optimizations that improve data locality, perform data distribution, or enable parallelization. Experienced application programmers, however, avoid them because they are slow. Furthermore, while advances in both hardware and software have improved the performance of many parts of a program, few are applicable to division and modulo operations. This trend makes these operations increasingly detrimental to program performance. This paper describes a suite of optimizations for eliminating division, modulo, and remainder operations from programs. These techniques are analogous to strength reduction techniques used for multiplications. In addition to some algebraic simplifications, we present a set of optimization techniques that eliminates division and modulo operations that are functions of loop induction variables and loop constants. The optimizations rely on algebra, integer programming, and loop transformations.

rawabstract:
Integer division, modulo, and remainder operations are expressive and useful operations. They are logical candidates to express complex data accesses such as the wrap-around behavior in queues using ring buffers. In addition, they appear frequently in address computations as a result of compiler optimizations that improve data locality, perform data distribution, or enable parallelization. Experienced application programmers, however, avoid them because they are slow. Furthermore, while advances in both hardware and software have improved the performance of many parts of a program, few are applicable to division and modulo operations. This trend makes these operations increasingly detrimental to program performance. This paper describes a suite of optimizations for eliminating division, modulo, and remainder operations from programs. These techniques are analogous to strength reduction techniques used for multiplications. In addition to some algebraic simplifications, we present a set of optimization techniques that eliminates division and modulo operations that are functions of loop induction variables and loop constants. The optimizations rely on algebra, integer programming, and loop transformations.

entry:
@InProceedings{Sheldon:2003:SRI,
  author =       "Jeffrey Sheldon and Walter Lee and Ben Greenwald and
                 Saman Amarasinghe",
  title =        "Strength Reduction of Integer Division and Modulo
                 Operations",
  crossref =     "Dietz:2003:LCP",
  pages =        "254--273",
  year =         "2003",
  DOI =          "https://doi.org/10.1007/3-540-35767-X_17",
  bibdate =      "Fri Jun 24 12:09:31 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.springerlink.com/link.asp?id=3hfwyuyjxkf23nd2;
                 http://www.springerlink.com/openurl.asp?genre=article&issn=0302-9743&volume=2624&spage=254",
  abstract =     "Integer division, modulo, and remainder operations are
                 expressive and useful operations. They are logical
                 candidates to express complex data accesses such as the
                 wrap-around behavior in queues using ring buffers. In
                 addition, they appear frequently in address
                 computations as a result of compiler optimizations that
                 improve data locality, perform data distribution, or
                 enable parallelization. Experienced application
                 programmers, however, avoid them because they are slow.
                 Furthermore, while advances in both hardware and
                 software have improved the performance of many parts of
                 a program, few are applicable to division and modulo
                 operations. This trend makes these operations
                 increasingly detrimental to program performance. This
                 paper describes a suite of optimizations for
                 eliminating division, modulo, and remainder operations
                 from programs. These techniques are analogous to
                 strength reduction techniques used for multiplications.
                 In addition to some algebraic simplifications, we
                 present a set of optimization techniques that
                 eliminates division and modulo operations that are
                 functions of loop induction variables and loop
                 constants. The optimizations rely on algebra, integer
                 programming, and loop transformations.",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Singer:2003:REP
author: Sanja Singer and Sasa Singer
title: Rounding error and perturbation bounds for the symplectic QR factorization
journal: j-LINEAR-ALGEBRA-APPL
volume: 358
number: 1--3
pages: 255--279
day: 1
month: jan
monthnumber: 1
year: 2003
CODEN: LAAPAW
ISSN: 0024-3795 (print), 1873-1856 (electronic) OR 00243795 (print), 18731856 (electronic)
ISSNL: 0024-3795 OR 00243795
bibdate: Mon Apr 28 07:27:21 MDT 2003
bibsource: http://www.elsevier.com/locate/laa; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.04.28 07:27:21 MDT
fjournal: Linear Algebra and its Applications
acknowledgement: ack-nhfb
journalURL: http://www.sciencedirect.com/science/journal/00243795
rawauthor: Sanja Singer and Sa{\v{s}}a Singer
rawtitle: Rounding error and perturbation bounds for the symplectic {QR} factorization
URL:
http://www.elsevier.nl/gej-ng/10/30/19/207/25/39/abstract.html; http://www.sciencedirect.com/science?_ob=GatewayURL&_origin=SOCJLA&_urlversion=4&_method=citationSearch&_version=1&_piikey=S002437950200263X&_volkey=00243795%23358%23255&_refkey=Singer%232003%23255%23279&md5=d630d009cc24a902e31bc6f9537af08c

entry:
@Article{Singer:2003:REP,
  author =       "Sanja Singer and Sa{\v{s}}a Singer",
  title =        "Rounding error and perturbation bounds for the
                 symplectic {QR} factorization",
  journal =      j-LINEAR-ALGEBRA-APPL,
  volume =       "358",
  number =       "1--3",
  pages =        "255--279",
  day =          "1",
  month =        jan,
  year =         "2003",
  CODEN =        "LAAPAW",
  ISSN =         "0024-3795 (print), 1873-1856 (electronic)",
  ISSN-L =       "0024-3795",
  bibdate =      "Mon Apr 28 07:27:21 MDT 2003",
  bibsource =    "http://www.elsevier.com/locate/laa;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.elsevier.nl/gej-ng/10/30/19/207/25/39/abstract.html;
                 http://www.sciencedirect.com/science?_ob=GatewayURL&_origin=SOCJLA&_urlversion=4&_method=citationSearch&_version=1&_piikey=S002437950200263X&_volkey=00243795%23358%23255&_refkey=Singer%232003%23255%23279&md5=d630d009cc24a902e31bc6f9537af08c",
  acknowledgement = ack-nhfb,
  fjournal =     "Linear Algebra and its Applications",
  journal-URL =  "http://www.sciencedirect.com/science/journal/00243795",
}


bibtype: article
filename: fparith.bib
label: Smith:2003:UMP
author: David M. Smith
title: Using Multiple-Precision Arithmetic
journal: j-COMPUT-SCI-ENG
volume: 5
number: 4
pages: 88--93
month: jul
monthnumber: 7
year: 2003
CODEN: CSENFA
ISSN: 1521-9615 (print), 1558-366X (electronic) OR 15219615 (print), 1558366X (electronic)
ISSNL: 1521-9615 OR 15219615
bibdate: Sat Jan 3 18:25:08 MST 2004
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.01.03 18:25:08 MST
fjournal: Computing in Science and Engineering
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=5992
rawauthor: David M. Smith
rawtitle: Using Multiple-Precision Arithmetic
URL:
http://csdl.computer.org/dl/mags/cs/2003/04/c4088.htm; http://csdl.computer.org/dl/mags/cs/2003/04/c4088.pdf

entry:
@Article{Smith:2003:UMP,
  author =       "David M. Smith",
  title =        "Using Multiple-Precision Arithmetic",
  journal =      j-COMPUT-SCI-ENG,
  volume =       "5",
  number =       "4",
  pages =        "88--93",
  month =        jul # "\slash " # aug,
  year =         "2003",
  CODEN =        "CSENFA",
  ISSN =         "1521-9615 (print), 1558-366X (electronic)",
  ISSN-L =       "1521-9615",
  bibdate =      "Sat Jan 3 18:25:08 MST 2004",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://csdl.computer.org/dl/mags/cs/2003/04/c4088.htm;
                 http://csdl.computer.org/dl/mags/cs/2003/04/c4088.pdf",
  acknowledgement = ack-nhfb,
  fjournal =     "Computing in Science and Engineering",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=5992",
  summary =      "High-precision arithmetic is useful in many different
                 computational problems. The most common is a
                 numerically unstable algorithm, for which, say, 53-bit
                 (ANSI/IEEE 754-1985 Standard) double precision would
                 not yield a sufficiently accurate result. \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Sofroniou:2003:IFR
author: Mark Sofroniou and Giulia Spaletta
journal: j-FUT-GEN-COMP-SYS
volume: 19
number: 3
pages: 375--383
month: apr
monthnumber: 4
year: 2003
CODEN: FGSEVI
ISSN: 0167-739X (print), 1872-7115 (electronic) OR 0167739X (print), 18727115 (electronic)
ISSNL: 0167-739X OR 0167739X
bibdate: Sat Jan 10 10:03:32 MST 2004
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.01.10 10:03:32 MST
fjournal: Future Generation Computer Systems
acknowledgement: ack-nhfb
journalURL: http://www.sciencedirect.com/science/journal/0167739X
rawauthor: Mark Sofroniou and Giulia Spaletta
title:
Increment formulations for rounding error reduction in the numerical solution of structured differential systems

rawtitle:
Increment formulations for rounding error reduction in the numerical solution of structured differential systems

entry:
@Article{Sofroniou:2003:IFR,
  author =       "Mark Sofroniou and Giulia Spaletta",
  title =        "Increment formulations for rounding error reduction in
                 the numerical solution of structured differential
                 systems",
  journal =      j-FUT-GEN-COMP-SYS,
  volume =       "19",
  number =       "3",
  pages =        "375--383",
  month =        apr,
  year =         "2003",
  CODEN =        "FGSEVI",
  ISSN =         "0167-739X (print), 1872-7115 (electronic)",
  ISSN-L =       "0167-739X",
  bibdate =      "Sat Jan 10 10:03:32 MST 2004",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Future Generation Computer Systems",
  journal-URL =  "http://www.sciencedirect.com/science/journal/0167739X",
}


bibtype: inproceedings
filename: fparith.bib
label: Stehle:2003:WCL
author: Damien Stehle and Vincent Lefevre and Paul Zimmermann
title: Worst cases and lattice reduction
crossref: Bajard:2003:ISC
pages: 142--147
year: 2003
bibdate: Wed Nov 26 12:04:35 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:35 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Stehle.pdf
keywords: ARITH-16; correct rounding; floating-point arithmetic
acknowledgement: ack-nhfb
rawauthor: Damien Stehl{\'e} and Vincent Lef{\`e}vre and Paul Zimmermann
rawtitle: Worst cases and lattice reduction
abstract:
We propose a new algorithm to find worst cases for correct rounding of an analytic function. We first reduce this problem to the real small value problem --- i.e. for polynomials with real coefficients. Then we show that this second problem can be solved efficiently, by extending Coppersmith's work on the integer small value problem --- for polynomials with integer coefficients --- using lattice reduction [4, 5, 6].par For floating-point numbers with a mantissa less than $N$, and a polynomial approximation of degree $d$, our algorithm finds all worst cases at distance $ < N^-d^2 / (2d + 1) $ from a machine number in time $ O(N^(d + 1) / (2d + 1) + epsilon ) $. For $ d = 2 $, this improves on the $ O(N^2 / 3 + epsilon ) $ complexity from Lefevre's algorithm [15, 16] to $ O(N^3 / 5 + epsilon ) $. We exhibit some new worst cases found using our algorithm, for double-extended and quadruple precision. For larger $d$, our algorithm can be used to check that there exist no worst cases at distance $ < N^-k $ in time $ O(N^1 / 2 + O(1 / k)) $.

rawabstract:
We propose a new algorithm to find worst cases for correct rounding of an analytic function. We first reduce this problem to the real small value problem --- i.e. for polynomials with real coefficients. Then we show that this second problem can be solved efficiently, by extending Coppersmith's work on the integer small value problem --- for polynomials with integer coefficients --- using lattice reduction [4, 5, 6].\par For floating-point numbers with a mantissa less than $N$, and a polynomial approximation of degree $d$, our algorithm finds all worst cases at distance $ < N^{-d^2 / (2d + 1)} $ from a machine number in time $ O(N^{(d + 1) / (2d + 1) + \epsilon }) $. For $ d = 2 $, this improves on the $ O(N^{2 / 3} + \epsilon) $ complexity from Lef{\'e}vre's algorithm [15, 16] to $ O(N^{3 / 5} + \epsilon) $. We exhibit some new worst cases found using our algorithm, for double-extended and quadruple precision. For larger $d$, our algorithm can be used to check that there exist no worst cases at distance $ < N^{-k} $ in time $ O(N^{1 / 2 + O(1 / k)}) $.

entry:
@InProceedings{Stehle:2003:WCL,
  author =       "Damien Stehl{\'e} and Vincent Lef{\`e}vre and Paul
                 Zimmermann",
  title =        "Worst cases and lattice reduction",
  crossref =     "Bajard:2003:ISC",
  pages =        "142--147",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:35 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Stehle.pdf",
  abstract =     "We propose a new algorithm to find worst cases for
                 correct rounding of an analytic function. We first
                 reduce this problem to the real small value problem ---
                 i.e. for polynomials with real coefficients. Then we
                 show that this second problem can be solved
                 efficiently, by extending Coppersmith's work on the
                 integer small value problem --- for polynomials with
                 integer coefficients --- using lattice reduction [4, 5,
                 6].\par

                 For floating-point numbers with a mantissa less than
                 $N$, and a polynomial approximation of degree $d$, our
                 algorithm finds all worst cases at distance $ < N^{-d^2
                 / (2d + 1)} $ from a machine number in time $ O(N^{(d +
                 1) / (2d + 1) + \epsilon }) $. For $ d = 2 $, this
                 improves on the $ O(N^{2 / 3} + \epsilon) $ complexity
                 from Lef{\'e}vre's algorithm [15, 16] to $ O(N^{3 / 5}
                 + \epsilon) $. We exhibit some new worst cases found
                 using our algorithm, for double-extended and quadruple
                 precision. For larger $d$, our algorithm can be used to
                 check that there exist no worst cases at distance $ <
                 N^{-k} $ in time $ O(N^{1 / 2 + O(1 / k)}) $.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16; correct rounding; floating-point
                 arithmetic",
}


bibtype: inproceedings
filename: fparith.bib
label: Sun:2003:NAF
author: Haiping Sun and Minglun Gao
title: A novel architecture for floating-point multiply-add-fused operation
crossref: IEEE:2004:PJC
volume: 3
pages: 1675--1679
year: 2003
DOI: https://doi.org/10.1109/ICICS.2003.1292753
bibdate: Sun Feb 20 10:50:21 2011
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2011.02.20 10:50:21 ???
acknowledgement: ack-nhfb
rawauthor: Haiping Sun and Minglun Gao
rawtitle: A novel architecture for floating-point multiply-add-fused operation
entry:
@InProceedings{Sun:2003:NAF,
  author =       "Haiping Sun and Minglun Gao",
  title =        "A novel architecture for floating-point
                 multiply-add-fused operation",
  crossref =     "IEEE:2004:PJC",
  volume =       "3",
  pages =        "1675--1679",
  year =         "2003",
  DOI =          "https://doi.org/10.1109/ICICS.2003.1292753",
  bibdate =      "Sun Feb 20 10:50:21 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Suvakovic:2003:EEA
author: Dusan Suvakovic and C. Andre T. Salama
title: Energy Efficient Adiabatic Multiplier-Accumulator Design
journal: j-J-VLSI-SIGNAL-PROC
volume: 33
number: 1
pages: 83--103
month: jan
monthnumber: 1
year: 2003
CODEN: JVSPED
DOI: https://doi.org/10.1023/A:1021145919099
ISSN: 0922-5773 (print), 1573-109x (electronic) OR 09225773 (print), 1573109x (electronic)
ISSNL: 0922-5773 OR 09225773
bibdate: Fri Jun 24 16:00:03 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.24 16:00:03 ???
fjournal: Journal of VLSI Signal Processing
acknowledgement: ack-nhfb
rawauthor: Dusan Suvakovic and C. Andr{\'e} T. Salama
rawtitle: Energy Efficient Adiabatic Multiplier-Accumulator Design
abstract:
This paper presents a strategy for minimizing non-adiabatic dissipation in adiabatic arithmetic units. The non-adiabatic dissipation is minimized by architectural design involving a small number of complex logic gates. Circuit design of complex adiabatic gates, based on ordered binary decision diagrams (OBDD), is introduced. An optimized architecture for adiabatic parallel multipliers is proposed and savings in energy dissipation over competing architectures are estimated. Experimental results obtained from implementation of an adiabatic multiply-accumulate (MAC) unit suggest that the proposed strategy provides substantial improvement in energy efficiency over equivalent non-adiabatic and alternative adiabatic implementations, while achieving a competitive operating speed.

rawabstract:
This paper presents a strategy for minimizing non-adiabatic dissipation in adiabatic arithmetic units. The non-adiabatic dissipation is minimized by architectural design involving a small number of complex logic gates. Circuit design of complex adiabatic gates, based on ordered binary decision diagrams (OBDD), is introduced. An optimized architecture for adiabatic parallel multipliers is proposed and savings in energy dissipation over competing architectures are estimated. Experimental results obtained from implementation of an adiabatic multiply-accumulate (MAC) unit suggest that the proposed strategy provides substantial improvement in energy efficiency over equivalent non-adiabatic and alternative adiabatic implementations, while achieving a competitive operating speed.

entry:
@Article{Suvakovic:2003:EEA,
  author =       "Dusan Suvakovic and C. Andr{\'e} T. Salama",
  title =        "Energy Efficient Adiabatic Multiplier-Accumulator
                 Design",
  journal =      j-J-VLSI-SIGNAL-PROC,
  volume =       "33",
  number =       "1",
  pages =        "83--103",
  month =        jan,
  year =         "2003",
  CODEN =        "JVSPED",
  DOI =          "https://doi.org/10.1023/A:1021145919099",
  ISSN =         "0922-5773 (print), 1573-109x (electronic)",
  ISSN-L =       "0922-5773",
  bibdate =      "Fri Jun 24 16:00:03 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "This paper presents a strategy for minimizing
                 non-adiabatic dissipation in adiabatic arithmetic
                 units. The non-adiabatic dissipation is minimized by
                 architectural design involving a small number of
                 complex logic gates. Circuit design of complex
                 adiabatic gates, based on ordered binary decision
                 diagrams (OBDD), is introduced. An optimized
                 architecture for adiabatic parallel multipliers is
                 proposed and savings in energy dissipation over
                 competing architectures are estimated. Experimental
                 results obtained from implementation of an adiabatic
                 multiply-accumulate (MAC) unit suggest that the
                 proposed strategy provides substantial improvement in
                 energy efficiency over equivalent non-adiabatic and
                 alternative adiabatic implementations, while achieving
                 a competitive operating speed.",
  acknowledgement = ack-nhfb,
  fjournal =     "Journal of VLSI Signal Processing",
}


bibtype: article
filename: fparith.bib
label: Swider:2003:EEF
author: Zbigniew Swider
title: Errors of elementary floating-point operations in control algorithms
journal: Arch. Control Sci.
volume: 13(49)
number: 4
pages: 505--526
year: 2003
ISSN: 0004-072X OR 0004072X
MRclass: 65G50 (62J10)
MRnumber: MR2175804 (2006g:65076)
bibdate: Thu Nov 8 19:16:14 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.08 19:16:14 ???
keywords: rounding errors
acknowledgement: ack-nhfb
rawauthor: Zbigniew {\'S}wider
rawtitle: Errors of elementary floating-point operations in control algorithms
fjournal:
Archives of Control Sciences. Polish Academy of Sciences. Committee of Automatic Control and Robotics

entry:
@Article{Swider:2003:EEF,
  author =       "Zbigniew {\'S}wider",
  title =        "Errors of elementary floating-point operations in
                 control algorithms",
  journal =      "Arch. Control Sci.",
  volume =       "13(49)",
  number =       "4",
  pages =        "505--526",
  year =         "2003",
  ISSN =         "0004-072X",
  MRclass =      "65G50 (62J10)",
  MRnumber =     "MR2175804 (2006g:65076)",
  bibdate =      "Thu Nov 8 19:16:14 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Archives of Control Sciences. Polish Academy of
                 Sciences. Committee of Automatic Control and Robotics",
  keywords =     "rounding errors",
}


bibtype: inproceedings
filename: fparith.bib
label: Tan:2003:MPF
author: Dimitri Tan and Albert Danysh and Michael Liebelt
title: Multiple-precision fixed-point vector multiply-accumulator using shared segmentation
crossref: Bajard:2003:ISC
pages: 12--19
year: 2003
bibdate: Wed Nov 26 11:59:51 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 11:59:51 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Tan.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: Dimitri Tan and Albert Danysh and Michael Liebelt
rawtitle: Multiple-precision fixed-point vector multiply-accumulator using shared segmentation
abstract:
We present a 64-bit fixed-point vector multiply-accumulator (MAC) architecture capable of supporting multiple precisions. The vector MAC can perform one 64$ times $64, two 32$ times $32, four 16$ times $16 or eight 8$ times $8 bit signed / unsigned multiply-accumulates using essentially the same hardware as a scalar 64-bit MAC and with only a small increase in delay. The scalar MAC architecture is vectorized by inserting mode-dependent multiplexing into the partial product generation and by inserting mode-dependent kills in the carry chain of the reduction tree and the final carry-propagate adder. This is an example of ``shared segmentation'' in which the existing scalar structure is segmented and then shared between vector modes. The vector MAC is area efficient and can be fully pipelined which makes it suitable for high-performance processors and possibly dynamically reconfigurable processors.

rawabstract:
We present a 64-bit fixed-point vector multiply-accumulator (MAC) architecture capable of supporting multiple precisions. The vector MAC can perform one 64$ \times $64, two 32$ \times $32, four 16$ \times $16 or eight 8$ \times $8 bit signed\slash unsigned multiply-accumulates using essentially the same hardware as a scalar 64-bit MAC and with only a small increase in delay. The scalar MAC architecture is vectorized by inserting mode-dependent multiplexing into the partial product generation and by inserting mode-dependent kills in the carry chain of the reduction tree and the final carry-propagate adder. This is an example of ``shared segmentation'' in which the existing scalar structure is segmented and then shared between vector modes. The vector MAC is area efficient and can be fully pipelined which makes it suitable for high-performance processors and possibly dynamically reconfigurable processors.

entry:
@InProceedings{Tan:2003:MPF,
  author =       "Dimitri Tan and Albert Danysh and Michael Liebelt",
  title =        "Multiple-precision fixed-point vector
                 multiply-accumulator using shared segmentation",
  crossref =     "Bajard:2003:ISC",
  pages =        "12--19",
  year =         "2003",
  bibdate =      "Wed Nov 26 11:59:51 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Tan.pdf",
  abstract =     "We present a 64-bit fixed-point vector
                 multiply-accumulator (MAC) architecture capable of
                 supporting multiple precisions. The vector MAC can
                 perform one 64$ \times $64, two 32$ \times $32, four
                 16$ \times $16 or eight 8$ \times $8 bit signed\slash
                 unsigned multiply-accumulates using essentially the
                 same hardware as a scalar 64-bit MAC and with only a
                 small increase in delay. The scalar MAC architecture is
                 vectorized by inserting mode-dependent multiplexing
                 into the partial product generation and by inserting
                 mode-dependent kills in the carry chain of the
                 reduction tree and the final carry-propagate adder.
                 This is an example of ``shared segmentation'' in which
                 the existing scalar structure is segmented and then
                 shared between vector modes. The vector MAC is area
                 efficient and can be fully pipelined which makes it
                 suitable for high-performance processors and possibly
                 dynamically reconfigurable processors.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: article
filename: fparith.bib
label: Tenca:2003:SAM
author: A. F. Tenca and C. K. Koc
title: A scalable architecture for modular multiplication based on Montgomery's algorithm
journal: j-IEEE-TRANS-COMPUT
volume: 52
number: 9
pages: 1215--1221
month: sep
monthnumber: 9
year: 2003
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2003.1228516
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:52:54 MDT 2011
bibtimestamp: 2011.07.05 08:52:54 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1228516
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: A. F. Tenca and C. K. Koc
rawtitle: A scalable architecture for modular multiplication based on {Montgomery}'s algorithm
entry:
@Article{Tenca:2003:SAM,
  author =       "A. F. Tenca and C. K. Koc",
  title =        "A scalable architecture for modular multiplication
                 based on {Montgomery}'s algorithm",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "52",
  number =       "9",
  pages =        "1215--1221",
  month =        sep,
  year =         "2003",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2003.1228516",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:52:54 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1228516",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Thomas:2003:IMF
author: James W. Thomas
title: Inlining of mathematical functions in HP-UX for Itanium 2
crossref: IEEE:2003:PCI
pages: 135--144
year: 2003
DOI: https://doi.org/10.1109/CGO.2003.1191540
bibdate: Thu Jun 09 18:37:10 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.09 18:37:10 ???
keywords: EPIC; Intel IA-64; Itanium
acknowledgement: ack-nhfb
rawauthor: James W. Thomas
rawtitle: Inlining of mathematical functions in {HP-UX} for {Itanium 2}
abstract:
HP-UX compilers inline mathematical functions for Itanium Processor Family (IPF) systems to improve throughput 4X--8X versus external library calls, achieving speeds comparable to highly tuned vector functions, without requiring the user to code for a vector interface and without sacrificing accuracy or edge-case behaviors. This paper highlights IPF architectural features that support implementation of high-performance, high-quality math functions for inlining. It discusses strategies for utilizing the features and developing inlineable sequences on a large scale, and it presents requisite compiler features and language extensions. Also, this paper describes compiler mechanisms that produce inlineable code and inline it.

rawabstract:
HP-UX compilers inline mathematical functions for Itanium Processor Family (IPF) systems to improve throughput 4X--8X versus external library calls, achieving speeds comparable to highly tuned vector functions, without requiring the user to code for a vector interface and without sacrificing accuracy or edge-case behaviors. This paper highlights IPF architectural features that support implementation of high-performance, high-quality math functions for inlining. It discusses strategies for utilizing the features and developing inlineable sequences on a large scale, and it presents requisite compiler features and language extensions. Also, this paper describes compiler mechanisms that produce inlineable code and inline it.

entry:
@InProceedings{Thomas:2003:IMF,
  author =       "James W. Thomas",
  title =        "Inlining of mathematical functions in {HP-UX} for
                 {Itanium 2}",
  crossref =     "IEEE:2003:PCI",
  pages =        "135--144",
  year =         "2003",
  DOI =          "https://doi.org/10.1109/CGO.2003.1191540",
  bibdate =      "Thu Jun 09 18:37:10 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "HP-UX compilers inline mathematical functions for
                 Itanium Processor Family (IPF) systems to improve
                 throughput 4X--8X versus external library calls,
                 achieving speeds comparable to highly tuned vector
                 functions, without requiring the user to code for a
                 vector interface and without sacrificing accuracy or
                 edge-case behaviors. This paper highlights IPF
                 architectural features that support implementation of
                 high-performance, high-quality math functions for
                 inlining. It discusses strategies for utilizing the
                 features and developing inlineable sequences on a large
                 scale, and it presents requisite compiler features and
                 language extensions. Also, this paper describes
                 compiler mechanisms that produce inlineable code and
                 inline it.",
  acknowledgement = ack-nhfb,
  keywords =     "EPIC; Intel IA-64; Itanium",
}


bibtype: article
filename: fparith.bib
label: Vergos:2003:DRA
author: H. T. Vergos and D. Nikolos and M. Bellos and C. Efstathiou
title: Deterministic BIST for RNS adders
journal: j-IEEE-TRANS-COMPUT
volume: 52
number: 7
pages: 896--906
month: jul
monthnumber: 7
year: 2003
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2003.1214338
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:52:51 MDT 2011
bibtimestamp: 2011.07.05 08:52:51 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1214338
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: H. T. Vergos and D. Nikolos and M. Bellos and C. Efstathiou
rawtitle: Deterministic {BIST} for {RNS} adders
entry:
@Article{Vergos:2003:DRA,
  author =       "H. T. Vergos and D. Nikolos and M. Bellos and C.
                 Efstathiou",
  title =        "Deterministic {BIST} for {RNS} adders",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "52",
  number =       "7",
  pages =        "896--906",
  month =        jul,
  year =         "2003",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2003.1214338",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:52:51 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1214338",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Wahid:2003:EFA
author: K. A. Wahid and V. S. Dimitrov and G. A. Jullien
title: Error-free arithmetic for discrete wavelet transforms using algebraic integers
crossref: Bajard:2003:ISC
pages: 238--244
year: 2003
bibdate: Wed Nov 26 12:04:40 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:40 MST
URL: http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Jullien.pdf
keywords: ARITH-16
acknowledgement: ack-nhfb
rawauthor: K. A. Wahid and V. S. Dimitrov and G. A. Jullien
rawtitle: Error-free arithmetic for discrete wavelet transforms using algebraic integers
abstract:
In this paper a novel encoding scheme is introduced with applications to error-free computation of Discrete Wavelet Transforms (DWT) based on Daubechies wavelets. The encoding scheme is based on an algebraic integer decomposition of the wavelet coefficients. This work is a continuation of our research into error-free computation of DCTs and IDCTs, and this extension is timely since the DWT is part of the new standard for JPEG2000. This encoding technique eliminates the requirements to approximate the transformation matrix elements by obtaining their exact representations. As a result, we achieve error-free calculations up to the final reconstruction step where we are free to choose an approximate substitution precision based on a hardware / accuracy trade-off.

rawabstract:
In this paper a novel encoding scheme is introduced with applications to error-free computation of Discrete Wavelet Transforms (DWT) based on Daubechies wavelets. The encoding scheme is based on an algebraic integer decomposition of the wavelet coefficients. This work is a continuation of our research into error-free computation of DCTs and IDCTs, and this extension is timely since the DWT is part of the new standard for JPEG2000. This encoding technique eliminates the requirements to approximate the transformation matrix elements by obtaining their exact representations. As a result, we achieve error-free calculations up to the final reconstruction step where we are free to choose an approximate substitution precision based on a hardware\slash accuracy trade-off.

entry:
@InProceedings{Wahid:2003:EFA,
  author =       "K. A. Wahid and V. S. Dimitrov and G. A. Jullien",
  title =        "Error-free arithmetic for discrete wavelet transforms
                 using algebraic integers",
  crossref =     "Bajard:2003:ISC",
  pages =        "238--244",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:40 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.acsel-lab.com/arithmetic/arith16/papers/ARITH16_Jullien.pdf",
  abstract =     "In this paper a novel encoding scheme is introduced
                 with applications to error-free computation of Discrete
                 Wavelet Transforms (DWT) based on Daubechies wavelets.
                 The encoding scheme is based on an algebraic integer
                 decomposition of the wavelet coefficients. This work is
                 a continuation of our research into error-free
                 computation of DCTs and IDCTs, and this extension is
                 timely since the DWT is part of the new standard for
                 JPEG2000. This encoding technique eliminates the
                 requirements to approximate the transformation matrix
                 elements by obtaining their exact representations. As a
                 result, we achieve error-free calculations up to the
                 final reconstruction step where we are free to choose
                 an approximate substitution precision based on a
                 hardware\slash accuracy trade-off.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
}


bibtype: inproceedings
filename: fparith.bib
label: Walters:2003:UTM
author: E. Walters III and M. G. Arnold and M. J. Schulte
title: Using Truncated Multipliers in DCT and IDCT Hardware Accelerators
crossref: Luk:2003:PSA
pages: 573--584
year: 2003
bibdate: Sun Mar 04 17:56:12 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.03.04 17:56:12 ???
URL: http://mesa.ece.wisc.edu/publications/cp_2003-06.pdf
acknowledgement: ack-nhfb
rawauthor: E. {Walters III} and M. G. Arnold and M. J. Schulte
rawtitle: Using Truncated Multipliers in {DCT} and {IDCT} Hardware Accelerators
entry:
@InProceedings{Walters:2003:UTM,
  author =       "E. {Walters III} and M. G. Arnold and M. J. Schulte",
  title =        "Using Truncated Multipliers in {DCT} and {IDCT}
                 Hardware Accelerators",
  crossref =     "Luk:2003:PSA",
  pages =        "573--584",
  year =         "2003",
  bibdate =      "Sun Mar 04 17:56:12 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://mesa.ece.wisc.edu/publications/cp_2003-06.pdf",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Wang:2003:TDF
author: Xiaojun Wang and B. E. Nelson
title: Tradeoffs of designing floating-point division and square root on Virtex FPGAs
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 195--203
year: 2003
bibdate: Sat Jul 16 15:28:14 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 15:28:14 MDT
acknowledgement: ack-nhfb
rawauthor: Xiaojun Wang and B. E. Nelson
rawtitle: Tradeoffs of designing floating-point division and square root on {Virtex FPGAs}
booktitle:
FCCM 2003: 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 9--11 April 2003

rawbooktitle:
{FCCM 2003}: 11th Annual {IEEE} Symposium on Field-Programmable Custom Computing Machines, 9--11 April 2003

entry:
@InProceedings{Wang:2003:TDF,
  author =       "Xiaojun Wang and B. E. Nelson",
  booktitle =    "{FCCM 2003}: 11th Annual {IEEE} Symposium on
                 Field-Programmable Custom Computing Machines, 9--11
                 April 2003",
  title =        "Tradeoffs of designing floating-point division and
                 square root on {Virtex FPGAs}",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "195--203",
  year =         "2003",
  CODEN =        "????",
  ISSN =         "????",
  bibdate =      "Sat Jul 16 15:28:14 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  summary =      "Low latency, high throughput and small area are three
                 major design considerations of an FPGA (field
                 programmable gate array) design. In this paper, we
                 present a high radix SRT division algorithm and a
                 binary restoring square root algorithm. We \ldots{}",
}


bibtype: incollection
filename: fparith.bib
label: Warren:2003:DLD
author: Henry S. Warren
title: The distribution of leading digits
crossref: Warren:2003:HD
chapter: 15.3
pages: 264--267
year: 2003
bibdate: Fri Mar 16 08:02:56 2012
bibtimestamp: 2012.03.16 08:02:56 ???
acknowledgement: ack-nhfb
rawauthor: Henry S. Warren
rawtitle: The distribution of leading digits
entry:
@InCollection{Warren:2003:DLD,
  author =       "Henry S. Warren",
  title =        "The distribution of leading digits",
  crossref =     "Warren:2003:HD",
  chapter =      "15.3",
  pages =        "264--267",
  year =         "2003",
  bibdate =      "Fri Mar 16 08:02:56 2012",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/benfords-law.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Wei:2003:REE
author: Musheng Wei and Qiaohua Liu
title: Roundoff error estimates of the modified Gram--Schmidt algorithm with column pivoting
journal: j-BIT-NUM-MATH
volume: 43
number: 3
pages: 627--645
month: sep
monthnumber: 9
year: 2003
CODEN: BITTEL, NBITAB
DOI: https://doi.org/10.1023/B:BITN.0000007051.49808.04
ISSN: 0006-3835 (print), 1572-9125 (electronic) OR 00063835 (print), 15729125 (electronic)
ISSNL: 0006-3835 OR 00063835
MRclass: 65F20 (65G50)
MRnumber: MR2026721 (2004k:65070)
bibdate: Wed Jan 4 15:06:06 MST 2006
bibtimestamp: 2006.01.04 15:06:06 MST
URL: http://www.springerlink.com/openurl.asp?genre=article&issn=0006-3835&volume=43&issue=3&spage=627
fjournal: BIT. Numerical Mathematics
keywords: floating-point arithmetic; rounding errors
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/10543
rawauthor: Musheng Wei and Qiaohua Liu
rawtitle: Roundoff error estimates of the modified {Gram--Schmidt} algorithm with column pivoting
bibsource:
http://springerlink.metapress.com/openurl.asp?genre=issue&issn=0006-3835&volume=43&issue=3; https://www.math.utah.edu/pub/tex/bib/bit.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib

entry:
@Article{Wei:2003:REE,
  author =       "Musheng Wei and Qiaohua Liu",
  title =        "Roundoff error estimates of the modified
                 {Gram--Schmidt} algorithm with column pivoting",
  journal =      j-BIT-NUM-MATH,
  volume =       "43",
  number =       "3",
  pages =        "627--645",
  month =        sep,
  year =         "2003",
  CODEN =        "BITTEL, NBITAB",
  DOI =          "https://doi.org/10.1023/B:BITN.0000007051.49808.04",
  ISSN =         "0006-3835 (print), 1572-9125 (electronic)",
  ISSN-L =       "0006-3835",
  MRclass =      "65F20 (65G50)",
  MRnumber =     "MR2026721 (2004k:65070)",
  bibdate =      "Wed Jan 4 15:06:06 MST 2006",
  bibsource =    "http://springerlink.metapress.com/openurl.asp?genre=issue&issn=0006-3835&volume=43&issue=3;
                 https://www.math.utah.edu/pub/tex/bib/bit.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.springerlink.com/openurl.asp?genre=article&issn=0006-3835&volume=43&issue=3&spage=627",
  acknowledgement = ack-nhfb,
  fjournal =     "BIT. Numerical Mathematics",
  journal-URL =  "http://link.springer.com/journal/10543",
  keywords =     "floating-point arithmetic; rounding errors",
}


bibtype: article
filename: fparith.bib
label: Yan:2003:NSA
author: Z. Yan and D. V. Sarwate
title: New systolic architectures for inversion and division in $ mathrm GF(2^m) $
journal: j-IEEE-TRANS-COMPUT
volume: 52
number: 11
pages: 1514--1519
month: nov
monthnumber: 11
year: 2003
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2003.1244950
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:52:58 MDT 2011
bibtimestamp: 2011.07.05 08:52:58 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1244950
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Z. Yan and D. V. Sarwate
rawtitle: New systolic architectures for inversion and division in {$ \mathrm {GF}(2^m) $}
entry:
@Article{Yan:2003:NSA,
  author =       "Z. Yan and D. V. Sarwate",
  title =        "New systolic architectures for inversion and division
                 in {$ \mathrm {GF}(2^m) $}",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "52",
  number =       "11",
  pages =        "1514--1519",
  month =        nov,
  year =         "2003",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2003.1244950",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:52:58 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1244950",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: article
filename: fparith.bib
label: Zhang:2003:DRV
author: Chang N. Zhang and Hua Li
title: Design of Reconfigurable VLSI Architecture for Hybrid Arithmetic in $ G F(2^m) $
journal: j-COMP-J
volume: 46
number: 4
pages: 449--460
month: jul
monthnumber: 7
year: 2003
CODEN: CMPJA6
ISSN: 0010-4620 (print), 1460-2067 (electronic) OR 00104620 (print), 14602067 (electronic)
ISSNL: 0010-4620 OR 00104620
bibdate: Sun Jun 29 07:07:13 MDT 2003
bibtimestamp: 2003.06.29 07:07:13 MDT
fjournal: The Computer Journal
acknowledgement: ack-nhfb
journalURL: http://comjnl.oxfordjournals.org/
rawauthor: Chang N. Zhang and Hua Li
rawtitle: Design of Reconfigurable {VLSI} Architecture for Hybrid Arithmetic in {$ G F(2^m) $}
bibsource:
http://www3.oup.co.uk/computer_journal/hdb/Volume_46/Issue_04/; https://www.math.utah.edu/pub/tex/bib/fparith.bib

URL:
http://www3.oup.co.uk/computer_journal/hdb/Volume_46/Issue_04/460449.sgm.abs.html; http://www3.oup.co.uk/computer_journal/hdb/Volume_46/Issue_04/pdf/460449.pdf

entry:
@Article{Zhang:2003:DRV,
  author =       "Chang N. Zhang and Hua Li",
  title =        "Design of Reconfigurable {VLSI} Architecture for
                 Hybrid Arithmetic in {$ G F(2^m) $}",
  journal =      j-COMP-J,
  volume =       "46",
  number =       "4",
  pages =        "449--460",
  month =        jul,
  year =         "2003",
  CODEN =        "CMPJA6",
  ISSN =         "0010-4620 (print), 1460-2067 (electronic)",
  ISSN-L =       "0010-4620",
  bibdate =      "Sun Jun 29 07:07:13 MDT 2003",
  bibsource =    "http://www3.oup.co.uk/computer_journal/hdb/Volume_46/Issue_04/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www3.oup.co.uk/computer_journal/hdb/Volume_46/Issue_04/460449.sgm.abs.html;
                 http://www3.oup.co.uk/computer_journal/hdb/Volume_46/Issue_04/pdf/460449.pdf",
  acknowledgement = ack-nhfb,
  fjournal =     "The Computer Journal",
  journal-URL =  "http://comjnl.oxfordjournals.org/",
}


bibtype: article
filename: fparith.bib
label: Zielke:2003:GLL
author: Gerhard Zielke and Volker Drygalla
title: Genaue Losung linearer Gleichungssysteme. (German) [Exact solution of linear systems of equations]
journal: j-GAMM-MIT
volume: 26
pages: 7--107
year: 2003
ISSN: 0936-7195 OR 09367195
MRclass: 65F99 (01A60 65-03 65G50 68-03)
MRnumber: MR2056620 (2005d:65069)
bibdate: Fri Jan 06 08:03:49 2006
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/matlab.bib
bibtimestamp: 2006.01.06 08:03:49 ???
URL: http://www.wiley-vch.de/publish/en/journals/alphabeticIndex/2250/
fjournal: Mitteilungen der Gesellschaft fur Angewandte Mathematik und Mechanik
keywords: accurate floating-point summation
language: German
remark: Contains MATLAB code for error-free accumulation of floating-point sums and scalar products.
acknowledgement: ack-nhfb
ajournal: GAMM Mitt., Ges. Angew. Math. Mech.
rawauthor: Gerhard Zielke and Volker Drygalla
rawtitle:
{Genaue L{\"o}sung linearer Gleichungssysteme}. ({German}) [{Exact} solution of linear systems of equations]

entry:
@Article{Zielke:2003:GLL,
  author =       "Gerhard Zielke and Volker Drygalla",
  title =        "{Genaue L{\"o}sung linearer Gleichungssysteme}.
                 ({German}) [{Exact} solution of linear systems of
                 equations]",
  journal =      j-GAMM-MIT,
  volume =       "26",
  number =       "??",
  pages =        "7--107",
  month =        "????",
  year =         "2003",
  ISSN =         "0936-7195",
  MRclass =      "65F99 (01A60 65-03 65G50 68-03)",
  MRnumber =     "MR2056620 (2005d:65069)",
  bibdate =      "Fri Jan 06 08:03:49 2006",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/matlab.bib",
  URL =          "http://www.wiley-vch.de/publish/en/journals/alphabeticIndex/2250/",
  acknowledgement = ack-nhfb,
  ajournal =     "GAMM Mitt., Ges. Angew. Math. Mech.",
  fjournal =     "Mitteilungen der Gesellschaft f{\"u}r Angewandte
                 Mathematik und Mechanik",
  keywords =     "accurate floating-point summation",
  language =     "German",
  remark =       "Contains MATLAB code for error-free accumulation of
                 floating-point sums and scalar products.",
  xxnote =       "No electronic copies available yet at publisher site,
                 and cannot find online copy in Web searches.",
}


bibtype: article
filename: fparith.bib
label: Ziv:2003:SGM
author: Abraham Ziv and Laurent Fournier
title: Solving the generalized mask constraint for test generation of binary floating point add operation
journal: j-THEOR-COMP-SCI
volume: 291
number: 2
pages: 183--201
day: 27
month: jan
monthnumber: 1
year: 2003
CODEN: TCSDIQ
ISSN: 0304-3975 (print), 1879-2294 (electronic) OR 03043975 (print), 18792294 (electronic)
ISSNL: 0304-3975 OR 03043975
MRclass: 68M07 (65G30)
MRnumber: MR1957439 (2004d:68005)
bibdate: Thu Nov 8 19:16:14 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.08 19:16:14 ???
note: Real numbers and computers (Schloss Dagstuhl, 2000)
fjournal: Theoretical Computer Science
keywords: floating-point testing
acknowledgement: ack-nhfb
journalURL: http://www.sciencedirect.com/science/journal/03043975
rawauthor: Abraham Ziv and Laurent Fournier
rawnote: Real numbers and computers (Schloss Dagstuhl, 2000)
rawtitle: Solving the generalized mask constraint for test generation of binary floating point add operation
entry:
@Article{Ziv:2003:SGM,
  author =       "Abraham Ziv and Laurent Fournier",
  title =        "Solving the generalized mask constraint for test
                 generation of binary floating point add operation",
  journal =      j-THEOR-COMP-SCI,
  volume =       "291",
  number =       "2",
  pages =        "183--201",
  day =          "27",
  month =        jan,
  year =         "2003",
  CODEN =        "TCSDIQ",
  ISSN =         "0304-3975 (print), 1879-2294 (electronic)",
  ISSN-L =       "0304-3975",
  MRclass =      "68M07 (65G30)",
  MRnumber =     "MR1957439 (2004d:68005)",
  bibdate =      "Thu Nov 8 19:16:14 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "Real numbers and computers (Schloss Dagstuhl, 2000)",
  acknowledgement = ack-nhfb,
  fjournal =     "Theoretical Computer Science",
  journal-URL =  "http://www.sciencedirect.com/science/journal/03043975",
  keywords =     "floating-point testing",
}


bibtype: inproceedings
filename: fparith.bib
label: Ziv:2003:SRC
author: Abraham Ziv and Merav Aharoni and Sigal Asaf
title: Solving range constraints for binary floating-point instructions
crossref: Bajard:2003:ISC
pages: 158--164
year: 2003
bibdate: Wed Nov 26 12:04:35 MST 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.26 12:04:35 MST
keywords: ARITH-16
remark: No PDF file at the ARITH-16 Web site, and no DOI for the IEEE Xplore Web site.
acknowledgement: ack-nhfb
rawauthor: Abraham Ziv and Merav Aharoni and Sigal Asaf
rawtitle: Solving range constraints for binary floating-point instructions
abstract:
We present algorithms that solve the following problem: given three ranges of floating-point numbers $ R_x $, $ R_y $, $ R_z $, a floating-point operation (op), and a rounding-mode (round), generate three floating-point numbers $ bar x $, $ bar y $, $ bar z $ such that $ bar x in R_x $, $ bar y in R_y $, $ bar z in R_z $ and $ bar z = mathfun round(bar x mathop op bar y) $. This problem, although quite simple when dealing with intervals of real numbers, is much more complex when considering ranges of machine numbers. We provide full solutions for add and subtract, and partial solutions for multiply and divide. We use range constraints on the input operands and on the result operand of floating-point instructions to target corner cases when generating test cases for use in verification of floating-point hardware. The algorithms have been implemented in a floating-point test-generator and are currently being used to verify floating-point units of several processors.

rawabstract:
We present algorithms that solve the following problem: given three ranges of floating-point numbers $ R_x $, $ R_y $, $ R_z $, a floating-point operation (op), and a rounding-mode (round), generate three floating-point numbers $ \bar {x} $, $ \bar {y} $, $ \bar {z} $ such that $ \bar {x} \in R_x $, $ \bar {y} \in R_y $, $ \bar {z} \in R_z $ and $ \bar {z} = \mathfun {round}(\bar {x} \mathop {op} \bar {y}) $. This problem, although quite simple when dealing with intervals of real numbers, is much more complex when considering ranges of machine numbers. We provide full solutions for add and subtract, and partial solutions for multiply and divide. We use range constraints on the input operands and on the result operand of floating-point instructions to target corner cases when generating test cases for use in verification of floating-point hardware. The algorithms have been implemented in a floating-point test-generator and are currently being used to verify floating-point units of several processors.

entry:
@InProceedings{Ziv:2003:SRC,
  author =       "Abraham Ziv and Merav Aharoni and Sigal Asaf",
  title =        "Solving range constraints for binary floating-point
                 instructions",
  crossref =     "Bajard:2003:ISC",
  pages =        "158--164",
  year =         "2003",
  bibdate =      "Wed Nov 26 12:04:35 MST 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "We present algorithms that solve the following
                 problem: given three ranges of floating-point numbers $
                 R_x $, $ R_y $, $ R_z $, a floating-point operation
                 (op), and a rounding-mode (round), generate three
                 floating-point numbers $ \bar {x} $, $ \bar {y} $, $
                 \bar {z} $ such that $ \bar {x} \in R_x $, $ \bar {y}
                 \in R_y $, $ \bar {z} \in R_z $ and $ \bar {z} =
                 \mathfun {round}(\bar {x} \mathop {op} \bar {y}) $.
                 This problem, although quite simple when dealing with
                 intervals of real numbers, is much more complex when
                 considering ranges of machine numbers. We provide full
                 solutions for add and subtract, and partial solutions
                 for multiply and divide. We use range constraints on
                 the input operands and on the result operand of
                 floating-point instructions to target corner cases when
                 generating test cases for use in verification of
                 floating-point hardware. The algorithms have been
                 implemented in a floating-point test-generator and are
                 currently being used to verify floating-point units of
                 several processors.",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH-16",
  remark =       "No PDF file at the ARITH-16 Web site, and no DOI for
                 the IEEE Xplore Web site.",
}


bibtype: article
filename: fparith.bib
label: Abbasbandy:2004:USA
author: S. Abbasbandy and M. A. Fariborzi Araghi
journal: j-APPL-NUM-MATH
volume: 50
number: 3--4
pages: 279--290
month: sep
monthnumber: 9
year: 2004
CODEN: ANMAEL
DOI: https://doi.org/10.1016/j.apnum.2004.01.003
ISSN: 0168-9274 (print), 1873-5460 (electronic) OR 01689274 (print), 18735460 (electronic)
ISSNL: 0168-9274 OR 01689274
bibdate: Sat May 14 10:50:47 MDT 2005
bibtimestamp: 2005.05.14 10:50:47 MDT
URL: http://www.sciencedirect.com/science/article/pii/S0168927404000066
fjournal: Applied Numerical Mathematics: Transactions of IMACS
acknowledgement: ack-nhfb
journalURL: http://www.sciencedirect.com/science/journal/01689274
rawauthor: S. Abbasbandy and M. A. Fariborzi Araghi
title:
The use of the stochastic arithmetic to estimate the value of interpolation polynomial with optimal degree

bibsource:
http://www.sciencedirect.com/science/journal/01689274; https://www.math.utah.edu/pub/tex/bib/applnummath.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib

rawtitle:
The use of the stochastic arithmetic to estimate the value of interpolation polynomial with optimal degree

entry:
@Article{Abbasbandy:2004:USA,
  author =       "S. Abbasbandy and M. A. Fariborzi Araghi",
  title =        "The use of the stochastic arithmetic to estimate the
                 value of interpolation polynomial with optimal degree",
  journal =      j-APPL-NUM-MATH,
  volume =       "50",
  number =       "3--4",
  pages =        "279--290",
  month =        sep,
  year =         "2004",
  CODEN =        "ANMAEL",
  DOI =          "https://doi.org/10.1016/j.apnum.2004.01.003",
  ISSN =         "0168-9274 (print), 1873-5460 (electronic)",
  ISSN-L =       "0168-9274",
  bibdate =      "Sat May 14 10:50:47 MDT 2005",
  bibsource =    "http://www.sciencedirect.com/science/journal/01689274;
                 https://www.math.utah.edu/pub/tex/bib/applnummath.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.sciencedirect.com/science/article/pii/S0168927404000066",
  acknowledgement = ack-nhfb,
  fjournal =     "Applied Numerical Mathematics: Transactions of IMACS",
  journal-URL =  "http://www.sciencedirect.com/science/journal/01689274",
}


bibtype: techreport
filename: fparith.bib
label: Akutin:2004:HOM
title: Highly Optimized Mathematical Functions for the IA-64 Architecture
type: Application note
number: 245410-011
institution: inst-INTEL
address: inst-INTEL:adr
pages: 14
day: 16
month: dec
monthnumber: 12
year: 2004
bibdate: Tue Nov 18 15:45:26 2008
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2008.11.18 15:45:26 ???
acknowledgement: ack-nhfb
rawtitle: Highly Optimized Mathematical Functions for the {IA-64} Architecture
author:
Yuri Akutin and Cristina Anderson and Marius Cornea and Alexey Ershov and Eugeny Gladkov and Evgeny Gvozdev and Bob Hanek and John Harrison and Alexander Isaev and Andrey Kolesov and Alexey Kovalev and Elena Luneva and Sergey Maidanov and Andrey Naraikin and Bob Norin and Pavel Shelepugin and Vladimir Sorokin and Shane Story and Ping Tak Peter Tang

URL:
ftp://download.intel.com/software/opensource/numerics/libm.pdf; http://www.intel.com/cd/software/products/asmo-na/eng/219868.htm; http://www.intel.com/cd/software/products/asmo-na/eng/219871.htm?prn=y

abstract:
Highly Optimized Mathematical Functions for the Intel Itanium Architecture Intel Corporation is providing Intel Itanium assembler source code to evaluate certain core mathematical support functions for the C and FORTRAN programming languages. The intent is that these should replace less optimized implementations that would normally be provided by the compiler or OS vendor. The functions work well on the Itanium 2 processor as well as the original Itanium processor.par The present document explains the rationale behind this decision and summarizes important information on performance and accuracy of the Intel-provided functions.

rawabstract:
Highly Optimized Mathematical Functions for the Intel Itanium Architecture Intel Corporation is providing Intel Itanium assembler source code to evaluate certain core mathematical support functions for the C and FORTRAN programming languages. The intent is that these should replace less optimized implementations that would normally be provided by the compiler or OS vendor. The functions work well on the Itanium 2 processor as well as the original Itanium processor.\par The present document explains the rationale behind this decision and summarizes important information on performance and accuracy of the Intel-provided functions.

rawauthor:
Yuri Akutin and Cristina Anderson and Marius Cornea and Alexey Ershov and Eugeny Gladkov and Evgeny Gvozdev and Bob Hanek and John Harrison and Alexander Isaev and Andrey Kolesov and Alexey Kovalev and Elena Luneva and Sergey Maidanov and Andrey Naraikin and Bob Norin and Pavel Shelepugin and Vladimir Sorokin and Shane Story and Ping Tak Peter Tang

entry:
@TechReport{Akutin:2004:HOM,
  author =       "Yuri Akutin and Cristina Anderson and Marius Cornea
                 and Alexey Ershov and Eugeny Gladkov and Evgeny Gvozdev
                 and Bob Hanek and John Harrison and Alexander Isaev and
                 Andrey Kolesov and Alexey Kovalev and Elena Luneva and
                 Sergey Maidanov and Andrey Naraikin and Bob Norin and
                 Pavel Shelepugin and Vladimir Sorokin and Shane Story
                 and Ping Tak Peter Tang",
  title =        "Highly Optimized Mathematical Functions for the
                 {IA-64} Architecture",
  type =         "Application note",
  number =       "245410-011",
  institution =  inst-INTEL,
  address =      inst-INTEL:adr,
  pages =        "14",
  day =          "16",
  month =        dec,
  year =         "2004",
  bibdate =      "Tue Nov 18 15:45:26 2008",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "ftp://download.intel.com/software/opensource/numerics/libm.pdf;
                 http://www.intel.com/cd/software/products/asmo-na/eng/219868.htm;
                 http://www.intel.com/cd/software/products/asmo-na/eng/219871.htm?prn=y",
  abstract =     "Highly Optimized Mathematical Functions for the Intel
                 Itanium Architecture Intel Corporation is providing
                 Intel Itanium assembler source code to evaluate certain
                 core mathematical support functions for the C and
                 FORTRAN programming languages. The intent is that these
                 should replace less optimized implementations that
                 would normally be provided by the compiler or OS
                 vendor. The functions work well on the Itanium 2
                 processor as well as the original Itanium
                 processor.\par

                 The present document explains the rationale behind this
                 decision and summarizes important information on
                 performance and accuracy of the Intel-provided
                 functions.",
  acknowledgement = ack-nhfb,
}


bibtype: book
filename: fparith.bib
label: Altman:2004:NIS
author: Micah Altman and Jeff Gill and Michael McDonald
title: Numerical Issues in Statistical Computing for the Social Scientist
publisher: pub-WILEY
address: pub-WILEY:adr
pages: xv + 323
year: 2004
DOI: https://doi.org/10.1002/0471475769
LCCN: QA276.4 .A398 2004
bibdate: Thu Oct 17 17:33:39 MDT 2019
bibtimestamp: 2019.10.17 17:33:39 MDT
subject: Estadistica; Informatica; Ciencies socials; Metodes estadistics
acknowledgement: ack-nhfb
rawauthor: Micah Altman and Jeff Gill and Michael McDonald
rawtitle: Numerical Issues in Statistical Computing for the Social Scientist
ISBN:
0-471-23633-0, 0-471-47574-2 (e-book), 0-471-47576-9 (e-book) OR 0471236330, 0471475742 (ebook), 0471475769 (ebook)

ISBN13:
978-0-471-23633-7, 978-0-471-47574-3 (e-book), 978-0-471-47576-7 (e-book) OR 9780471236337, 9780471475743 (ebook), 9780471475767 (ebook)

bibsource:
fsz3950.oclc.org:210/WorldCat; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/numana2000.bib; https://www.math.utah.edu/pub/tex/bib/prng.bib; z3950.loc.gov:7090/Voyage

abstract:
At last --- a social scientist's guide through the pitfalls of modern statistical computing. Addressing the current deficiency in the literature on statistical methods as they apply to the social and behavioral sciences, booktitle Numerical Issues in Statistical Computing for the Social Scientist seeks to provide readers with a unique practical guidebook to the numerical methods underlying computerized statistical calculations specific to these fields. The authors demonstrate that knowledge of these numerical methods and how they are used in statistical packages is essential for making accurate inferences.

TOC:
1: Introduction: Consequences of Numerical Inaccuracy / 1 1.1: Importance of Understanding Computational Statistics / 1 1.2: Brief History: Duhem to the Twenty-First Century / 3 1.3: Motivating Example: Rare Events Counts Models / 6 2: Sources of Inaccuracy in Statistical Computation / 12 2.1.1: Revealing Example: Computing the Coefficient Standard Deviation / 12 2.1.2: Some Preliminary Conclusions / 13 2.2: Fundamental Theoretical Concepts / 15 2.2.1: Accuracy and Precision / 15 2.2.2: Problems, Algorithms, and Implementations / 15 2.3: Accuracy and Correct Inference / 18 2.3.1: Brief Digression: Why Statistical Inference Is Harder in Practice Than It Appears / 20 2.4: Sources of Implementation Errors / 21 2.4.1: Bugs, Errors, and Annoyances / 22 2.4.2: Computer Arithmetic / 23 2.5: Algorithmic Limitations / 29 2.5.1: Randomized Algorithms / 30 2.5.2: Approximation Algorithms for Statistical Functions / 31 2.5.3: Heuristic Algorithms for Random Number Generation / 32 2.5.4: Local Search Algorithms / 39 3: Evaluating Statistical Software / 44 3.1.1: Strategies for Evaluating Accuracy / 44 3.1.2: Conditioning / 47 3.2: Benchmarks for Statistical Packages / 48 3.2.1: NIST Statistical Reference Datasets / 49 3.2.2: Benchmarking Nonlinear Problems with StRD / 51 3.2.3: Analyzing StRD Test Results / 53 3.2.4: Empirical Tests of Pseudo-Random Number Generation / 54 3.2.5: Tests of Distribution Functions / 58 3.2.6: Testing the Accuracy of Data Input and Output / 60 3.3: General Features Supporting Accurate and Reproducible Results / 63 3.4: Comparison of Some Popular Statistical Packages / 64 3.5: Reproduction of Research / 65 3.6: Choosing a Statistical Package / 69 4: Robust Inference / 71 4.3: Sensitivity Tests / 73 4.3.1: Sensitivity to Alternative Implementations and Algorithms / 73 4.3.2: Perturbation Tests / 75 4.3.3: Tests of Global Optimality / 84 4.4: Obtaining More Accurate Results / 91 4.4.1: High-Precision Mathematical Libraries / 92 4.4.2: Increasing the Precision of Intermediate Calculations / 93 4.4.3: Selecting Optimization Methods / 95 4.5: Inference for Computationally Difficult Problems / 103 4.5.1: Obtaining Confidence Intervals with Ill-Behaved Functions / 104 4.5.2: Interpreting Results in the Presence of Multiple Modes / 106 4.5.3: Inference in the Presence of Instability / 114 5: Numerical Issues in Markov Chain Monte Carlo Estimation / 118 5.2: Background and History / 119 5.3: Essential Markov Chain Theory / 120 5.3.1: Measure and Probability Preliminaries / 120 5.3.2: Markov Chain Properties / 121 5.3.3: The Final Word (Sort of) / 125 5.4: Mechanics of Common MCMC Algorithms / 126 5.4.1: Metropolis--Hastings Algorithm / 126 5.4.2: Hit-and-Run Algorithm / 127 5.4.3: Gibbs Sampler / 128 5.5: Role of Random Number Generation / 129 5.5.1: Periodicity of Generators and MCMC Effects / 130 5.5.2: Periodicity and Convergence / 132 5.5.3: Example: The Slice Sampler / 135 5.5.4: Evaluating WinBUGS / 137 5.6: Absorbing State Problem / 139 5.7: Regular Monte Carlo Simulation / 140 5.8: So What Can Be Done? / 141 6: Numerical Issues Involved in Inverting Hessian Matrices / Jeff Gill, Gary King / 143 6.2: Means versus Modes / 145 6.3: Developing a Solution Using Bayesian Simulation Tools / 147 6.4: What Is It That Bayesians Do? / 148 6.5: Problem in Detail: Noninvertible Hessians / 149 6.6: Generalized Inverse/Generalized Cholesky Solution / 151 6.7: Generalized Inverse / 151 6.7.1: Numerical Examples of the Generalized Inverse / 154 6.8: Generalized Cholesky Decomposition / 155 6.8.1: Standard Algorithm / 156 6.8.2: Gill--Murray Cholesky Factorization / 156 6.8.3: Schnabel--Eskow Cholesky Factorization / 158 6.8.4: Numerical Examples of the Generalized Cholesky Decomposition / 158 6.9: Importance Sampling and Sampling Importance Resampling / 160 6.9.1: Algorithm Details / 160 6.9.2: SIR Output / 162 6.9.3: Relevance to the Generalized Process / 163 6.10: Public Policy Analysis Example / 163 6.10.1: Texas / 164 6.10.2: Florida / 168 6.11: Alternative Methods / 171 6.11.1: Drawing from the Singular Normal / 171 6.11.2: Aliasing / 173 6.11.3: Ridge Regression / 173 6.11.4: Derivative Approach / 174 6.11.5: Bootstrapping / 174 6.11.6: Respecification (Redux) / 175 7: Numerical Behavior of King's EI Method / 177 7.2: Ecological Inference Problem and Proposed Solutions / 179 7.3: Numeric Accuracy in Ecological Inference / 180 7.3.1: Case Study 1: Examples from King (1997) / 182 7.3.2: Nonlinear Optimization / 186 7.3.3: Pseudo-Random Number Generation / 187 7.3.4: Platform and Version Sensitivity / 188 7.4: Case Study 2: Burden and Kimball (1998) / 189 7.4.1: Data Perturbation / 191 7.4.2: Option Dependence / 194 7.4.3: Platform Dependence / 195 7.4.4: Discussion: Summarizing Uncertainty / 196 8: Some Details of Nonlinear Estimation / B.D. McCullough / 199 8.2: Overview of Algorithms / 200 8.3: Some Numerical Details / 204 8.4: What Can Go Wrong? / 206 8.5: Four Steps / 210 8.5.1 Step 1: Examine the Gradient / 211 8.5.2 Step 2: Inspect the Trace / 211 8.5.3 Step 3: Analyze the Hessian / 212 8.5.4 Step 4: Profile the Objective Function / 212 8.6: Wald versus Likelihood Inference / 215 9: Spatial Regression Models / James P. LeSage / 219 9.2: Sample Data Associated with Map Locations / 219 9.2.1: Spatial Dependence / 219 9.2.2: Specifying Dependence Using Weight Matrices / 220 9.2.3: Estimation Consequences of Spatial Dependence / 222 9.3: Maximum Likelihood Estimation of Spatial Models / 223 9.3.1: Sparse Matrix Algorithms / 224 9.3.2: Vectorization of the Optimization Problem / 225 9.3.3: Trade-offs between Speed and Numerical Accuracy / 226 9.3.4: Applied Illustrations / 228 9.4: Bayesian Spatial Regression Models / 229 9.4.1: Bayesian Heteroscedastic Spatial Models / 230 9.4.2: Estimation of Bayesian Spatial Models / 231 9.4.3: Conditional Distributions for the SAR Model / 232 9.4.4: MCMC Sampler / 234 9.4.5: Illustration of the Bayesian Model / 234 10: Convergence Problems in Logistic Regression / Paul Allison / 238 10.2: Overview of Logistic Maximum Likelihood Estimation / 238 10.3: What Can Go Wrong? / 240 10.4: Behavior of the Newton--Raphson Algorithm under Separation / 243 10.4.1: Specific Implementations / 244 10.4.2: Warning Messages / 244 10.4.3: False Convergence / 246 10.4.4: Reporting of Parameter Estimates and Standard Errors / 247 10.4.5: Likelihood Ratio Statistics / 247 10.5: Diagnosis of Separation Problems / 247 10.6: Solutions for Quasi-Complete Separation / 248 10.6.1: Deletion of Problem Variables / 248 10.6.2: Combining Categories / 248 10.6.3: Do Nothing and Report Likelihood Ratio Chi-Squares / 249 10.6.4: Exact Inference / 249 10.6.5: Bayesian Estimation / 250 10.6.6: Penalized Maximum Likelihood Estimation / 250 10.7: Solutions for Complete Separation / 251 10.8: Extensions / 252 11: Recommendations for Replication and Accurate Analysis / 253 11.1: General Recommendations for Replication / 253 11.1.1: Reproduction, Replication, and Verification / 254 11.1.2: Recreating Data / 255 11.1.3: Inputting Data / 256 11.1.4: Analyzing Data / 257 11.2: Recommendations for Producing Verifiable Results / 259 11.3: General Recommendations for Improving the Numeric Accuracy of Analysis / 260 11.4: Recommendations for Particular Statistical Models / 261 11.4.1: Nonlinear Least Squares and Maximum Likelihood / 261 11.4.2: Robust Hessian Inversion / 262 11.4.3: MCMC Estimation / 263 11.4.4: Logistic Regression / 265 11.4.5: Spatial Regression / 266 Where Do We Go from Here? / 266 Bibliography / 267 Author Index / 303 Subject Index / 315

rawabstract:
At last --- a social scientist's guide through the pitfalls of modern statistical computing. Addressing the current deficiency in the literature on statistical methods as they apply to the social and behavioral sciences, \booktitle{Numerical Issues in Statistical Computing for the Social Scientist} seeks to provide readers with a unique practical guidebook to the numerical methods underlying computerized statistical calculations specific to these fields. The authors demonstrate that knowledge of these numerical methods and how they are used in statistical packages is essential for making accurate inferences.

rawTOC:
1: Introduction: Consequences of Numerical Inaccuracy / 1 \\ 1.1: Importance of Understanding Computational Statistics / 1 \\ 1.2: Brief History: Duhem to the Twenty-First Century / 3 \\ 1.3: Motivating Example: Rare Events Counts Models / 6 \\ 2: Sources of Inaccuracy in Statistical Computation / 12 \\ 2.1.1: Revealing Example: Computing the Coefficient Standard Deviation / 12 \\ 2.1.2: Some Preliminary Conclusions / 13 \\ 2.2: Fundamental Theoretical Concepts / 15 \\ 2.2.1: Accuracy and Precision / 15 \\ 2.2.2: Problems, Algorithms, and Implementations / 15 \\ 2.3: Accuracy and Correct Inference / 18 \\ 2.3.1: Brief Digression: Why Statistical Inference Is Harder in Practice Than It Appears / 20 \\ 2.4: Sources of Implementation Errors / 21 \\ 2.4.1: Bugs, Errors, and Annoyances / 22 \\ 2.4.2: Computer Arithmetic / 23 \\ 2.5: Algorithmic Limitations / 29 \\ 2.5.1: Randomized Algorithms / 30 \\ 2.5.2: Approximation Algorithms for Statistical Functions / 31 \\ 2.5.3: Heuristic Algorithms for Random Number Generation / 32 \\ 2.5.4: Local Search Algorithms / 39 \\ 3: Evaluating Statistical Software / 44 \\ 3.1.1: Strategies for Evaluating Accuracy / 44 \\ 3.1.2: Conditioning / 47 \\ 3.2: Benchmarks for Statistical Packages / 48 \\ 3.2.1: NIST Statistical Reference Datasets / 49 \\ 3.2.2: Benchmarking Nonlinear Problems with StRD / 51 \\ 3.2.3: Analyzing StRD Test Results / 53 \\ 3.2.4: Empirical Tests of Pseudo-Random Number Generation / 54 \\ 3.2.5: Tests of Distribution Functions / 58 \\ 3.2.6: Testing the Accuracy of Data Input and Output / 60 \\ 3.3: General Features Supporting Accurate and Reproducible Results / 63 \\ 3.4: Comparison of Some Popular Statistical Packages / 64 \\ 3.5: Reproduction of Research / 65 \\ 3.6: Choosing a Statistical Package / 69 \\ 4: Robust Inference / 71 \\ 4.3: Sensitivity Tests / 73 \\ 4.3.1: Sensitivity to Alternative Implementations and Algorithms / 73 \\ 4.3.2: Perturbation Tests / 75 \\ 4.3.3: Tests of Global Optimality / 84 \\ 4.4: Obtaining More Accurate Results / 91 \\ 4.4.1: High-Precision Mathematical Libraries / 92 \\ 4.4.2: Increasing the Precision of Intermediate Calculations / 93 \\ 4.4.3: Selecting Optimization Methods / 95 \\ 4.5: Inference for Computationally Difficult Problems / 103 \\ 4.5.1: Obtaining Confidence Intervals with Ill-Behaved Functions / 104 \\ 4.5.2: Interpreting Results in the Presence of Multiple Modes / 106 \\ 4.5.3: Inference in the Presence of Instability / 114 \\ 5: Numerical Issues in Markov Chain Monte Carlo Estimation / 118 \\ 5.2: Background and History / 119 \\ 5.3: Essential Markov Chain Theory / 120 \\ 5.3.1: Measure and Probability Preliminaries / 120 \\ 5.3.2: Markov Chain Properties / 121 \\ 5.3.3: The Final Word (Sort of) / 125 \\ 5.4: Mechanics of Common MCMC Algorithms / 126 \\ 5.4.1: Metropolis--Hastings Algorithm / 126 \\ 5.4.2: Hit-and-Run Algorithm / 127 \\ 5.4.3: Gibbs Sampler / 128 \\ 5.5: Role of Random Number Generation / 129 \\ 5.5.1: Periodicity of Generators and MCMC Effects / 130 \\ 5.5.2: Periodicity and Convergence / 132 \\ 5.5.3: Example: The Slice Sampler / 135 \\ 5.5.4: Evaluating WinBUGS / 137 \\ 5.6: Absorbing State Problem / 139 \\ 5.7: Regular Monte Carlo Simulation / 140 \\ 5.8: So What Can Be Done? / 141 \\ 6: Numerical Issues Involved in Inverting Hessian Matrices / Jeff Gill, Gary King / 143 \\ 6.2: Means versus Modes / 145 \\ 6.3: Developing a Solution Using Bayesian Simulation Tools / 147 \\ 6.4: What Is It That Bayesians Do? / 148 \\ 6.5: Problem in Detail: Noninvertible Hessians / 149 \\ 6.6: Generalized Inverse/Generalized Cholesky Solution / 151 \\ 6.7: Generalized Inverse / 151 \\ 6.7.1: Numerical Examples of the Generalized Inverse / 154 \\ 6.8: Generalized Cholesky Decomposition / 155 \\ 6.8.1: Standard Algorithm / 156 \\ 6.8.2: Gill--Murray Cholesky Factorization / 156 \\ 6.8.3: Schnabel--Eskow Cholesky Factorization / 158 \\ 6.8.4: Numerical Examples of the Generalized Cholesky Decomposition / 158 \\ 6.9: Importance Sampling and Sampling Importance Resampling / 160 \\ 6.9.1: Algorithm Details / 160 \\ 6.9.2: SIR Output / 162 \\ 6.9.3: Relevance to the Generalized Process / 163 \\ 6.10: Public Policy Analysis Example / 163 \\ 6.10.1: Texas / 164 \\ 6.10.2: Florida / 168 \\ 6.11: Alternative Methods / 171 \\ 6.11.1: Drawing from the Singular Normal / 171 \\ 6.11.2: Aliasing / 173 \\ 6.11.3: Ridge Regression / 173 \\ 6.11.4: Derivative Approach / 174 \\ 6.11.5: Bootstrapping / 174 \\ 6.11.6: Respecification (Redux) / 175 \\ 7: Numerical Behavior of King's EI Method / 177 \\ 7.2: Ecological Inference Problem and Proposed Solutions / 179 \\ 7.3: Numeric Accuracy in Ecological Inference / 180 \\ 7.3.1: Case Study 1: Examples from King (1997) / 182 \\ 7.3.2: Nonlinear Optimization / 186 \\ 7.3.3: Pseudo-Random Number Generation / 187 \\ 7.3.4: Platform and Version Sensitivity / 188 \\ 7.4: Case Study 2: Burden and Kimball (1998) / 189 \\ 7.4.1: Data Perturbation / 191 \\ 7.4.2: Option Dependence / 194 \\ 7.4.3: Platform Dependence / 195 \\ 7.4.4: Discussion: Summarizing Uncertainty / 196 \\ 8: Some Details of Nonlinear Estimation / B.D. McCullough / 199 \\ 8.2: Overview of Algorithms / 200 \\ 8.3: Some Numerical Details / 204 \\ 8.4: What Can Go Wrong? / 206 \\ 8.5: Four Steps / 210 \\ 8.5.1 Step 1: Examine the Gradient / 211 \\ 8.5.2 Step 2: Inspect the Trace / 211 \\ 8.5.3 Step 3: Analyze the Hessian / 212 \\ 8.5.4 Step 4: Profile the Objective Function / 212 \\ 8.6: Wald versus Likelihood Inference / 215 \\ 9: Spatial Regression Models / James P. LeSage / 219 \\ 9.2: Sample Data Associated with Map Locations / 219 \\ 9.2.1: Spatial Dependence / 219 \\ 9.2.2: Specifying Dependence Using Weight Matrices / 220 \\ 9.2.3: Estimation Consequences of Spatial Dependence / 222 \\ 9.3: Maximum Likelihood Estimation of Spatial Models / 223 \\ 9.3.1: Sparse Matrix Algorithms / 224 \\ 9.3.2: Vectorization of the Optimization Problem / 225 \\ 9.3.3: Trade-offs between Speed and Numerical Accuracy / 226 \\ 9.3.4: Applied Illustrations / 228 \\ 9.4: Bayesian Spatial Regression Models / 229 \\ 9.4.1: Bayesian Heteroscedastic Spatial Models / 230 \\ 9.4.2: Estimation of Bayesian Spatial Models / 231 \\ 9.4.3: Conditional Distributions for the SAR Model / 232 \\ 9.4.4: MCMC Sampler / 234 \\ 9.4.5: Illustration of the Bayesian Model / 234 \\ 10: Convergence Problems in Logistic Regression / Paul Allison / 238 \\ 10.2: Overview of Logistic Maximum Likelihood Estimation / 238 \\ 10.3: What Can Go Wrong? / 240 \\ 10.4: Behavior of the Newton--Raphson Algorithm under Separation / 243 \\ 10.4.1: Specific Implementations / 244 \\ 10.4.2: Warning Messages / 244 \\ 10.4.3: False Convergence / 246 \\ 10.4.4: Reporting of Parameter Estimates and Standard Errors / 247 \\ 10.4.5: Likelihood Ratio Statistics / 247 \\ 10.5: Diagnosis of Separation Problems / 247 \\ 10.6: Solutions for Quasi-Complete Separation / 248 \\ 10.6.1: Deletion of Problem Variables / 248 \\ 10.6.2: Combining Categories / 248 \\ 10.6.3: Do Nothing and Report Likelihood Ratio Chi-Squares / 249 \\ 10.6.4: Exact Inference / 249 \\ 10.6.5: Bayesian Estimation / 250 \\ 10.6.6: Penalized Maximum Likelihood Estimation / 250 \\ 10.7: Solutions for Complete Separation / 251 \\ 10.8: Extensions / 252 \\ 11: Recommendations for Replication and Accurate Analysis / 253 \\ 11.1: General Recommendations for Replication / 253 \\ 11.1.1: Reproduction, Replication, and Verification / 254 \\ 11.1.2: Recreating Data / 255 \\ 11.1.3: Inputting Data / 256 \\ 11.1.4: Analyzing Data / 257 \\ 11.2: Recommendations for Producing Verifiable Results / 259 \\ 11.3: General Recommendations for Improving the Numeric Accuracy of Analysis / 260 \\ 11.4: Recommendations for Particular Statistical Models / 261 \\ 11.4.1: Nonlinear Least Squares and Maximum Likelihood / 261 \\ 11.4.2: Robust Hessian Inversion / 262 \\ 11.4.3: MCMC Estimation / 263 \\ 11.4.4: Logistic Regression / 265 \\ 11.4.5: Spatial Regression / 266 \\ Where Do We Go from Here? / 266 \\ Bibliography / 267 \\ Author Index / 303 \\ Subject Index / 315

entry:
@Book{Altman:2004:NIS,
  author =       "Micah Altman and Jeff Gill and Michael McDonald",
  title =        "Numerical Issues in Statistical Computing for the
                 Social Scientist",
  publisher =    pub-WILEY,
  address =      pub-WILEY:adr,
  pages =        "xv + 323",
  year =         "2004",
  DOI =          "https://doi.org/10.1002/0471475769",
  ISBN =         "0-471-23633-0, 0-471-47574-2 (e-book), 0-471-47576-9
                 (e-book)",
  ISBN-13 =      "978-0-471-23633-7, 978-0-471-47574-3 (e-book),
                 978-0-471-47576-7 (e-book)",
  LCCN =         "QA276.4 .A398 2004",
  bibdate =      "Thu Oct 17 17:33:39 MDT 2019",
  bibsource =    "fsz3950.oclc.org:210/WorldCat;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/numana2000.bib;
                 https://www.math.utah.edu/pub/tex/bib/prng.bib;
                 z3950.loc.gov:7090/Voyage",
  abstract =     "At last --- a social scientist's guide through the
                 pitfalls of modern statistical computing. Addressing
                 the current deficiency in the literature on statistical
                 methods as they apply to the social and behavioral
                 sciences, \booktitle{Numerical Issues in Statistical
                 Computing for the Social Scientist} seeks to provide
                 readers with a unique practical guidebook to the
                 numerical methods underlying computerized statistical
                 calculations specific to these fields. The authors
                 demonstrate that knowledge of these numerical methods
                 and how they are used in statistical packages is
                 essential for making accurate inferences.",
  acknowledgement = ack-nhfb,
  subject =      "Estad{\'i}stica; Inform{\`a}tica; Ci{\`e}ncies
                 socials; M{\`e}todes estad{\'i}stics",
  tableofcontents = "1: Introduction: Consequences of Numerical
                 Inaccuracy / 1 \\
                 1.1: Importance of Understanding Computational
                 Statistics / 1 \\
                 1.2: Brief History: Duhem to the Twenty-First Century /
                 3 \\
                 1.3: Motivating Example: Rare Events Counts Models / 6
                 \\
                 2: Sources of Inaccuracy in Statistical Computation /
                 12 \\
                 2.1.1: Revealing Example: Computing the Coefficient
                 Standard Deviation / 12 \\
                 2.1.2: Some Preliminary Conclusions / 13 \\
                 2.2: Fundamental Theoretical Concepts / 15 \\
                 2.2.1: Accuracy and Precision / 15 \\
                 2.2.2: Problems, Algorithms, and Implementations / 15
                 \\
                 2.3: Accuracy and Correct Inference / 18 \\
                 2.3.1: Brief Digression: Why Statistical Inference Is
                 Harder in Practice Than It Appears / 20 \\
                 2.4: Sources of Implementation Errors / 21 \\
                 2.4.1: Bugs, Errors, and Annoyances / 22 \\
                 2.4.2: Computer Arithmetic / 23 \\
                 2.5: Algorithmic Limitations / 29 \\
                 2.5.1: Randomized Algorithms / 30 \\
                 2.5.2: Approximation Algorithms for Statistical
                 Functions / 31 \\
                 2.5.3: Heuristic Algorithms for Random Number
                 Generation / 32 \\
                 2.5.4: Local Search Algorithms / 39 \\
                 3: Evaluating Statistical Software / 44 \\
                 3.1.1: Strategies for Evaluating Accuracy / 44 \\
                 3.1.2: Conditioning / 47 \\
                 3.2: Benchmarks for Statistical Packages / 48 \\
                 3.2.1: NIST Statistical Reference Datasets / 49 \\
                 3.2.2: Benchmarking Nonlinear Problems with StRD / 51
                 \\
                 3.2.3: Analyzing StRD Test Results / 53 \\
                 3.2.4: Empirical Tests of Pseudo-Random Number
                 Generation / 54 \\
                 3.2.5: Tests of Distribution Functions / 58 \\
                 3.2.6: Testing the Accuracy of Data Input and Output /
                 60 \\
                 3.3: General Features Supporting Accurate and
                 Reproducible Results / 63 \\
                 3.4: Comparison of Some Popular Statistical Packages /
                 64 \\
                 3.5: Reproduction of Research / 65 \\
                 3.6: Choosing a Statistical Package / 69 \\
                 4: Robust Inference / 71 \\
                 4.3: Sensitivity Tests / 73 \\
                 4.3.1: Sensitivity to Alternative Implementations and
                 Algorithms / 73 \\
                 4.3.2: Perturbation Tests / 75 \\
                 4.3.3: Tests of Global Optimality / 84 \\
                 4.4: Obtaining More Accurate Results / 91 \\
                 4.4.1: High-Precision Mathematical Libraries / 92 \\
                 4.4.2: Increasing the Precision of Intermediate
                 Calculations / 93 \\
                 4.4.3: Selecting Optimization Methods / 95 \\
                 4.5: Inference for Computationally Difficult Problems /
                 103 \\
                 4.5.1: Obtaining Confidence Intervals with Ill-Behaved
                 Functions / 104 \\
                 4.5.2: Interpreting Results in the Presence of Multiple
                 Modes / 106 \\
                 4.5.3: Inference in the Presence of Instability / 114
                 \\
                 5: Numerical Issues in Markov Chain Monte Carlo
                 Estimation / 118 \\
                 5.2: Background and History / 119 \\
                 5.3: Essential Markov Chain Theory / 120 \\
                 5.3.1: Measure and Probability Preliminaries / 120 \\
                 5.3.2: Markov Chain Properties / 121 \\
                 5.3.3: The Final Word (Sort of) / 125 \\
                 5.4: Mechanics of Common MCMC Algorithms / 126 \\
                 5.4.1: Metropolis--Hastings Algorithm / 126 \\
                 5.4.2: Hit-and-Run Algorithm / 127 \\
                 5.4.3: Gibbs Sampler / 128 \\
                 5.5: Role of Random Number Generation / 129 \\
                 5.5.1: Periodicity of Generators and MCMC Effects / 130
                 \\
                 5.5.2: Periodicity and Convergence / 132 \\
                 5.5.3: Example: The Slice Sampler / 135 \\
                 5.5.4: Evaluating WinBUGS / 137 \\
                 5.6: Absorbing State Problem / 139 \\
                 5.7: Regular Monte Carlo Simulation / 140 \\
                 5.8: So What Can Be Done? / 141 \\
                 6: Numerical Issues Involved in Inverting Hessian
                 Matrices / Jeff Gill, Gary King / 143 \\
                 6.2: Means versus Modes / 145 \\
                 6.3: Developing a Solution Using Bayesian Simulation
                 Tools / 147 \\
                 6.4: What Is It That Bayesians Do? / 148 \\
                 6.5: Problem in Detail: Noninvertible Hessians / 149
                 \\
                 6.6: Generalized Inverse/Generalized Cholesky Solution
                 / 151 \\
                 6.7: Generalized Inverse / 151 \\
                 6.7.1: Numerical Examples of the Generalized Inverse /
                 154 \\
                 6.8: Generalized Cholesky Decomposition / 155 \\
                 6.8.1: Standard Algorithm / 156 \\
                 6.8.2: Gill--Murray Cholesky Factorization / 156 \\
                 6.8.3: Schnabel--Eskow Cholesky Factorization / 158 \\
                 6.8.4: Numerical Examples of the Generalized Cholesky
                 Decomposition / 158 \\
                 6.9: Importance Sampling and Sampling Importance
                 Resampling / 160 \\
                 6.9.1: Algorithm Details / 160 \\
                 6.9.2: SIR Output / 162 \\
                 6.9.3: Relevance to the Generalized Process / 163 \\
                 6.10: Public Policy Analysis Example / 163 \\
                 6.10.1: Texas / 164 \\
                 6.10.2: Florida / 168 \\
                 6.11: Alternative Methods / 171 \\
                 6.11.1: Drawing from the Singular Normal / 171 \\
                 6.11.2: Aliasing / 173 \\
                 6.11.3: Ridge Regression / 173 \\
                 6.11.4: Derivative Approach / 174 \\
                 6.11.5: Bootstrapping / 174 \\
                 6.11.6: Respecification (Redux) / 175 \\
                 7: Numerical Behavior of King's EI Method / 177 \\
                 7.2: Ecological Inference Problem and Proposed
                 Solutions / 179 \\
                 7.3: Numeric Accuracy in Ecological Inference / 180 \\
                 7.3.1: Case Study 1: Examples from King (1997) / 182
                 \\
                 7.3.2: Nonlinear Optimization / 186 \\
                 7.3.3: Pseudo-Random Number Generation / 187 \\
                 7.3.4: Platform and Version Sensitivity / 188 \\
                 7.4: Case Study 2: Burden and Kimball (1998) / 189 \\
                 7.4.1: Data Perturbation / 191 \\
                 7.4.2: Option Dependence / 194 \\
                 7.4.3: Platform Dependence / 195 \\
                 7.4.4: Discussion: Summarizing Uncertainty / 196 \\
                 8: Some Details of Nonlinear Estimation / B.D.
                 McCullough / 199 \\
                 8.2: Overview of Algorithms / 200 \\
                 8.3: Some Numerical Details / 204 \\
                 8.4: What Can Go Wrong? / 206 \\
                 8.5: Four Steps / 210 \\
                 8.5.1 Step 1: Examine the Gradient / 211 \\
                 8.5.2 Step 2: Inspect the Trace / 211 \\
                 8.5.3 Step 3: Analyze the Hessian / 212 \\
                 8.5.4 Step 4: Profile the Objective Function / 212 \\
                 8.6: Wald versus Likelihood Inference / 215 \\
                 9: Spatial Regression Models / James P. LeSage / 219
                 \\
                 9.2: Sample Data Associated with Map Locations / 219
                 \\
                 9.2.1: Spatial Dependence / 219 \\
                 9.2.2: Specifying Dependence Using Weight Matrices /
                 220 \\
                 9.2.3: Estimation Consequences of Spatial Dependence /
                 222 \\
                 9.3: Maximum Likelihood Estimation of Spatial Models /
                 223 \\
                 9.3.1: Sparse Matrix Algorithms / 224 \\
                 9.3.2: Vectorization of the Optimization Problem / 225
                 \\
                 9.3.3: Trade-offs between Speed and Numerical Accuracy
                 / 226 \\
                 9.3.4: Applied Illustrations / 228 \\
                 9.4: Bayesian Spatial Regression Models / 229 \\
                 9.4.1: Bayesian Heteroscedastic Spatial Models / 230
                 \\
                 9.4.2: Estimation of Bayesian Spatial Models / 231 \\
                 9.4.3: Conditional Distributions for the SAR Model /
                 232 \\
                 9.4.4: MCMC Sampler / 234 \\
                 9.4.5: Illustration of the Bayesian Model / 234 \\
                 10: Convergence Problems in Logistic Regression / Paul
                 Allison / 238 \\
                 10.2: Overview of Logistic Maximum Likelihood
                 Estimation / 238 \\
                 10.3: What Can Go Wrong? / 240 \\
                 10.4: Behavior of the Newton--Raphson Algorithm under
                 Separation / 243 \\
                 10.4.1: Specific Implementations / 244 \\
                 10.4.2: Warning Messages / 244 \\
                 10.4.3: False Convergence / 246 \\
                 10.4.4: Reporting of Parameter Estimates and Standard
                 Errors / 247 \\
                 10.4.5: Likelihood Ratio Statistics / 247 \\
                 10.5: Diagnosis of Separation Problems / 247 \\
                 10.6: Solutions for Quasi-Complete Separation / 248 \\
                 10.6.1: Deletion of Problem Variables / 248 \\
                 10.6.2: Combining Categories / 248 \\
                 10.6.3: Do Nothing and Report Likelihood Ratio
                 Chi-Squares / 249 \\
                 10.6.4: Exact Inference / 249 \\
                 10.6.5: Bayesian Estimation / 250 \\
                 10.6.6: Penalized Maximum Likelihood Estimation / 250
                 \\
                 10.7: Solutions for Complete Separation / 251 \\
                 10.8: Extensions / 252 \\
                 11: Recommendations for Replication and Accurate
                 Analysis / 253 \\
                 11.1: General Recommendations for Replication / 253 \\
                 11.1.1: Reproduction, Replication, and Verification /
                 254 \\
                 11.1.2: Recreating Data / 255 \\
                 11.1.3: Inputting Data / 256 \\
                 11.1.4: Analyzing Data / 257 \\
                 11.2: Recommendations for Producing Verifiable Results
                 / 259 \\
                 11.3: General Recommendations for Improving the Numeric
                 Accuracy of Analysis / 260 \\
                 11.4: Recommendations for Particular Statistical Models
                 / 261 \\
                 11.4.1: Nonlinear Least Squares and Maximum Likelihood
                 / 261 \\
                 11.4.2: Robust Hessian Inversion / 262 \\
                 11.4.3: MCMC Estimation / 263 \\
                 11.4.4: Logistic Regression / 265 \\
                 11.4.5: Spatial Regression / 266 \\
                 Where Do We Go from Here? / 266 \\
                 Bibliography / 267 \\
                 Author Index / 303 \\
                 Subject Index / 315",
}


bibtype: article
filename: fparith.bib
label: Assimakopoulos:2004:IRM
author: C. Assimakopoulos and F.-N. Pavlidou
title: Integrated rounding method for real number bit distribution over DMT systems
journal: j-ELECT-LETTERS
volume: 40
number: 19
pages: 1235--1236
day: 16
month: sep
monthnumber: 9
year: 2004
CODEN: ELLEAK
ISSN: 0013-5194 (print), 1350-911X (electronic) OR 00135194 (print), 1350911X (electronic)
ISSNL: 0013-5194 OR 00135194
bibdate: Sat Jul 16 11:25:05 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 11:25:05 MDT
fjournal: Electronics Letters
acknowledgement: ack-nhfb
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=2220
rawauthor: C. Assimakopoulos and F.-N. Pavlidou
rawtitle: Integrated rounding method for real number bit distribution over {DMT} systems
entry:
@Article{Assimakopoulos:2004:IRM,
  author =       "C. Assimakopoulos and F.-N. Pavlidou",
  title =        "Integrated rounding method for real number bit
                 distribution over {DMT} systems",
  journal =      j-ELECT-LETTERS,
  volume =       "40",
  number =       "19",
  pages =        "1235--1236",
  day =          "16",
  month =        sep,
  year =         "2004",
  CODEN =        "ELLEAK",
  ISSN =         "0013-5194 (print), 1350-911X (electronic)",
  ISSN-L =       "0013-5194",
  bibdate =      "Sat Jul 16 11:25:05 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Electronics Letters",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=2220",
  summary =      "Most bit loading algorithms proposed in the literature
                 originally distribute a non-integer number of bits to
                 the subcarriers of a discrete multitone (DMT) system
                 and then, employing an iterative algorithm they round
                 these assigned numbers to \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Astola:2004:FAE
author: J. T. Astola and K. Egiazarian and M. Stankovic and R. S. Stankovic
title: Fibonacci Arithmetic Expressions
journal: j-AUTOMATION-REMOTE-CTL
volume: 65
number: 6
pages: 842--856
month: jun
monthnumber: 6
year: 2004
CODEN: AURCAT
ISSN: 0005-1179 (print), 1608-3032 (electronic) OR 00051179 (print), 16083032 (electronic)
ISSNL: 0005-1179 OR 00051179
bibdate: Thu Aug 07 19:27:43 2008
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2008.08.07 19:27:43 ???
fjournal: Automation and Remote Control
acknowledgement: ack-nhfb
rawauthor: J. T. Astola and K. Egiazarian and M. Stankovi{\'c} and R. S. Stankovi{\'c}
rawtitle: {Fibonacci} Arithmetic Expressions
abstract:
In this paper, we extend the arithmetic (AR) expressions for functions on finite dyadic groups to functions used in Fibonacci interconnection topologies. We have introduced the Fibonacci-Arithmetic (FibAR) expressions for representation of these functions. We discussed the optimization of FibARs with respect to the number of non-zero coefficients through the Fixed-Polarity FibARs defined by using different polarities for the Fibonacci variables. In this way, we provide a base to extend the application of ARs and related powerful CAD design tools for switching functions to functions in Fibonacci interconnection topologies.

rawabstract:
In this paper, we extend the arithmetic (AR) expressions for functions on finite dyadic groups to functions used in Fibonacci interconnection topologies. We have introduced the Fibonacci-Arithmetic (FibAR) expressions for representation of these functions. We discussed the optimization of FibARs with respect to the number of non-zero coefficients through the Fixed-Polarity FibARs defined by using different polarities for the Fibonacci variables. In this way, we provide a base to extend the application of ARs and related powerful CAD design tools for switching functions to functions in Fibonacci interconnection topologies.

entry:
@Article{Astola:2004:FAE,
  author =       "J. T. Astola and K. Egiazarian and M. Stankovi{\'c}
                 and R. S. Stankovi{\'c}",
  title =        "{Fibonacci} Arithmetic Expressions",
  journal =      j-AUTOMATION-REMOTE-CTL,
  volume =       "65",
  number =       "6",
  pages =        "842--856",
  month =        jun,
  year =         "2004",
  CODEN =        "AURCAT",
  ISSN =         "0005-1179 (print), 1608-3032 (electronic)",
  ISSN-L =       "0005-1179",
  bibdate =      "Thu Aug 07 19:27:43 2008",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "In this paper, we extend the arithmetic (AR)
                 expressions for functions on finite dyadic groups to
                 functions used in Fibonacci interconnection topologies.
                 We have introduced the Fibonacci-Arithmetic (FibAR)
                 expressions for representation of these functions. We
                 discussed the optimization of FibARs with respect to
                 the number of non-zero coefficients through the
                 Fixed-Polarity FibARs defined by using different
                 polarities for the Fibonacci variables. In this way, we
                 provide a base to extend the application of ARs and
                 related powerful CAD design tools for switching
                 functions to functions in Fibonacci interconnection
                 topologies.",
  acknowledgement = ack-nhfb,
  fjournal =     "Automation and Remote Control",
}


bibtype: article
filename: fparith.bib
label: Avot-Chotin:2004:HID
author: Roselyne Avot-Chotin and Habib Mehrez
title: Hardware Implementation of Discrete Stochastic Arithmetic
journal: j-NUMER-ALGORITHMS
volume: 37
number: 1--4
pages: 21--33
month: dec
monthnumber: 12
year: 2004
CODEN: NUALEG
ISSN: 1017-1398 (print), 1572-9265 (electronic) OR 10171398 (print), 15729265 (electronic)
ISSNL: 1017-1398 OR 10171398
bibdate: Mon Dec 6 07:00:28 MST 2004
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 07:00:28 MST
URL: http://ipsapp009.kluweronline.com/IPS/content/ext/x/J/5058/I/58/A/3/abstract.htm
fjournal: Numerical Algorithms
remark: Special Issue: SCAN'2002 International Conference (Guest Editors: Ren e Alt and Jean-Luc Lamotte)
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/11075
rawauthor: Roselyne Avot-Chotin and Habib Mehrez
rawtitle: Hardware Implementation of Discrete Stochastic Arithmetic
entry:
@Article{Avot-Chotin:2004:HID,
  author =       "Roselyne Avot-Chotin and Habib Mehrez",
  title =        "Hardware Implementation of Discrete Stochastic
                 Arithmetic",
  journal =      j-NUMER-ALGORITHMS,
  volume =       "37",
  number =       "1--4",
  pages =        "21--33",
  month =        dec,
  year =         "2004",
  CODEN =        "NUALEG",
  ISSN =         "1017-1398 (print), 1572-9265 (electronic)",
  ISSN-L =       "1017-1398",
  bibdate =      "Mon Dec 6 07:00:28 MST 2004",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://ipsapp009.kluweronline.com/IPS/content/ext/x/J/5058/I/58/A/3/abstract.htm",
  acknowledgement = ack-nhfb,
  fjournal =     "Numerical Algorithms",
  journal-URL =  "http://link.springer.com/journal/11075",
  remark =       "Special Issue: SCAN'2002 International Conference
                 (Guest Editors: Ren {\'e} Alt and Jean-Luc Lamotte)",
}


bibtype: inproceedings
filename: fparith.bib
label: Bachega:2004:HPS
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 85--96
year: 2004
bibdate: Wed Apr 27 18:18:12 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.04.27 18:18:12 ???
acknowledgement: ack-nhfb
author:
L. Bachega and Siddhartha Chatterjee and K. A. Dockser and J. A. Gunnels and Manish Gupta and F. G. Gustavson and C. A. Lapkowski and G. K. Liu and M. P. Mendell and C. D. Wait and T. J. C. Ward

booktitle:
PACT 2004. Proceedings. 13th International Conference on Parallel Architecture and Compilation Techniques, 29 Sept.--3 Oct. 2004

title:
A high-performance SIMD floating point unit for BlueGene/L: architecture, compilation, and algorithm design

abstract:
We describe the design, implementation, and evaluation of a dual-issue SIMD-like extension of the PowerPC 440 floating-point unit (FPU) core. This extended FPU is targeted at both IBM's massively parallel BlueGene/L machine as well as more pervasive embedded platforms.

rawabstract:
We describe the design, implementation, and evaluation of a dual-issue SIMD-like extension of the PowerPC 440 floating-point unit (FPU) core. This extended FPU is targeted at both IBM's massively parallel BlueGene/L machine as well as more pervasive embedded platforms.

rawauthor:
L. Bachega and Siddhartha Chatterjee and K. A. Dockser and J. A. Gunnels and Manish Gupta and F. G. Gustavson and C. A. Lapkowski and G. K. Liu and M. P. Mendell and C. D. Wait and T. J. C. Ward

rawbooktitle:
{PACT 2004}. Proceedings. 13th International Conference on Parallel Architecture and Compilation Techniques, 29 Sept.--3 Oct. 2004

rawtitle:
A high-performance {SIMD} floating point unit for {BlueGene/L}: architecture, compilation, and algorithm design

entry:
@InProceedings{Bachega:2004:HPS,
  author =       "L. Bachega and Siddhartha Chatterjee and K. A. Dockser
                 and J. A. Gunnels and Manish Gupta and F. G. Gustavson
                 and C. A. Lapkowski and G. K. Liu and M. P. Mendell and
                 C. D. Wait and T. J. C. Ward",
  booktitle =    "{PACT 2004}. Proceedings. 13th International
                 Conference on Parallel Architecture and Compilation
                 Techniques, 29 Sept.--3 Oct. 2004",
  title =        "A high-performance {SIMD} floating point unit for
                 {BlueGene/L}: architecture, compilation, and algorithm
                 design",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "85--96",
  year =         "2004",
  bibdate =      "Wed Apr 27 18:18:12 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "We describe the design, implementation, and evaluation
                 of a dual-issue SIMD-like extension of the PowerPC 440
                 floating-point unit (FPU) core. This extended FPU is
                 targeted at both IBM's massively parallel BlueGene/L
                 machine as well as more pervasive embedded platforms.",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Bajard:2004:FRI
author: J.-C. Bajard and L. Imbert
title: A full RNS implementation of RSA
journal: j-IEEE-TRANS-COMPUT
volume: 53
number: 6
pages: 769--774
month: jun
monthnumber: 6
year: 2004
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2004.2
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:12:38 MDT 2011
bibtimestamp: 2011.07.05 08:12:38 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1288551
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: J.-C. Bajard and L. Imbert
rawtitle: A full {RNS} implementation of {RSA}
entry:
@Article{Bajard:2004:FRI,
  author =       "J.-C. Bajard and L. Imbert",
  title =        "A full {RNS} implementation of {RSA}",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "53",
  number =       "6",
  pages =        "769--774",
  month =        jun,
  year =         "2004",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2004.2",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:12:38 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1288551",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: misc
filename: fparith.bib
label: Bernstein:2004:FPA
author: Daniel J. Bernstein
title: Floating-Point Arithmetic and Message Authentication
pages: 21
day: 18
month: sep
monthnumber: 9
year: 2004
bibdate: Mon May 13 10:25:28 2024
bibtimestamp: 2024.05.13 10:25:28 ???
URL: https://cr.yp.to/antiforgery/hash127-20040918.pdf
acknowledgement: ack-nhfb
rawauthor: Daniel J. Bernstein
rawtitle: Floating-Point Arithmetic and Message Authentication
bibsource:
https://www.math.utah.edu/pub/tex/bib/cryptography2000.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/hash.bib

note:
To be incorporated into the author's booktitle High-Speed Cryptography book. [As of 13 May 2024, this book seems not to have been published.]

abstract:
There is a well-known class of message authentication systems guaranteeing that attackers will have a negligible chance of successfully forging a message. This paper shows how one of these systems can hash messages at extremely high speed --- much more quickly than previous systems at the same security level --- using IEEE floating-point arithmetic. This paper also presents a survey of the literature in a unified mathematical framework.

remark:
From the first page: ``What distinguishes $ h_r $ is its speed: it is the first high-security system that offers better speed than the MD5-based systems in common use today.'' The section on Priority dates on the second page notes earlier work back to April 1999.

rawabstract:
There is a well-known class of message authentication systems guaranteeing that attackers will have a negligible chance of successfully forging a message. This paper shows how one of these systems can hash messages at extremely high speed --- much more quickly than previous systems at the same security level --- using IEEE floating-point arithmetic. This paper also presents a survey of the literature in a unified mathematical framework.

rawnote:
To be incorporated into the author's \booktitle{High-Speed Cryptography} book. [As of 13 May 2024, this book seems not to have been published.]

entry:
@Misc{Bernstein:2004:FPA,
  author =       "Daniel J. Bernstein",
  title =        "Floating-Point Arithmetic and Message Authentication",
  pages =        "21",
  day =          "18",
  month =        sep,
  year =         "2004",
  bibdate =      "Mon May 13 10:25:28 2024",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/cryptography2000.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/hash.bib",
  note =         "To be incorporated into the author's
                 \booktitle{High-Speed Cryptography} book. [As of 13 May
                 2024, this book seems not to have been published.]",
  URL =          "https://cr.yp.to/antiforgery/hash127-20040918.pdf",
  abstract =     "There is a well-known class of message authentication
                 systems guaranteeing that attackers will have a
                 negligible chance of successfully forging a message.
                 This paper shows how one of these systems can hash
                 messages at extremely high speed --- much more quickly
                 than previous systems at the same security level ---
                 using IEEE floating-point arithmetic. This paper also
                 presents a survey of the literature in a unified
                 mathematical framework.",
  acknowledgement = ack-nhfb,
  remark =       "From the first page: ``What distinguishes $ h_r $ is
                 its speed: it is the first high-security system that
                 offers better speed than the MD5-based systems in
                 common use today.'' The section on Priority dates on
                 the second page notes earlier work back to April
                 1999.",
}


bibtype: techreport
filename: fparith.bib
label: Bernstein:2004:RRH
author: Daniel J. Bernstein
title: Removing Redundancy in High-Precision Newton Iteration
type: Technical Report
address: Chicago, IL 60607-7045
pages: 2
day: 9
month: mar
monthnumber: 3
year: 2004
bibdate: Sun Sep 10 07:51:20 2006
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2006.09.10 07:51:20 ???
note: See also cite Hanrot:2004:NIR.
URL: http://cr.yp.to/fastnewton.html; http://cr.yp.to/fastnewton/fastnewton-20040309.pdf
acknowledgement: ack-nhfb
rawauthor: Daniel J. Bernstein
rawnote: See also \cite{Hanrot:2004:NIR}.
rawtitle: Removing Redundancy in High-Precision {Newton} Iteration
institution:
Department of Mathematics, Statistics, and Computer Science (M/C 249), The University of Illinois at Chicago

abstract:
This paper presents new algorithms for several high-precision operations in the power series ring $ C[[x]] $. Compared to computing $n$ coefficients of a product in $ C[[x]] $, computing $n$ coefficients of a reciprocal in $ C[[x]] $ takes $ 1.5 + o(1) $ times longer; a quotient or logarithm, $ 2.16666 cdots + o(1) $ times longer; a square root, $ 1.83333 cdots + o(1) $ times longer; an exponential, $ 2.83333 cdots + o(1) $ times longer. Previous algorithms had worse constants. The same ideas apply to high-precision computations in $R$, $ Q_p $, etc.

rawabstract:
This paper presents new algorithms for several high-precision operations in the power series ring $ C[[x]] $. Compared to computing $n$ coefficients of a product in $ C[[x]] $, computing $n$ coefficients of a reciprocal in $ C[[x]] $ takes $ 1.5 + o(1) $ times longer; a quotient or logarithm, $ 2.16666 \cdots {} + o(1) $ times longer; a square root, $ 1.83333 \cdots {} + o(1) $ times longer; an exponential, $ 2.83333 \cdots {} + o(1) $ times longer. Previous algorithms had worse constants. The same ideas apply to high-precision computations in $R$, $ Q_p $, etc.

entry:
@TechReport{Bernstein:2004:RRH,
  author =       "Daniel J. Bernstein",
  title =        "Removing Redundancy in High-Precision {Newton}
                 Iteration",
  type =         "Technical Report",
  institution =  "Department of Mathematics, Statistics, and Computer
                 Science (M/C 249), The University of Illinois at
                 Chicago",
  address =      "Chicago, IL 60607-7045",
  pages =        "2",
  day =          "9",
  month =        mar,
  year =         "2004",
  bibdate =      "Sun Sep 10 07:51:20 2006",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "See also \cite{Hanrot:2004:NIR}.",
  URL =          "http://cr.yp.to/fastnewton.html;
                 http://cr.yp.to/fastnewton/fastnewton-20040309.pdf",
  abstract =     "This paper presents new algorithms for several
                 high-precision operations in the power series ring $
                 C[[x]] $. Compared to computing $n$ coefficients of a
                 product in $ C[[x]] $, computing $n$ coefficients of a
                 reciprocal in $ C[[x]] $ takes $ 1.5 + o(1) $ times
                 longer; a quotient or logarithm, $ 2.16666 \cdots {} +
                 o(1) $ times longer; a square root, $ 1.83333 \cdots {}
                 + o(1) $ times longer; an exponential, $ 2.83333 \cdots
                 {} + o(1) $ times longer. Previous algorithms had worse
                 constants. The same ideas apply to high-precision
                 computations in $R$, $ Q_p $, etc.",
  acknowledgement = ack-nhfb,
}


bibtype: techreport
filename: fparith.bib
label: Bernstein:2004:SRT
author: Daniel J. Bernstein
title: Scaled Remainder Trees
type: Report
institution: University of Sydney
address: Sydney, NSW, Australia
pages: 2
day: 20
month: apr
monthnumber: 4
year: 2004
bibdate: Tue Oct 15 07:27:53 2019
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2019.10.15 07:27:53 ???
note: Draft for booktitle Mathematics of Computation, but never published in that journal.
URL: http://cr.yp.to/arith/scaledmod-20040820.pdf
acknowledgement: ack-nhfb
rawauthor: Daniel J. Bernstein
rawnote: Draft for \booktitle{Mathematics of Computation}, but never published in that journal.
rawtitle: Scaled Remainder Trees
abstract:
It is well known that one can compute $ U bmod p_1 $, $ U bmod p_2 $, ldots in time $ n(lg n)^2 + o(1) $ where $n$ is the number of bits in $U$, $ p_1$, $ p_2$, ldots . Here $U$, $ p_1$, $ p_2$, ldots can be integers or polynomials over a fixed finite field. Bostan, Lecerf, and Schost recently introduced an algorithm for the polynomial case that takes time $ n(lg n)^2 + o(1)$ with a smaller $ o(1)$. They did not claim any similar speedup for integers; their algorithm uses polynomial reversal and coefficient-matrix transposition, neither of which applies to integers. This paper presents a simpler algorithm that achieves the same speedup and that works for both polynomials and integers. This paper then points out several redundancies that can be eliminated from the algorithm, saving even more time.

remark:
Paul Zimmermann reported on the gmp-devel mailing list on Tue, 15 Oct 2019 10:40:48 +0200 that the remainder algorithm in this report is rediscovered in cite Lemire:2019:FRD.

rawabstract:
It is well known that one can compute $ U \bmod p_1 $, $ U \bmod p_2 $, \ldots{} in time $ n(\lg n)^{2 + o(1)} $ where $n$ is the number of bits in $U$, $ p_1$, $ p_2$, \ldots{}. Here $U$, $ p_1$, $ p_2$, \ldots{} can be integers or polynomials over a fixed finite field. Bostan, Lecerf, and Schost recently introduced an algorithm for the polynomial case that takes time $ n(\lg n)^{2 + o(1)}$ with a smaller $ o(1)$. They did not claim any similar speedup for integers; their algorithm uses polynomial reversal and coefficient-matrix transposition, neither of which applies to integers. This paper presents a simpler algorithm that achieves the same speedup and that works for both polynomials and integers. This paper then points out several redundancies that can be eliminated from the algorithm, saving even more time.

entry:
@TechReport{Bernstein:2004:SRT,
  author =       "Daniel J. Bernstein",
  title =        "Scaled Remainder Trees",
  type =         "Report",
  institution =  "University of Sydney",
  address =      "Sydney, NSW, Australia",
  day =          "20",
  month =        apr,
  year =         "2004",
  bibdate =      "Tue Oct 15 07:27:53 2019",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "Draft for \booktitle{Mathematics of Computation}, but
                 never published in that journal.",
  URL =          "http://cr.yp.to/arith/scaledmod-20040820.pdf",
  abstract =     "It is well known that one can compute $ U \bmod p_1 $,
                 $ U \bmod p_2 $, \ldots{} in time $ n(\lg n)^{2 + o(1)}
                 $ where $n$ is the number of bits in $U$, $ p_1$, $
                 p_2$, \ldots{}. Here $U$, $ p_1$, $ p_2$, \ldots{} can
                 be integers or polynomials over a fixed finite field.
                 Bostan, Lecerf, and Schost recently introduced an
                 algorithm for the polynomial case that takes time $
                 n(\lg n)^{2 + o(1)}$ with a smaller $ o(1)$. They did
                 not claim any similar speedup for integers; their
                 algorithm uses polynomial reversal and
                 coefficient-matrix transposition, neither of which
                 applies to integers. This paper presents a simpler
                 algorithm that achieves the same speedup and that works
                 for both polynomials and integers. This paper then
                 points out several redundancies that can be eliminated
                 from the algorithm, saving even more time.",
  acknowledgement = ack-nhfb,
  remark =       "Paul Zimmermann reported on the gmp-devel mailing list
                 on Tue, 15 Oct 2019 10:40:48 +0200 that the remainder
                 algorithm in this report is rediscovered in
                 \cite{Lemire:2019:FRD}.",
}


bibtype: techreport
filename: fparith.bib
label: Bertin:2004:FPL
title: A floating-point library for integer processors
type: Research Report
number: RR2004-37
institution: Ecole Normale Superieure de Lyon
address: 69364 Lyon Cedex 07, France
pages: 2 + 11
month: jul
monthnumber: 7
year: 2004
bibdate: Mon Dec 06 11:02:55 2004
bibsource: http://www.ens-lyon.fr/LIP/Pub/rr2004.php; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 11:02:55 ???
URL: http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-37.ps.gz
acknowledgement: ack-nhfb
rawtitle: A floating-point library for integer processors
author:
C. Bertin and Nicolas Brisebarre and B. Dupont de Dinechin and C.-P. Jeannerod and C. Monat and Jean-Michel Muller and S. Raina and A. Tisserand

abstract:
This paper presents a C library for the software support of single precision floating-point (FP) arithmetic on processors without FP hardware units such as VLIW or DSP processor cores for embedded applications. This library provides several levels of compliance to the IEEE 754 FP standard. The complete specifications of the standard can be used or just some relaxed characteristics such as restricted rounding modes or computations without denormal numbers. This library is evaluated on the ST200 VLIW processors from STMicroelectronics.

keywords:
addition; Computer arithmetic; division; DSP; floating-point arithmetic; integer processor; multiplication; square-root; VLIW

remark:
Published in ``Advanced Signal Processing Algorithms, Architectures, and Implementations XIV, Spie 2004.''

rawabstract:
This paper presents a C library for the software support of single precision floating-point (FP) arithmetic on processors without FP hardware units such as VLIW or DSP processor cores for embedded applications. This library provides several levels of compliance to the IEEE 754 FP standard. The complete specifications of the standard can be used or just some relaxed characteristics such as restricted rounding modes or computations without denormal numbers. This library is evaluated on the ST200 VLIW processors from STMicroelectronics.

rawauthor:
C. Bertin and Nicolas Brisebarre and B. Dupont de Dinechin and C.-P. Jeannerod and C. Monat and Jean-Michel Muller and S. Raina and A. Tisserand

entry:
@TechReport{Bertin:2004:FPL,
  author =       "C. Bertin and Nicolas Brisebarre and B. Dupont de
                 Dinechin and C.-P. Jeannerod and C. Monat and
                 Jean-Michel Muller and S. Raina and A. Tisserand",
  title =        "A floating-point library for integer processors",
  type =         "Research Report",
  number =       "RR2004-37",
  institution =  "{\'E}cole Normale Sup{\'e}rieure de Lyon",
  address =      "69364 Lyon Cedex 07, France",
  pages =        "2 + 11",
  month =        jul,
  year =         "2004",
  bibdate =      "Mon Dec 06 11:02:55 2004",
  bibsource =    "http://www.ens-lyon.fr/LIP/Pub/rr2004.php;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-37.ps.gz",
  abstract =     "This paper presents a C library for the software
                 support of single precision floating-point (FP)
                 arithmetic on processors without FP hardware units such
                 as VLIW or DSP processor cores for embedded
                 applications. This library provides several levels of
                 compliance to the IEEE 754 FP standard. The complete
                 specifications of the standard can be used or just some
                 relaxed characteristics such as restricted rounding
                 modes or computations without denormal numbers. This
                 library is evaluated on the ST200 VLIW processors from
                 STMicroelectronics.",
  acknowledgement = ack-nhfb,
  keywords =     "addition; Computer arithmetic; division; DSP;
                 floating-point arithmetic; integer processor;
                 multiplication; square-root; VLIW",
  remark =       "Published in ``Advanced Signal Processing Algorithms,
                 Architectures, and Implementations XIV, Spie 2004.''",
}


bibtype: techreport
filename: fparith.bib
label: Beuchat:2004:FMM
author: Jean-Luc Beuchat
title: A Family of Modulo $ (2^n + 1) $ Multipliers
type: Research Report
number: RR2004-39
institution: Ecole Normale Superieure de Lyon
address: 69364 Lyon Cedex 07, France
pages: 2 + 13
year: 2004
bibdate: Mon Dec 06 11:05:32 2004
bibsource: http://www.ens-lyon.fr/LIP/Pub/rr2004.php; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 11:05:32 ???
URL: http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-39.ps.gz
keywords: FPGA Implementation; Modular Arithmetic; Modulo $(2^n+1)$ Addition; Modulo $(2^n+1)$ Multiplication
acknowledgement: ack-nhfb
rawauthor: Jean-Luc Beuchat
rawtitle: A Family of Modulo $ (2^n + 1) $ Multipliers
abstract:
In this paper, we first describe a novel modulo $ (2^n + 1) $ addition algorithm suited to FPGA and ASIC implementations, and discuss several architectures of multioperand modulo $ (2^n + 1) $ adders. Then, we propose three implementations of a modulo $ (2^n + 1) $ multiplication algorithm based on a paper by A. Wrzyszcz and D. Milford. The first operator is based on an $ n times n $ multiplication and a subsequent modulo $ (2^n + 1) $ correction, and takes advantage of the arithmetic logic embedded in Spartan or Virtex FPGAs. The second operator computes a sum of modulo-reduced partial products by means of a multioperand modulo $ (2^n + 1) $ adder. Then, radix-$4$ modified Booth recoding reduces the number of partial products, while making their generation more complex. Finally, we provide a comparison of this family of algorithms with existing solutions.

rawabstract:
In this paper, we first describe a novel modulo $ (2^n + 1) $ addition algorithm suited to FPGA and ASIC implementations, and discuss several architectures of multioperand modulo $ (2^n + 1) $ adders. Then, we propose three implementations of a modulo $ (2^n + 1) $ multiplication algorithm based on a paper by A. Wrzyszcz and D. Milford. The first operator is based on an $ n \times n $ multiplication and a subsequent modulo $ (2^n + 1) $ correction, and takes advantage of the arithmetic logic embedded in Spartan or Virtex FPGAs. The second operator computes a sum of modulo-reduced partial products by means of a multioperand modulo $ (2^n + 1) $ adder. Then, radix-$4$ modified Booth recoding reduces the number of partial products, while making their generation more complex. Finally, we provide a comparison of this family of algorithms with existing solutions.

entry:
@TechReport{Beuchat:2004:FMM,
  author =       "Jean-Luc Beuchat",
  title =        "A Family of Modulo $ (2^n + 1) $ Multipliers",
  type =         "Research Report",
  number =       "RR2004-39",
  institution =  "{\'E}cole Normale Sup{\'e}rieure de Lyon",
  address =      "69364 Lyon Cedex 07, France",
  pages =        "2 + 13",
  year =         "2004",
  bibdate =      "Mon Dec 06 11:05:32 2004",
  bibsource =    "http://www.ens-lyon.fr/LIP/Pub/rr2004.php;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-39.ps.gz",
  abstract =     "In this paper, we first describe a novel modulo $ (2^n
                 + 1) $ addition algorithm suited to FPGA and ASIC
                 implementations, and discuss several architectures of
                 multioperand modulo $ (2^n + 1) $ adders. Then, we
                 propose three implementations of a modulo $ (2^n + 1) $
                 multiplication algorithm based on a paper by A.
                 Wrzyszcz and D. Milford. The first operator is based on
                 an $ n \times n $ multiplication and a subsequent
                 modulo $ (2^n + 1) $ correction, and takes advantage of
                 the arithmetic logic embedded in Spartan or Virtex
                 FPGAs. The second operator computes a sum of
                 modulo-reduced partial products by means of a
                 multioperand modulo $ (2^n + 1) $ adder. Then,
                 radix-$4$ modified Booth recoding reduces the number of
                 partial products, while making their generation more
                 complex. Finally, we provide a comparison of this
                 family of algorithms with existing solutions.",
  acknowledgement = ack-nhfb,
  keywords =     "FPGA Implementation; Modular Arithmetic; Modulo
                 $(2^n+1)$ Addition; Modulo $(2^n+1)$ Multiplication",
}


bibtype: article
filename: fparith.bib
label: Boggs:2004:MIP
title: The Microarchitecture of the Intelreg Pentiumreg 4 Processor on 90nm Technology
journal: j-INTEL-TECH-J
volume: 8
number: 1
pages: 1--17
month: feb
monthnumber: 2
year: 2004
bibdate: Mon Jul 11 08:46:53 2005
bibtimestamp: 2005.07.11 08:46:53 ???
URL: http://developer.intel.com/technology/itj/2004/volume08issue01/foreword.htm
acknowledgement: ack-nhfb
rawtitle: The Microarchitecture of the {Intel{\reg} Pentium{\reg} 4} Processor on 90nm Technology
author:
Darrell Boggs and Aravindh Baktha and Jason Hawkins and Deborah T. Marr and J. Alan Miller and Patrice Roussel and Ronak Singhal and Bret Toll and K. S. Venkatraman

bibsource:
http://developer.intel.com/technology/itj/archive/2004.htm; https://www.math.utah.edu/pub/tex/bib/fparith.bib

keywords:
complex arithmetic; floating-point arithmetic; Hyper-Threading Technology; microarchitecture; Pentiumreg 4 processor

remark:
From pp. 10--11: ``Five instructions have been added to significantly accelerate complex arithmetic. Two instructions (addsubps and addsubpd) perform a mix of floating-point addition and subtraction, hence removing the need for changing the sign of some operands. Three others (movsldup, movshdup, movddup), in their memory version, combine loads with some level of duplication, hence saving the need for a shuffle instruction on the loaded data.''

rawauthor:
Darrell Boggs and Aravindh Baktha and Jason Hawkins and Deborah T. Marr and J. Alan Miller and Patrice Roussel and Ronak Singhal and Bret Toll and K. S. Venkatraman

entry:
@Article{Boggs:2004:MIP,
  author =       "Darrell Boggs and Aravindh Baktha and Jason Hawkins
                 and Deborah T. Marr and J. Alan Miller and Patrice
                 Roussel and Ronak Singhal and Bret Toll and K. S.
                 Venkatraman",
  title =        "The Microarchitecture of the {Intel{\reg}
                 Pentium{\reg} 4} Processor on 90nm Technology",
  journal =      j-INTEL-TECH-J,
  volume =       "8",
  number =       "1",
  pages =        "1--17",
  month =        feb,
  year =         "2004",
  bibdate =      "Mon Jul 11 08:46:53 2005",
  bibsource =    "http://developer.intel.com/technology/itj/archive/2004.htm;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://developer.intel.com/technology/itj/2004/volume08issue01/foreword.htm",
  acknowledgement = ack-nhfb,
  keywords =     "complex arithmetic; floating-point arithmetic;
                 Hyper-Threading Technology; microarchitecture;
                 Pentium{\reg} 4 processor",
  remark =       "From pp. 10--11: ``Five instructions have been added
                 to significantly accelerate complex arithmetic. Two
                 instructions (addsubps and addsubpd) perform a mix of
                 floating-point addition and subtraction, hence removing
                 the need for changing the sign of some operands. Three
                 others (movsldup, movshdup, movddup), in their memory
                 version, combine loads with some level of duplication,
                 hence saving the need for a shuffle instruction on the
                 loaded data.''",
}


bibtype: inproceedings
filename: fparith.bib
label: Boldo:2004:BGB
author: Sylvie Boldo
title: Bridging the gap between formal specification and bit-level floating-point arithmetic
crossref: Frougny:2004:RCR
pages: 22--36
year: 2004
bibdate: Fri Nov 17 07:00:31 2023
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2023.11.17 07:00:31 ???
URL: http://www.informatik.uni-trier.de/Reports/TR-08-2004/rnc6_04_boldo.pdf
keywords: Coq; floating-point; formal proof checking; IEEE-754
acknowledgement: ack-nhfb
rawauthor: Sylvie Boldo
rawtitle: Bridging the gap between formal specification and bit-level floating-point arithmetic
abstract:
Floating-point arithmetic is defined by the IEEE-754 standard and has often been formalized. We propose a new Coq formalization based on the bit-level representation of the standard and we prove strong links between this new formalization and a previous high-level one. In this process, we have defined functions for any rounding mode described by the standard. Our library can now be applied to certify both software and hardware. Developing results in those two dramatically different directions, like no other formal development so far, guarantees that nothing was forgotten or poorly specified in our formalization. It also lets us compare our work with the existing bit-level formalizations developed with other proof assistants.

rawabstract:
Floating-point arithmetic is defined by the IEEE-754 standard and has often been formalized. We propose a new Coq formalization based on the bit-level representation of the standard and we prove strong links between this new formalization and a previous high-level one. In this process, we have defined functions for any rounding mode described by the standard. Our library can now be applied to certify both software and hardware. Developing results in those two dramatically different directions, like no other formal development so far, guarantees that nothing was forgotten or poorly specified in our formalization. It also lets us compare our work with the existing bit-level formalizations developed with other proof assistants.

entry:
@InProceedings{Boldo:2004:BGB,
  author =       "Sylvie Boldo",
  title =        "Bridging the gap between formal specification and
                 bit-level floating-point arithmetic",
  crossref =     "Frougny:2004:RCR",
  pages =        "22--36",
  year =         "2004",
  bibdate =      "Fri Nov 17 07:00:31 2023",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.informatik.uni-trier.de/Reports/TR-08-2004/rnc6_04_boldo.pdf",
  abstract =     "Floating-point arithmetic is defined by the IEEE-754
                 standard and has often been formalized. We propose a
                 new Coq formalization based on the bit-level
                 representation of the standard and we prove strong
                 links between this new formalization and a previous
                 high-level one. In this process, we have defined
                 functions for any rounding mode described by the
                 standard. Our library can now be applied to certify
                 both software and hardware. Developing results in those
                 two dramatically different directions, like no other
                 formal development so far, guarantees that nothing was
                 forgotten or poorly specified in our formalization. It
                 also lets us compare our work with the existing
                 bit-level formalizations developed with other proof
                 assistants.",
  acknowledgement = ack-nhfb,
  keywords =     "Coq; floating-point; formal proof checking; IEEE-754",
}


bibtype: phdthesis
filename: fparith.bib
label: Boldo:2004:PFA
author: Sylvie Boldo
type: Ph.D. thesis
school: Ecole Normale Superieure de Lyon
address: 69364 Lyon Cedex 07, France
month: nov
monthnumber: 11
year: 2004
bibdate: Tue Nov 23 09:53:06 2004
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.11.23 09:53:06 ???
language: French
acknowledgement: ack-nhfb
rawauthor: Sylvie Boldo
title:
Preuves formelles en arithmetiques a virgule flottante. (French) [Formal proofs in floating-point arithmetic]

rawtitle:
Preuves formelles en arithm{\'e}tiques {\`a} virgule flottante. ({French}) [Formal proofs in floating-point arithmetic]

entry:
@PhdThesis{Boldo:2004:PFA,
  author =       "Sylvie Boldo",
  title =        "Preuves formelles en arithm{\'e}tiques {\`a} virgule
                 flottante. ({French}) [Formal proofs in floating-point
                 arithmetic]",
  type =         "{Ph.D.} thesis",
  school =       "{\'E}cole Normale Sup{\'e}rieure de Lyon",
  address =      "69364 Lyon Cedex 07, France",
  pages =        "????",
  month =        nov,
  year =         "2004",
  bibdate =      "Tue Nov 23 09:53:06 2004",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  language =     "French",
}


bibtype: article
filename: fparith.bib
label: Boldo:2004:PTC
author: Sylvie Boldo and Marc Daumas
title: Properties of two's complement floating point notations
journal: j-INT-J-SOFTW-TOOLS-TECHNOL-TRANSFER
volume: 5
number: 2--3
pages: 237--246
month: mar
monthnumber: 3
year: 2004
DOI: https://doi.org/10.1007/s10009-003-0120-y
ISSN: 1433-2779 (print), 1433-2787 (electronic) OR 14332779 (print), 14332787 (electronic)
ISSNL: 1433-2779 OR 14332779
bibdate: Tue Nov 23 09:56:44 2004
bibtimestamp: 2004.11.23 09:56:44 ???
URL: http://perso.ens-lyon.fr/marc.daumas/SoftArith/BolDau04a.pdf
fjournal: International Journal on Software Tools for Technology Transfer: STTT
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/10009
rawauthor: Sylvie Boldo and Marc Daumas
rawtitle: Properties of two's complement floating point notations
bibsource:
http://springerlink.metapress.com/openurl.asp?genre=journal&issn=1433-2779; https://www.math.utah.edu/pub/tex/bib/fparith.bib

abstract:
Few designs, mostly those of Texas Instruments, continue to use two's complement floating point units. Such units are simpler to build and to validate, but they do not comply to the dominant IEEE standard for floating point arithmetic. We compare some properties of the two systems in this text. Some features are lost, but others remain unchanged. One strong example is the case of Sterbenz' theorem and our recent extension. We show in the paper that the theorem and its extension hold for the two's complement architecture. Still, users should ensure that results are large enough on circuits that do not implement gradual underflow. Theorems have been proven and validated using the Coq automatic proof checker.

rawabstract:
Few designs, mostly those of Texas Instruments, continue to use two's complement floating point units. Such units are simpler to build and to validate, but they do not comply to the dominant IEEE standard for floating point arithmetic. We compare some properties of the two systems in this text. Some features are lost, but others remain unchanged. One strong example is the case of Sterbenz' theorem and our recent extension. We show in the paper that the theorem and its extension hold for the two's complement architecture. Still, users should ensure that results are large enough on circuits that do not implement gradual underflow. Theorems have been proven and validated using the Coq automatic proof checker.

entry:
@Article{Boldo:2004:PTC,
  author =       "Sylvie Boldo and Marc Daumas",
  title =        "Properties of two's complement floating point
                 notations",
  journal =      j-INT-J-SOFTW-TOOLS-TECHNOL-TRANSFER,
  volume =       "5",
  number =       "2--3",
  pages =        "237--246",
  month =        mar,
  year =         "2004",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1007/s10009-003-0120-y",
  ISSN =         "1433-2779 (print), 1433-2787 (electronic)",
  ISSN-L =       "1433-2779",
  bibdate =      "Tue Nov 23 09:56:44 2004",
  bibsource =    "http://springerlink.metapress.com/openurl.asp?genre=journal&issn=1433-2779;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://perso.ens-lyon.fr/marc.daumas/SoftArith/BolDau04a.pdf",
  abstract =     "Few designs, mostly those of Texas Instruments,
                 continue to use two's complement floating point units.
                 Such units are simpler to build and to validate, but
                 they do not comply to the dominant IEEE standard for
                 floating point arithmetic. We compare some properties
                 of the two systems in this text. Some features are
                 lost, but others remain unchanged. One strong example
                 is the case of Sterbenz' theorem and our recent
                 extension. We show in the paper that the theorem and
                 its extension hold for the two's complement
                 architecture. Still, users should ensure that results
                 are large enough on circuits that do not implement
                 gradual underflow. Theorems have been proven and
                 validated using the Coq automatic proof checker.",
  acknowledgement = ack-nhfb,
  fjournal =     "International Journal on Software Tools for Technology
                 Transfer: STTT",
  journal-URL =  "http://link.springer.com/journal/10009",
}


bibtype: article
filename: fparith.bib
label: Boldo:2004:STQ
author: Sylvie Boldo and Marc Daumas
title: A Simple Test Qualifying the Accuracy of Horner's Rule for Polynomials
journal: j-NUMER-ALGORITHMS
volume: 37
number: 1--4
pages: 45--60
month: dec
monthnumber: 12
year: 2004
CODEN: NUALEG
ISSN: 1017-1398 (print), 1572-9265 (electronic) OR 10171398 (print), 15729265 (electronic)
ISSNL: 1017-1398 OR 10171398
bibdate: Mon Dec 6 06:44:22 MST 2004
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; Ingenta database
bibtimestamp: 2004.12.06 06:44:22 MST
note: SCAN2002 International Conference (Guest Editors: Rene Alt and Jean-Luc Lamotte).
fjournal: Numerical Algorithms
keywords: floating-point testing
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/11075
rawauthor: Sylvie Boldo and Marc Daumas
rawnote: SCAN2002 International Conference (Guest Editors: Rene Alt and Jean-Luc Lamotte).
rawtitle: A Simple Test Qualifying the Accuracy of {Horner}'s Rule for Polynomials
entry:
@Article{Boldo:2004:STQ,
  author =       "Sylvie Boldo and Marc Daumas",
  title =        "A Simple Test Qualifying the Accuracy of {Horner}'s
                 Rule for Polynomials",
  journal =      j-NUMER-ALGORITHMS,
  volume =       "37",
  number =       "1--4",
  pages =        "45--60",
  month =        dec,
  year =         "2004",
  CODEN =        "NUALEG",
  ISSN =         "1017-1398 (print), 1572-9265 (electronic)",
  ISSN-L =       "1017-1398",
  bibdate =      "Mon Dec 6 06:44:22 MST 2004",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 Ingenta database",
  note =         "SCAN2002 International Conference (Guest Editors: Rene
                 Alt and Jean-Luc Lamotte).",
  acknowledgement = ack-nhfb,
  fjournal =     "Numerical Algorithms",
  journal-URL =  "http://link.springer.com/journal/11075",
  keywords =     "floating-point testing",
  pagecount =    "16",
}


bibtype: techreport
filename: fparith.bib
label: Boldo:2004:WDR
author: Sylvie Boldo and Guillaume Melquiond
title: When double rounding is odd
type: Research Report
number: RR2004-48
institution: Ecole Normale Superieure de Lyon
address: 69364 Lyon Cedex 07, France
pages: 2 + 7
month: nov
monthnumber: 11
year: 2004
bibdate: Mon Dec 06 11:18:07 2004
bibsource: http://www.ens-lyon.fr/LIP/Pub/rr2004.php; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 11:18:07 ???
acknowledgement: ack-nhfb
rawauthor: Sylvie Boldo and Guillaume Melquiond
rawtitle: When double rounding is odd
URL:
http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-48.pdf; https://inria.hal.science/inria-00070603v2/file/BolMel.pdf

abstract:
Double rounding consists in a first rounding in an intermediate extended precision and then a second rounding in the working precision. The natural question is then of the precision and correctness of the final result. Unfortunately, the used double rounding algorithms do not obtain a correct rounding of the initial value. We prove an efficient algorithm for the double rounding to give the correct rounding to the nearest value assuming the first rounding is to odd. As this rounding is unusual and this property is surprising, we formally proved this property using the Coq automatic proof checker.

keywords:
Coq; correct rounding; double rounding; Floating-point; floating-point arithmetic; formal proof; round-to-odd (RO(x))

rawabstract:
Double rounding consists in a first rounding in an intermediate extended precision and then a second rounding in the working precision. The natural question is then of the precision and correctness of the final result. Unfortunately, the used double rounding algorithms do not obtain a correct rounding of the initial value. We prove an efficient algorithm for the double rounding to give the correct rounding to the nearest value assuming the first rounding is to odd. As this rounding is unusual and this property is surprising, we formally proved this property using the Coq automatic proof checker.

entry:
@TechReport{Boldo:2004:WDR,
  author =       "Sylvie Boldo and Guillaume Melquiond",
  title =        "When double rounding is odd",
  type =         "Research Report",
  number =       "RR2004-48",
  institution =  "{\'E}cole Normale Sup{\'e}rieure de Lyon",
  address =      "69364 Lyon Cedex 07, France",
  pages =        "2 + 7",
  month =        nov,
  year =         "2004",
  bibdate =      "Mon Dec 06 11:18:07 2004",
  bibsource =    "http://www.ens-lyon.fr/LIP/Pub/rr2004.php;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-48.pdf;
                 https://inria.hal.science/inria-00070603v2/file/BolMel.pdf",
  abstract =     "Double rounding consists in a first rounding in an
                 intermediate extended precision and then a second
                 rounding in the working precision. The natural question
                 is then of the precision and correctness of the final
                 result. Unfortunately, the used double rounding
                 algorithms do not obtain a correct rounding of the
                 initial value. We prove an efficient algorithm for the
                 double rounding to give the correct rounding to the
                 nearest value assuming the first rounding is to odd. As
                 this rounding is unusual and this property is
                 surprising, we formally proved this property using the
                 Coq automatic proof checker.",
  acknowledgement = ack-nhfb,
  keywords =     "Coq; correct rounding; double rounding;
                 Floating-point; floating-point arithmetic; formal
                 proof; round-to-odd (RO(x))",
}


bibtype: article
filename: fparith.bib
label: Brisebarre:2004:ACR
author: Nicolas Brisebarre and Jean-Michel Muller and Saurabh Kumar Raina
title: Accelerating correctly rounded floating-point division when the divisor is known in advance
journal: j-IEEE-TRANS-COMPUT
volume: 53
number: 8
pages: 1069--1072
month: aug
monthnumber: 8
year: 2004
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2004.37
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:12:41 MDT 2011
bibtimestamp: 2011.07.05 08:12:41 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1306999
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Nicolas Brisebarre and Jean-Michel Muller and Saurabh Kumar Raina
rawtitle: Accelerating correctly rounded floating-point division when the divisor is known in advance
abstract:
We present techniques for accelerating the floating-point computation of $ x / y $ when $y$ is known before $x$. The proposed algorithms are oriented toward architectures with available fused-mac operations. The goal is to get exactly the same result as with ldots 

rawabstract:
We present techniques for accelerating the floating-point computation of $ x / y $ when $y$ is known before $x$. The proposed algorithms are oriented toward architectures with available fused-mac operations. The goal is to get exactly the same result as with \ldots{}

entry:
@Article{Brisebarre:2004:ACR,
  author =       "Nicolas Brisebarre and Jean-Michel Muller and Saurabh
                 Kumar Raina",
  title =        "Accelerating correctly rounded floating-point division
                 when the divisor is known in advance",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "53",
  number =       "8",
  pages =        "1069--1072",
  month =        aug,
  year =         "2004",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2004.37",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:12:41 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1306999",
  abstract =     "We present techniques for accelerating the
                 floating-point computation of $ x / y $ when $y$ is
                 known before $x$. The proposed algorithms are oriented
                 toward architectures with available fused-mac
                 operations. The goal is to get exactly the same result
                 as with \ldots{}",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  summary =      "We present techniques for accelerating the
                 floating-point computation of x/y when y is known
                 before x. The proposed algorithms are oriented toward
                 architectures with available fused-mac operations. The
                 goal is to get exactly the same result as with
                 \ldots{}",
}


bibtype: techreport
filename: fparith.bib
label: Brisebarre:2004:CRM
author: Nicolas Brisebarre and Jean-Michel Muller
title: Correctly rounded multiplication by arbitrary precision constants
type: Research Report
number: RR2004-44
institution: Ecole Normale Superieure de Lyon
address: 69364 Lyon Cedex 07, France
pages: 2 + 14
month: oct
monthnumber: 10
year: 2004
bibdate: Mon Dec 06 11:11:37 2004
bibsource: http://www.ens-lyon.fr/LIP/Pub/rr2004.php; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 11:11:37 ???
URL: http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-44.pdf
acknowledgement: ack-nhfb
rawauthor: Nicolas Brisebarre and Jean-Michel Muller
rawtitle: Correctly rounded multiplication by arbitrary precision constants
abstract:
We introduce an algorithm for multiplying a floating-point number $x$ by a constant $C$ that is not exactly representable in floating-point arithmetic. Our algorithm uses a multiplication and a fused multiply accumulate instruction. We give methods for checking whether, for a given value of $C$ and a given floating-point format, our algorithm returns a correctly rounded result for any $x$. When it does not, our methods give the values $x$ for which the multiplication is not correctly rounded.

keywords:
Computer Arithmetic; Correct rounding; Floating-point Arithmetic; Fused-mac; Multiplication by a constant

rawabstract:
We introduce an algorithm for multiplying a floating-point number $x$ by a constant $C$ that is not exactly representable in floating-point arithmetic. Our algorithm uses a multiplication and a fused multiply accumulate instruction. We give methods for checking whether, for a given value of $C$ and a given floating-point format, our algorithm returns a correctly rounded result for any $x$. When it does not, our methods give the values $x$ for which the multiplication is not correctly rounded.

entry:
@TechReport{Brisebarre:2004:CRM,
  author =       "Nicolas Brisebarre and Jean-Michel Muller",
  title =        "Correctly rounded multiplication by arbitrary
                 precision constants",
  type =         "Research Report",
  number =       "RR2004-44",
  institution =  "{\'E}cole Normale Sup{\'e}rieure de Lyon",
  address =      "69364 Lyon Cedex 07, France",
  pages =        "2 + 14",
  month =        oct,
  year =         "2004",
  bibdate =      "Mon Dec 06 11:11:37 2004",
  bibsource =    "http://www.ens-lyon.fr/LIP/Pub/rr2004.php;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-44.pdf",
  abstract =     "We introduce an algorithm for multiplying a
                 floating-point number $x$ by a constant $C$ that is not
                 exactly representable in floating-point arithmetic. Our
                 algorithm uses a multiplication and a fused multiply
                 accumulate instruction. We give methods for checking
                 whether, for a given value of $C$ and a given
                 floating-point format, our algorithm returns a
                 correctly rounded result for any $x$. When it does not,
                 our methods give the values $x$ for which the
                 multiplication is not correctly rounded.",
  acknowledgement = ack-nhfb,
  keywords =     "Computer Arithmetic; Correct rounding; Floating-point
                 Arithmetic; Fused-mac; Multiplication by a constant",
}


bibtype: techreport
filename: fparith.bib
label: Bruguera:2004:DDF
author: Javier D. Bruguera and Tomas Lang
title: Double-Datapath Floating-point multiply-add fused: latency reduction for floating-point addition
type: Report
institution: Grupo de Arquitectura de Computadores, Universidad de Santiago de Compostela
address: Edificio Monte de la Condesa, Campus Sur, 15782 Santiago de Compostela, Spain
pages: 24
year: 2004
bibdate: Fri Jun 24 10:10:03 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.24 10:10:03 ???
acknowledgement: ack-nhfb
rawauthor: Javier D. Bruguera and Tom{\'a}s Lang
rawtitle: Double-Datapath Floating-point multiply-add fused: latency reduction for floating-point addition
URL:
http://www-gpaa.dec.usc.es/arquivos/articulos/2004/gac2004-i03.ps; http://www.ac.usc.es/arquivos/articulos/2004/gac2004-i03.ps

keywords:
computer arithmetic; floating-point functional units; multiply-add fused (MAF) operation; VLSI design

entry:
@TechReport{Bruguera:2004:DDF,
  author =       "Javier D. Bruguera and Tom{\'a}s Lang",
  title =        "Double-Datapath Floating-point multiply-add fused:
                 latency reduction for floating-point addition",
  type =         "Report",
  institution =  "Grupo de Arquitectura de Computadores, Universidad de
                 Santiago de Compostela",
  address =      "Edificio Monte de la Condesa, Campus Sur, 15782
                 Santiago de Compostela, Spain",
  pages =        "24",
  year =         "2004",
  bibdate =      "Fri Jun 24 10:10:03 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www-gpaa.dec.usc.es/arquivos/articulos/2004/gac2004-i03.ps;
                 http://www.ac.usc.es/arquivos/articulos/2004/gac2004-i03.ps",
  acknowledgement = ack-nhfb,
  keywords =     "computer arithmetic; floating-point functional units;
                 multiply-add fused (MAF) operation; VLSI design",
}


bibtype: inproceedings
filename: fparith.bib
label: Busaba:2004:DFP
author: Fadi Busaba and Timothy Slegel and Steven Carlough and Christopher Krygowski and John G. Rell
title: The design of the fixed point unit for the z990 microprocessor
crossref: ACM:2004:GVN
pages: 364--367
year: 2004
bibdate: Thu Aug 07 18:08:54 2008
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2008.08.07 18:08:54 ???
keywords: decimal arithmetic; microprocessor; superscalar FXU
acknowledgement: ack-nhfb
rawauthor: Fadi Busaba and Timothy Slegel and Steven Carlough and Christopher Krygowski and John G. Rell
rawtitle: The design of the fixed point unit for the z990 microprocessor
abstract:
The paper presents the design of the Fixed Point Unit (FXU) for the IBM eServer z990 microprocessor (announced in 2Q '03) that runs at 1.2 GHz [2]. The FXU is capable of executing two Register-Memory instructions including arithmetic instructions and a branch instruction in a single cycle. The FXU executes a total of 369 instructions that operate on variable size operands (1 to 256 bytes). The instruction set include decimal arithmetic with multiplies and divides, binary arithmetic, shifts and rotates, loads/stores, branches, long moves, logical operations, convert instructions, and other special instructions. The FXU consists of 64-bit dataflow stack that is custom designed and a control stack that is synthesized. The current FXU is the first superscalar design for the CMOS z-series machines, has a new improved decimal unit, and has for the first time a $ 16 times 64 $ bit binary multiplier.

rawabstract:
The paper presents the design of the Fixed Point Unit (FXU) for the IBM eServer z990 microprocessor (announced in 2Q '03) that runs at 1.2 GHz [2]. The FXU is capable of executing two Register-Memory instructions including arithmetic instructions and a branch instruction in a single cycle. The FXU executes a total of 369 instructions that operate on variable size operands (1 to 256 bytes). The instruction set include decimal arithmetic with multiplies and divides, binary arithmetic, shifts and rotates, loads/stores, branches, long moves, logical operations, convert instructions, and other special instructions. The FXU consists of 64-bit dataflow stack that is custom designed and a control stack that is synthesized. The current FXU is the first superscalar design for the CMOS z-series machines, has a new improved decimal unit, and has for the first time a $ 16 \times 64 $ bit binary multiplier.

entry:
@InProceedings{Busaba:2004:DFP,
  author =       "Fadi Busaba and Timothy Slegel and Steven Carlough and
                 Christopher Krygowski and John G. Rell",
  title =        "The design of the fixed point unit for the z990
                 microprocessor",
  crossref =     "ACM:2004:GVN",
  pages =        "364--367",
  year =         "2004",
  bibdate =      "Thu Aug 07 18:08:54 2008",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The paper presents the design of the Fixed Point Unit
                 (FXU) for the IBM eServer z990 microprocessor
                 (announced in 2Q '03) that runs at 1.2 GHz [2]. The FXU
                 is capable of executing two Register-Memory
                 instructions including arithmetic instructions and a
                 branch instruction in a single cycle. The FXU executes
                 a total of 369 instructions that operate on variable
                 size operands (1 to 256 bytes). The instruction set
                 include decimal arithmetic with multiplies and divides,
                 binary arithmetic, shifts and rotates, loads/stores,
                 branches, long moves, logical operations, convert
                 instructions, and other special instructions. The FXU
                 consists of 64-bit dataflow stack that is custom
                 designed and a control stack that is synthesized. The
                 current FXU is the first superscalar design for the
                 CMOS z-series machines, has a new improved decimal
                 unit, and has for the first time a $ 16 \times 64 $ bit
                 binary multiplier.",
  acknowledgement = ack-nhfb,
  keywords =     "decimal arithmetic; microprocessor; superscalar FXU",
}


bibtype: inproceedings
filename: fparith.bib
label: Cagnard:2004:ABF
author: B. Cagnard and P. Simonnet
title: Automata, Borel functions and real numbers in Pisot base
crossref: Frougny:2004:RCR
pages: 37--54
year: 2004
bibdate: Fri Nov 17 07:00:31 2023
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2023.11.17 07:00:31 ???
URL: http://www.informatik.uni-trier.de/Reports/TR-08-2004/rnc6_05_cagnard.pdf
keywords: automata; Borel function; Borel set; sequential machine
acknowledgement: ack-nhfb
rawauthor: B. Cagnard and P. Simonnet
rawtitle: Automata, {Borel} functions and real numbers in {Pisot} base
abstract:
This note is about functions $ f : A^omega to B^omega $ whose graph is recognized by a Buchi finite automaton on the product alphabet $ A times B $. These functions are Baire class 2 in the Baire hierarchy of Borel functions and it is decidable whether such functions are continuous or not. In 1920 W. Sierpinski showed that a function $ f : mathbb R to mathbb R $ is Baire class 1 if and only if both the overgraph and the undergraph of $f$ are $ F_sigma $. We show that such characterization is also true for functions on infinite words if we replace the real ordering by the lexicographical ordering on $ B^omega $. From this we deduce that it is decidable whether such functions are of Baire class 1 or not. We extend this result to reals functions definable by automata in Pisot base.

rawabstract:
This note is about functions $ f : A^\omega \to B^\omega $ whose graph is recognized by a B{\"u}chi finite automaton on the product alphabet $ A \times B $. These functions are Baire class 2 in the Baire hierarchy of Borel functions and it is decidable whether such functions are continuous or not. In 1920 W. Sierpinski showed that a function $ f : \mathbb {R} \to \mathbb {R} $ is Baire class 1 if and only if both the overgraph and the undergraph of $f$ are $ F_\sigma $. We show that such characterization is also true for functions on infinite words if we replace the real ordering by the lexicographical ordering on $ B^\omega $. From this we deduce that it is decidable whether such functions are of Baire class 1 or not. We extend this result to reals functions definable by automata in Pisot base.

entry:
@InProceedings{Cagnard:2004:ABF,
  author =       "B. Cagnard and P. Simonnet",
  title =        "Automata, {Borel} functions and real numbers in
                 {Pisot} base",
  crossref =     "Frougny:2004:RCR",
  pages =        "37--54",
  year =         "2004",
  bibdate =      "Fri Nov 17 07:00:31 2023",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.informatik.uni-trier.de/Reports/TR-08-2004/rnc6_05_cagnard.pdf",
  abstract =     "This note is about functions $ f : A^\omega \to
                 B^\omega $ whose graph is recognized by a B{\"u}chi
                 finite automaton on the product alphabet $ A \times B
                 $. These functions are Baire class 2 in the Baire
                 hierarchy of Borel functions and it is decidable
                 whether such functions are continuous or not. In 1920
                 W. Sierpinski showed that a function $ f : \mathbb {R}
                 \to \mathbb {R} $ is Baire class 1 if and only if both
                 the overgraph and the undergraph of $f$ are $ F_\sigma
                 $. We show that such characterization is also true for
                 functions on infinite words if we replace the real
                 ordering by the lexicographical ordering on $ B^\omega
                 $. From this we deduce that it is decidable whether
                 such functions are of Baire class 1 or not. We extend
                 this result to reals functions definable by automata in
                 Pisot base.",
  acknowledgement = ack-nhfb,
  keywords =     "automata; Borel function; Borel set; sequential
                 machine",
}


bibtype: inproceedings
filename: fparith.bib
label: Cao:2004:DRB
author: B. Cao and T. Srikanthan and Chip-Hong Chang
booktitle: ISCAS '04, Proceedings of the 2004 International Symposium on Circuits and Systems, 23--26 May 2004
title: Design of residue-to-binary converter for a new $5$-moduli superset residue number system
volume: 2
publisher: pub-IEEE
address: pub-IEEE:adr
pages: II-841--4
year: 2004
DOI: https://doi.org/10.1109/IECON.2004.1432111
bibdate: Fri Nov 9 11:38:59 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:59 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: B. Cao and T. Srikanthan and Chip-Hong Chang
rawtitle: Design of residue-to-binary converter for a new $5$-moduli superset residue number system
rawbooktitle:
{ISCAS '04}, Proceedings of the 2004 International Symposium on Circuits and Systems, 23--26 May 2004

entry:
@InProceedings{Cao:2004:DRB,
  author =       "B. Cao and T. Srikanthan and Chip-Hong Chang",
  booktitle =    "{ISCAS '04}, Proceedings of the 2004 International
                 Symposium on Circuits and Systems, 23--26 May 2004",
  title =        "Design of residue-to-binary converter for a new
                 $5$-moduli superset residue number system",
  volume =       "2",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "II-841--4",
  year =         "2004",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/IECON.2004.1432111",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:59 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "This paper presents an efficient residue-to-binary
                 (R/B) conversion algorithm for a new 5-moduli superset
                 {2/sup n/-1, 2/sup n/, 2/sup n/+1, 2/sup n+1/-1, 2/sup
                 n-1/-1} residue number system (RNS) when n is even. The
                 new moduli set is provided for \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Cardarilli:2004:LPI
author: G. C. Cardarilli and A. Del Re and A. Nannarelli and M. Re
booktitle: ISCAS '04, Proceedings of the 2004 International Symposium on Circuits and Systems, 23--26 May 2004
title: Low-power implementation of polyphase filters in Quadratic Residue Number system
volume: 2
publisher: pub-IEEE
address: pub-IEEE:adr
pages: II-725--8
year: 2004
DOI: https://doi.org/10.1109/TWC.2004.833509
bibdate: Fri Nov 9 11:38:59 MST 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.09 11:38:59 MST
keywords: residue arithmetic; residue number system
acknowledgement: ack-nhfb
rawauthor: G. C. Cardarilli and A. Del Re and A. Nannarelli and M. Re
rawtitle: Low-power implementation of polyphase filters in {Quadratic Residue Number} system
rawbooktitle:
{ISCAS '04}, Proceedings of the 2004 International Symposium on Circuits and Systems, 23--26 May 2004

entry:
@InProceedings{Cardarilli:2004:LPI,
  author =       "G. C. Cardarilli and A. Del Re and A. Nannarelli and
                 M. Re",
  booktitle =    "{ISCAS '04}, Proceedings of the 2004 International
                 Symposium on Circuits and Systems, 23--26 May 2004",
  title =        "Low-power implementation of polyphase filters in
                 {Quadratic Residue Number} system",
  volume =       "2",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "II-725--8",
  year =         "2004",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/TWC.2004.833509",
  ISSN =         "????",
  bibdate =      "Fri Nov 9 11:38:59 MST 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "residue arithmetic; residue number system",
  summary =      "The aim of this work is the reduction of the power
                 dissipated in digital filters, while maintaining the
                 timing unchanged. A polyphase filter bank in the
                 Quadratic Residue Number System (QRNS) has been
                 implemented and then compared, in terms of \ldots{}",
}


bibtype: inproceedings
filename: fparith.bib
label: Chakraborty:2004:GAL
author: M. Chakraborty and A. Mitra
title: The gradient adaptive lattice algorithm in block floating point format
volume: 2
publisher: pub-IEEE
address: pub-IEEE:adr
pages: II-849--II-852
year: 2004
bibdate: Wed Apr 27 18:18:12 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.04.27 18:18:12 ???
acknowledgement: ack-nhfb
rawauthor: M. Chakraborty and A. Mitra
rawtitle: The gradient adaptive lattice algorithm in block floating point format
booktitle:
Proceedings. (ICASSP '04). IEEE International Conference on Acoustics, Speech, and Signal Processing, 17--21 May 2004

rawbooktitle:
Proceedings. {(ICASSP '04)}. {IEEE} International Conference on Acoustics, Speech, and Signal Processing, 17--21 May 2004

entry:
@InProceedings{Chakraborty:2004:GAL,
  author =       "M. Chakraborty and A. Mitra",
  booktitle =    "Proceedings. {(ICASSP '04)}. {IEEE} International
                 Conference on Acoustics, Speech, and Signal Processing,
                 17--21 May 2004",
  title =        "The gradient adaptive lattice algorithm in block
                 floating point format",
  volume =       "2",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "II-849--II-852",
  year =         "2004",
  bibdate =      "Wed Apr 27 18:18:12 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Chirca:2004:SLP
author: K. Chirca and M. Schulte and J. Glossner and S. Mamidi and S. Vassiliadis
title: A Static Low-Power, High-Performance 32-bit Carry Skip Adder
crossref: Selvaraj:2004:PES
pages: 615--619
year: 2004
bibdate: Sun Mar 04 20:52:48 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.03.04 20:52:48 ???
URL: http://mesa.ece.wisc.edu/publications/cp_2004-12.pdf
acknowledgement: ack-nhfb
rawauthor: K. Chirca and M. Schulte and J. Glossner and S. Mamidi and S. Vassiliadis
rawtitle: A Static Low-Power, High-Performance 32-bit Carry Skip Adder
entry:
@InProceedings{Chirca:2004:SLP,
  author =       "K. Chirca and M. Schulte and J. Glossner and S. Mamidi
                 and S. Vassiliadis",
  title =        "A Static Low-Power, High-Performance 32-bit Carry Skip
                 Adder",
  crossref =     "Selvaraj:2004:PES",
  pages =        "615--619",
  year =         "2004",
  bibdate =      "Sun Mar 04 20:52:48 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://mesa.ece.wisc.edu/publications/cp_2004-12.pdf",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Clinger:2004:HRF
author: William D. Clinger
title: How to read floating point numbers accurately
journal: j-SIGPLAN
volume: 39
number: 4
pages: 360--371
month: apr
monthnumber: 4
year: 2004
CODEN: SINODQ
ISSN: 0362-1340 (print), 1523-2867 (print), 1558-1160 OR 03621340 (print), 15232867 (print), 15581160
ISSNL: 0362-1340 OR 03621340
bibdate: Tue Apr 12 09:38:13 MDT 2005
bibsource: http://portal.acm.org/; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.04.12 09:38:13 MDT
fjournal: ACM SIGPLAN Notices
acknowledgement: ack-nhfb
journalURL: http://portal.acm.org/browse_dl.cfm?idx=J706
rawauthor: William D. Clinger
rawtitle: How to read floating point numbers accurately
entry:
@Article{Clinger:2004:HRF,
  author =       "William D. Clinger",
  title =        "How to read floating point numbers accurately",
  journal =      j-SIGPLAN,
  volume =       "39",
  number =       "4",
  pages =        "360--371",
  month =        apr,
  year =         "2004",
  CODEN =        "SINODQ",
  ISSN =         "0362-1340 (print), 1523-2867 (print), 1558-1160
                 (electronic)",
  ISSN-L =       "0362-1340",
  bibdate =      "Tue Apr 12 09:38:13 MDT 2005",
  bibsource =    "http://portal.acm.org/;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "ACM SIGPLAN Notices",
  journal-URL =  "http://portal.acm.org/browse_dl.cfm?idx=J706",
}


bibtype: article
filename: fparith.bib
label: Clinger:2004:RHR
author: William D. Clinger
title: Retrospective: How to read floating point numbers accurately
journal: j-SIGPLAN
volume: 39
number: 4
pages: 360--371
month: apr
monthnumber: 4
year: 2004
CODEN: SINODQ
DOI: https://doi.org/10.1145/989393.989430
ISSN: 0362-1340 (print), 1523-2867 (print), 1558-1160 OR 03621340 (print), 15232867 (print), 15581160
ISSNL: 0362-1340 OR 03621340
bibdate: Wed May 26 06:21:19 2004
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.05.26 06:21:19 ???
note: Best of PLDI 1979--1999. Reprint of, and retrospective on, cite Clinger:1990:HRF.
fjournal: ACM SIGPLAN Notices
acknowledgement: ack-nhfb
journalURL: http://portal.acm.org/browse_dl.cfm?idx=J706
rawauthor: William D. Clinger
rawnote: Best of PLDI 1979--1999. Reprint of, and retrospective on, \cite{Clinger:1990:HRF}.
rawtitle: Retrospective: How to read floating point numbers accurately
abstract:
Converting decimal scientific notation into binary floating point is nontrivial, but this conversion can be performed with the best possible accuracy without sacrificing efficiency. Consider the problem of converting decimal scientific notation for a number into the best binary floating point approximation to that number, for some fixed precision. This problem cannot be solved using arithmetic of any fixed precision. Hence the IEEE Standard for Binary Floating-Point Arithmetic does not require the result of such a conversion to be the best approximation. This paper presents an efficient algorithm that always finds the best approximation. The algorithm uses a few extra bits of precision to compute an IEEE-conforming approximation while testing an intermediate result to determine whether the approximation could be other than the best. If the approximation might not be the best, then the best approximation is determined by a few simple operations on multiple-precision integers, where the precision is determined by the input. When using 64 bits of precision to compute IEEE double precision results, the algorithm avoids higher-precision arithmetic over 99% of the time. The input problem considered by this paper is the inverse of an output problem considered by Steele and White: Given a binary floating point number, print a correctly rounded decimal representation of it using the smallest number of digits that will allow the number to be read without loss of accuracy. The Steele and White algorithm assumes that the input problem is solved; an imperfect solution to the input problem, as allowed by the IEEE standard and ubiquitous in current practice, defeats the purpose of their algorithm.

rawabstract:
Converting decimal scientific notation into binary floating point is nontrivial, but this conversion can be performed with the best possible accuracy without sacrificing efficiency. Consider the problem of converting decimal scientific notation for a number into the best binary floating point approximation to that number, for some fixed precision. This problem cannot be solved using arithmetic of any fixed precision. Hence the IEEE Standard for Binary Floating-Point Arithmetic does not require the result of such a conversion to be the best approximation. This paper presents an efficient algorithm that always finds the best approximation. The algorithm uses a few extra bits of precision to compute an IEEE-conforming approximation while testing an intermediate result to determine whether the approximation could be other than the best. If the approximation might not be the best, then the best approximation is determined by a few simple operations on multiple-precision integers, where the precision is determined by the input. When using 64 bits of precision to compute IEEE double precision results, the algorithm avoids higher-precision arithmetic over 99\% of the time. The input problem considered by this paper is the inverse of an output problem considered by Steele and White: Given a binary floating point number, print a correctly rounded decimal representation of it using the smallest number of digits that will allow the number to be read without loss of accuracy. The Steele and White algorithm assumes that the input problem is solved; an imperfect solution to the input problem, as allowed by the IEEE standard and ubiquitous in current practice, defeats the purpose of their algorithm.

entry:
@Article{Clinger:2004:RHR,
  author =       "William D. Clinger",
  title =        "Retrospective: How to read floating point numbers
                 accurately",
  journal =      j-SIGPLAN,
  volume =       "39",
  number =       "4",
  pages =        "360--371",
  month =        apr,
  year =         "2004",
  CODEN =        "SINODQ",
  DOI =          "https://doi.org/10.1145/989393.989430",
  ISSN =         "0362-1340 (print), 1523-2867 (print), 1558-1160
                 (electronic)",
  ISSN-L =       "0362-1340",
  bibdate =      "Wed May 26 06:21:19 2004",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "Best of PLDI 1979--1999. Reprint of, and retrospective
                 on, \cite{Clinger:1990:HRF}.",
  abstract =     "Converting decimal scientific notation into binary
                 floating point is nontrivial, but this conversion can
                 be performed with the best possible accuracy without
                 sacrificing efficiency. Consider the problem of
                 converting decimal scientific notation for a number
                 into the best binary floating point approximation to
                 that number, for some fixed precision. This problem
                 cannot be solved using arithmetic of any fixed
                 precision. Hence the IEEE Standard for Binary
                 Floating-Point Arithmetic does not require the result
                 of such a conversion to be the best approximation. This
                 paper presents an efficient algorithm that always finds
                 the best approximation. The algorithm uses a few extra
                 bits of precision to compute an IEEE-conforming
                 approximation while testing an intermediate result to
                 determine whether the approximation could be other than
                 the best. If the approximation might not be the best,
                 then the best approximation is determined by a few
                 simple operations on multiple-precision integers, where
                 the precision is determined by the input. When using 64
                 bits of precision to compute IEEE double precision
                 results, the algorithm avoids higher-precision
                 arithmetic over 99\% of the time. The input problem
                 considered by this paper is the inverse of an output
                 problem considered by Steele and White: Given a binary
                 floating point number, print a correctly rounded
                 decimal representation of it using the smallest number
                 of digits that will allow the number to be read without
                 loss of accuracy. The Steele and White algorithm
                 assumes that the input problem is solved; an imperfect
                 solution to the input problem, as allowed by the IEEE
                 standard and ubiquitous in current practice, defeats
                 the purpose of their algorithm.",
  acknowledgement = ack-nhfb,
  fjournal =     "ACM SIGPLAN Notices",
  journal-URL =  "http://portal.acm.org/browse_dl.cfm?idx=J706",
}


bibtype: article
filename: fparith.bib
label: Cowlishaw:2004:FFE
author: Mike Cowlishaw and Joshua Bloch and Joseph D. Darcy
title: Fixed, Floating, and Exact Computation in Java's em BigDecimal: Calculations just got easier
journal: j-DDJ
volume: 29
number: 7
pages: 22, 24, 26--27
month: jul
monthnumber: 7
year: 2004
CODEN: DDJOEB
ISSN: 1044-789X OR 1044789X
bibdate: Thu Jun 03 07:31:12 2004
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.06.03 07:31:12 ???
fjournal: Dr. Dobb's Journal of Software Tools
keywords: decimal floating-point arithmetic
acknowledgement: ack-nhfb
rawauthor: Mike Cowlishaw and Joshua Bloch and Joseph D. Darcy
rawtitle:
Fixed, Floating, and Exact Computation in {Java}'s {{\em BigDecimal\/}}: Calculations just got easier

entry:
@Article{Cowlishaw:2004:FFE,
  author =       "Mike Cowlishaw and Joshua Bloch and Joseph D. Darcy",
  title =        "Fixed, Floating, and Exact Computation in {Java}'s
                 {{\em BigDecimal\/}}: Calculations just got easier",
  journal =      j-DDJ,
  volume =       "29",
  number =       "7",
  pages =        "22, 24, 26--27",
  month =        jul,
  year =         "2004",
  CODEN =        "DDJOEB",
  ISSN =         "1044-789X",
  bibdate =      "Thu Jun 03 07:31:12 2004",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "Dr. Dobb's Journal of Software Tools",
  keywords =     "decimal floating-point arithmetic",
}


bibtype: article
filename: fparith.bib
label: Croot:2004:ACC
author: Ernie Croot and Ren-Cang Li and H. J. Hui June Zhu
title: The em abc conjecture and correctly rounded reciprocal square roots
journal: j-THEOR-COMP-SCI
volume: 315
number: 2--3
pages: 405--417
day: 6
month: may
monthnumber: 5
year: 2004
CODEN: TCSCDI
ISSN: 0304-3975 (print), 1879-2294 (electronic) OR 03043975 (print), 18792294 (electronic)
ISSNL: 0304-3975 OR 03043975
bibdate: Thu Nov 4 10:19:15 MST 2004
bibtimestamp: 2004.11.04 10:19:15 MST
fjournal: Theoretical Computer Science
acknowledgement: ack-nhfb
journalURL: http://www.sciencedirect.com/science/journal/03043975
rawauthor: Ernie Croot and Ren-Cang Li and H. J. Hui June Zhu
rawtitle: The {\em abc\/} conjecture and correctly rounded reciprocal square roots
bibsource:
http://www.sciencedirect.com/science/journal/03043975; https://www.math.utah.edu/pub/tex/bib/fparith.bib

abstract:
The reciprocal square root calculation $ alpha = 1 / sqrt x $ is very common in scientific computations. Having a correctly rounded implementation of it is of great importance in producing numerically predictable code among today's heterogeneous computing environment. Existing results suggest that to get the correctly rounded $ alpha $ in a floating point number system with $p$ significant bits, we may have to compute up to $ 3 p + 1 $ leading bits of $ alpha $. However, numerical evidence indicates the actual number may be as small as $ 2 p $ plus a few more bits. This paper attempts to bridge the gap by showing that this is indeed true, assuming the em abc conjecture which is widely purported to hold. (But our results do not tell exactly how many more bits beyond the $ 2 p $ bits, due to the fact that the constants involved in the conjecture are ineffective.) Along the way, rough bounds which are comparable to the existing ones are also proven. The technique used here is a combination of the classical Liouville's estimation and contemporary number theory.

rawabstract:
The reciprocal square root calculation $ \alpha = 1 / \sqrt {x} $ is very common in scientific computations. Having a correctly rounded implementation of it is of great importance in producing numerically predictable code among today's heterogeneous computing environment. Existing results suggest that to get the correctly rounded $ \alpha $ in a floating point number system with $p$ significant bits, we may have to compute up to $ 3 p + 1 $ leading bits of $ \alpha $. However, numerical evidence indicates the actual number may be as small as $ 2 p $ plus a few more bits. This paper attempts to bridge the gap by showing that this is indeed true, assuming the {\em abc\/} conjecture which is widely purported to hold. (But our results do not tell exactly how many more bits beyond the $ 2 p $ bits, due to the fact that the constants involved in the conjecture are ineffective.) Along the way, rough bounds which are comparable to the existing ones are also proven. The technique used here is a combination of the classical Liouville's estimation and contemporary number theory.

entry:
@Article{Croot:2004:ACC,
  author =       "Ernie Croot and Ren-Cang Li and H. J. Hui June Zhu",
  title =        "The {\em abc\/} conjecture and correctly rounded
                 reciprocal square roots",
  journal =      j-THEOR-COMP-SCI,
  volume =       "315",
  number =       "2--3",
  pages =        "405--417",
  day =          "6",
  month =        may,
  year =         "2004",
  CODEN =        "TCSCDI",
  ISSN =         "0304-3975 (print), 1879-2294 (electronic)",
  ISSN-L =       "0304-3975",
  bibdate =      "Thu Nov 4 10:19:15 MST 2004",
  bibsource =    "http://www.sciencedirect.com/science/journal/03043975;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The reciprocal square root calculation $ \alpha = 1 /
                 \sqrt {x} $ is very common in scientific computations.
                 Having a correctly rounded implementation of it is of
                 great importance in producing numerically predictable
                 code among today's heterogeneous computing environment.
                 Existing results suggest that to get the correctly
                 rounded $ \alpha $ in a floating point number system
                 with $p$ significant bits, we may have to compute up to
                 $ 3 p + 1 $ leading bits of $ \alpha $. However,
                 numerical evidence indicates the actual number may be
                 as small as $ 2 p $ plus a few more bits. This paper
                 attempts to bridge the gap by showing that this is
                 indeed true, assuming the {\em abc\/} conjecture which
                 is widely purported to hold. (But our results do not
                 tell exactly how many more bits beyond the $ 2 p $
                 bits, due to the fact that the constants involved in
                 the conjecture are ineffective.) Along the way, rough
                 bounds which are comparable to the existing ones are
                 also proven. The technique used here is a combination
                 of the classical Liouville's estimation and
                 contemporary number theory.",
  acknowledgement = ack-nhfb,
  fjournal =     "Theoretical Computer Science",
  journal-URL =  "http://www.sciencedirect.com/science/journal/03043975",
}


bibtype: techreport
filename: fparith.bib
label: Daumas:2004:GFCa
author: Marc Daumas and Guillaume Melquiond
title: Generating formally certified bounds on values and round-off errors
type: Research Report
number: RR2004-36
institution: Ecole Normale Superieure de Lyon
address: 69364 Lyon Cedex 07, France
pages: 2 + 24
month: jul
monthnumber: 7
year: 2004
bibdate: Mon Dec 06 10:59:57 2004
bibsource: http://www.ens-lyon.fr/LIP/Pub/rr2004.php; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 10:59:57 ???
URL: http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-36.ps.gz
keywords: Certification; Formal proof; Overflow; Round-off error; Safety critical
acknowledgement: ack-nhfb
rawauthor: Marc Daumas and Guillaume Melquiond
rawtitle: Generating formally certified bounds on values and round-off errors
abstract:
We present a new tool that generates bounds on the values and the round-off errors of programs using floating point operations. The tool is based on forward error analysis and interval arithmetic. The novelty of our tool is that it produces a formal proof of the bounds that can be checked independently using an automatic proof checker such as Coq and a complete model of floating point arithmetic. For the first time ever, we can easily certify that simple numerical programs such as the ones usually found in real time applications do not overflow and that round-off errors are below acceptable thresholds. Such level of quality should be compulsory on safety critical applications. As our tool is easy to handle, it could also be used for many pieces of software.

rawabstract:
We present a new tool that generates bounds on the values and the round-off errors of programs using floating point operations. The tool is based on forward error analysis and interval arithmetic. The novelty of our tool is that it produces a formal proof of the bounds that can be checked independently using an automatic proof checker such as Coq and a complete model of floating point arithmetic. For the first time ever, we can easily certify that simple numerical programs such as the ones usually found in real time applications do not overflow and that round-off errors are below acceptable thresholds. Such level of quality should be compulsory on safety critical applications. As our tool is easy to handle, it could also be used for many pieces of software.

entry:
@TechReport{Daumas:2004:GFCa,
  author =       "Marc Daumas and Guillaume Melquiond",
  title =        "Generating formally certified bounds on values and
                 round-off errors",
  type =         "Research Report",
  number =       "RR2004-36",
  institution =  "{\'E}cole Normale Sup{\'e}rieure de Lyon",
  address =      "69364 Lyon Cedex 07, France",
  pages =        "2 + 24",
  month =        jul,
  year =         "2004",
  bibdate =      "Mon Dec 06 10:59:57 2004",
  bibsource =    "http://www.ens-lyon.fr/LIP/Pub/rr2004.php;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-36.ps.gz",
  abstract =     "We present a new tool that generates bounds on the
                 values and the round-off errors of programs using
                 floating point operations. The tool is based on forward
                 error analysis and interval arithmetic. The novelty of
                 our tool is that it produces a formal proof of the
                 bounds that can be checked independently using an
                 automatic proof checker such as Coq and a complete
                 model of floating point arithmetic. For the first time
                 ever, we can easily certify that simple numerical
                 programs such as the ones usually found in real time
                 applications do not overflow and that round-off errors
                 are below acceptable thresholds. Such level of quality
                 should be compulsory on safety critical applications.
                 As our tool is easy to handle, it could also be used
                 for many pieces of software.",
  acknowledgement = ack-nhfb,
  keywords =     "Certification; Formal proof; Overflow; Round-off
                 error; Safety critical",
}


bibtype: inproceedings
filename: fparith.bib
label: Daumas:2004:GFCb
author: Marc Daumas and Guillaume Melquiond
title: Generating formally certified bounds on values and round-off errors
crossref: Frougny:2004:RCR
pages: 55--70
year: 2004
bibdate: Fri Nov 17 07:00:31 2023
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2023.11.17 07:00:31 ???
URL: http://www.informatik.uni-trier.de/Reports/TR-08-2004/rnc6_06_daumas.pdf
keywords: Certification; Formal proof; Overflow; Round-off error; Safety critical
acknowledgement: ack-nhfb
rawauthor: Marc Daumas and Guillaume Melquiond
rawtitle: Generating formally certified bounds on values and round-off errors
abstract:
We present a new tool that generates bounds on the values and the round-off errors of programs using floating point operations. The tool is based on forward error analysis and interval arithmetic. The novelty of our tool is that it produces a formal proof of the bounds that can be checked independently using an automatic proof checker such as Coq and a complete model of floating point arithmetic. For the first time ever, we can easily certify that simple numerical programs such as the ones usually found in real time applications do not overflow and that round-off errors are contained. Such level of quality should be compulsory on safety critical applications. As our tool is easy to handle, it could be used for many pieces of software.

rawabstract:
We present a new tool that generates bounds on the values and the round-off errors of programs using floating point operations. The tool is based on forward error analysis and interval arithmetic. The novelty of our tool is that it produces a formal proof of the bounds that can be checked independently using an automatic proof checker such as Coq and a complete model of floating point arithmetic. For the first time ever, we can easily certify that simple numerical programs such as the ones usually found in real time applications do not overflow and that round-off errors are contained. Such level of quality should be compulsory on safety critical applications. As our tool is easy to handle, it could be used for many pieces of software.

entry:
@InProceedings{Daumas:2004:GFCb,
  author =       "Marc Daumas and Guillaume Melquiond",
  title =        "Generating formally certified bounds on values and
                 round-off errors",
  crossref =     "Frougny:2004:RCR",
  pages =        "55--70",
  year =         "2004",
  bibdate =      "Fri Nov 17 07:00:31 2023",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.informatik.uni-trier.de/Reports/TR-08-2004/rnc6_06_daumas.pdf",
  abstract =     "We present a new tool that generates bounds on the
                 values and the round-off errors of programs using
                 floating point operations. The tool is based on forward
                 error analysis and interval arithmetic. The novelty of
                 our tool is that it produces a formal proof of the
                 bounds that can be checked independently using an
                 automatic proof checker such as Coq and a complete
                 model of floating point arithmetic. For the first time
                 ever, we can easily certify that simple numerical
                 programs such as the ones usually found in real time
                 applications do not overflow and that round-off errors
                 are contained. Such level of quality should be
                 compulsory on safety critical applications. As our tool
                 is easy to handle, it could be used for many pieces of
                 software.",
  acknowledgement = ack-nhfb,
  keywords =     "Certification; Formal proof; Overflow; Round-off
                 error; Safety critical",
}


bibtype: misc
filename: fparith.bib
label: deDinechin:2004:C
author: Florent de Dinechin
title: crlibm
pages: 55--70
day: 16
month: apr
monthnumber: 4
year: 2004
bibdate: Fri Jun 24 14:38:41 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.24 14:38:41 ???
URL: http://lipforge.ens-lyon.fr/projects/crlibm/
acknowledgement: ack-nhfb
howpublished: World-Wide Web software project archive.
rawauthor: Florent de Dinechin
rawtitle: crlibm
abstract:
The purpose of this project is to offer a mathematical library (libm) with proven, IEEE-754 compliant, correct rounding in the four rounding modes, and performances comparable to standard libms.

rawabstract:
The purpose of this project is to offer a mathematical library (libm) with proven, IEEE-754 compliant, correct rounding in the four rounding modes, and performances comparable to standard libms.

entry:
@Misc{deDinechin:2004:C,
  author =       "Florent de Dinechin",
  title =        "crlibm",
  howpublished = "World-Wide Web software project archive.",
  day =          "16",
  month =        apr,
  year =         "2004",
  bibdate =      "Fri Jun 24 14:38:41 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://lipforge.ens-lyon.fr/projects/crlibm/",
  abstract =     "The purpose of this project is to offer a mathematical
                 library (libm) with proven, IEEE-754 compliant, correct
                 rounding in the four rounding modes, and performances
                 comparable to standard libms.",
  acknowledgement = ack-nhfb,
}


bibtype: techreport
filename: fparith.bib
label: deDinechin:2004:FCR
author: Florent de Dinechin and David Defour and Christoph Lauter
title: Fast correct rounding of elementary functions in double precision using double-extended arithmetic
type: Research Report
number: RR2004-10
institution: Ecole Normale Superieure de Lyon
address: 69364 Lyon Cedex 07, France
pages: 2 + 12
month: mar
monthnumber: 3
year: 2004
bibdate: Mon Dec 06 10:49:12 2004
bibsource: http://www.ens-lyon.fr/LIP/Pub/rr2004.php; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 10:49:12 ???
URL: http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-10.pdf
acknowledgement: ack-nhfb
rawauthor: Florent de Dinechin and David Defour and Christoph Lauter
rawtitle: Fast correct rounding of elementary functions in double precision using double-extended arithmetic
abstract:
This article shows that IEEE-754 double-precision correct rounding of the most common elementary functions (exp/log, trigonometric and hyperbolic) is achievable on current processors using only double-double-extended arithmetic. This allows to improve by several orders of magnitude the worst case performance of a correctly-rounded mathematical library, compared to the current state of the art. This article builds up on previous work by Lefevre and Muller, who have shown that an intermediate accuracy of up to 158 bits is required for the evaluation of some functions. We show that the practical accuracy required can always be reduced to less than 119 bits, which is easy to obtain using well-known and well-proven techniques of double-double-extended arithmetic. As an example, a prototype implementation of the exponential function on the Itanium has a worst-case time about twice that of the standard, highly optimized libm by Intel, which doesn't offer correct rounding. Such a small performance penalty should allow correct rounding of elementary functions to become the standard.

keywords:
Correct Rounding; Double-extended Precision; Elementary Functions; floating-point arithmetic; IEEE-754

rawabstract:
This article shows that IEEE-754 double-precision correct rounding of the most common elementary functions (exp/log, trigonometric and hyperbolic) is achievable on current processors using only double-double-extended arithmetic. This allows to improve by several orders of magnitude the worst case performance of a correctly-rounded mathematical library, compared to the current state of the art. This article builds up on previous work by Lef{\`e}vre and Muller, who have shown that an intermediate accuracy of up to 158 bits is required for the evaluation of some functions. We show that the practical accuracy required can always be reduced to less than 119 bits, which is easy to obtain using well-known and well-proven techniques of double-double-extended arithmetic. As an example, a prototype implementation of the exponential function on the Itanium has a worst-case time about twice that of the standard, highly optimized libm by Intel, which doesn't offer correct rounding. Such a small performance penalty should allow correct rounding of elementary functions to become the standard.

entry:
@TechReport{deDinechin:2004:FCR,
  author =       "Florent de Dinechin and David Defour and Christoph
                 Lauter",
  title =        "Fast correct rounding of elementary functions in
                 double precision using double-extended arithmetic",
  type =         "Research Report",
  number =       "RR2004-10",
  institution =  "{\'E}cole Normale Sup{\'e}rieure de Lyon",
  address =      "69364 Lyon Cedex 07, France",
  pages =        "2 + 12",
  month =        mar,
  year =         "2004",
  bibdate =      "Mon Dec 06 10:49:12 2004",
  bibsource =    "http://www.ens-lyon.fr/LIP/Pub/rr2004.php;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-10.pdf",
  abstract =     "This article shows that IEEE-754 double-precision
                 correct rounding of the most common elementary
                 functions (exp/log, trigonometric and hyperbolic) is
                 achievable on current processors using only
                 double-double-extended arithmetic. This allows to
                 improve by several orders of magnitude the worst case
                 performance of a correctly-rounded mathematical
                 library, compared to the current state of the art. This
                 article builds up on previous work by Lef{\`e}vre and
                 Muller, who have shown that an intermediate accuracy of
                 up to 158 bits is required for the evaluation of some
                 functions. We show that the practical accuracy required
                 can always be reduced to less than 119 bits, which is
                 easy to obtain using well-known and well-proven
                 techniques of double-double-extended arithmetic. As an
                 example, a prototype implementation of the exponential
                 function on the Itanium has a worst-case time about
                 twice that of the standard, highly optimized libm by
                 Intel, which doesn't offer correct rounding. Such a
                 small performance penalty should allow correct rounding
                 of elementary functions to become the standard.",
  acknowledgement = ack-nhfb,
  keywords =     "Correct Rounding; Double-extended Precision;
                 Elementary Functions; floating-point arithmetic;
                 IEEE-754",
}


bibtype: inproceedings
filename: fparith.bib
label: deDinechin:2004:PCR
author: Florent de Dinechin and Catherine Loirat and Jean-Michel Muller
title: A proven correctly rounded logarithm in double-precision
crossref: Frougny:2004:RCR
pages: 71--85
year: 2004
bibdate: Fri Nov 17 07:00:31 2023
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2023.11.17 07:00:31 ???
URL: http://www.informatik.uni-trier.de/Reports/TR-08-2004/rnc6_07_dinechin.pdf
keywords: arithmetic; correct rounding; elementary functions; floating-point; libm; logarithm
acknowledgement: ack-nhfb
rawauthor: Florent de Dinechin and Catherine Loirat and Jean-Michel Muller
rawtitle: A proven correctly rounded logarithm in double-precision
abstract:
This article is a case study in the implementation of a proven, portable, and efficient correctly rounded elementary function in double-precision. We describe the methodology used in the implementation of the natural logarithm in the crlibm library. The discipline required to prove a tight bound on the overall evaluation error allows to design a very efficient implementation with moderate effort.

rawabstract:
This article is a case study in the implementation of a proven, portable, and efficient correctly rounded elementary function in double-precision. We describe the methodology used in the implementation of the natural logarithm in the crlibm library. The discipline required to prove a tight bound on the overall evaluation error allows to design a very efficient implementation with moderate effort.

entry:
@InProceedings{deDinechin:2004:PCR,
  author =       "Florent de Dinechin and Catherine Loirat and
                 Jean-Michel Muller",
  title =        "A proven correctly rounded logarithm in
                 double-precision",
  crossref =     "Frougny:2004:RCR",
  pages =        "71--85",
  year =         "2004",
  bibdate =      "Fri Nov 17 07:00:31 2023",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.informatik.uni-trier.de/Reports/TR-08-2004/rnc6_07_dinechin.pdf",
  abstract =     "This article is a case study in the implementation of
                 a proven, portable, and efficient correctly rounded
                 elementary function in double-precision. We describe
                 the methodology used in the implementation of the
                 natural logarithm in the crlibm library. The discipline
                 required to prove a tight bound on the overall
                 evaluation error allows to design a very efficient
                 implementation with moderate effort.",
  acknowledgement = ack-nhfb,
  keywords =     "arithmetic; correct rounding; elementary functions;
                 floating-point; libm; logarithm",
}


bibtype: techreport
filename: fparith.bib
label: deDinechin:2004:TPU
author: Florent de Dinechin and Nicolas Gast
title: Towards the post-ultimate tt libm
type: Research Report
number: RR2004-47
institution: Ecole Normale Superieure de Lyon
address: 69364 Lyon Cedex 07, France
pages: 71--85
month: nov
monthnumber: 11
year: 2004
bibdate: Mon Dec 06 11:15:40 2004
bibsource: http://www.ens-lyon.fr/LIP/Pub/rr2004.php; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 11:15:40 ???
URL: http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-47.pdf
keywords: correct rounding; Elementary Functions; floating-point arithmetic; IEEE-754
acknowledgement: ack-nhfb
rawauthor: Florent de Dinechin and Nicolas Gast
rawtitle: Towards the post-ultimate {\tt libm}
abstract:
This article presents advances in the subject of double-precision correctly rounded elementary functions since the publication of the libultim mathematical library developed by Ziv at IBM. This library demonstrated that the performance overhead of correct rounding could be made negligible in average. However, the worst case execution time was up to 1000 times the average time, and memory consumption was also a problem. To address these questions, a range of new techniques, from the more portable to the more efficient, are presented, and demonstrated on two typical functions, exponential and arctangent. The main result of this paper is to show that the worst-case execution time can be bounded within a factor of 2 to 10 of the average time, with memory consumption comparable to current libms. This has in turn implications on the techniques and tradeoffs for correctly rounded functions. This article also shows that these techniques make it much easier to prove the correct rounding property. Thus, this article lifts the last technical obstacles to a widespread use of (at least some) correctly rounded double precision elementary functions.

rawabstract:
This article presents advances in the subject of double-precision correctly rounded elementary functions since the publication of the libultim mathematical library developed by Ziv at IBM. This library demonstrated that the performance overhead of correct rounding could be made negligible in average. However, the worst case execution time was up to 1000 times the average time, and memory consumption was also a problem. To address these questions, a range of new techniques, from the more portable to the more efficient, are presented, and demonstrated on two typical functions, exponential and arctangent. The main result of this paper is to show that the worst-case execution time can be bounded within a factor of 2 to 10 of the average time, with memory consumption comparable to current libms. This has in turn implications on the techniques and tradeoffs for correctly rounded functions. This article also shows that these techniques make it much easier to prove the correct rounding property. Thus, this article lifts the last technical obstacles to a widespread use of (at least some) correctly rounded double precision elementary functions.

entry:
@TechReport{deDinechin:2004:TPU,
  author =       "Florent de Dinechin and Nicolas Gast",
  title =        "Towards the post-ultimate {\tt libm}",
  type =         "Research Report",
  number =       "RR2004-47",
  institution =  "{\'E}cole Normale Sup{\'e}rieure de Lyon",
  address =      "69364 Lyon Cedex 07, France",
  month =        nov,
  year =         "2004",
  bibdate =      "Mon Dec 06 11:15:40 2004",
  bibsource =    "http://www.ens-lyon.fr/LIP/Pub/rr2004.php;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-47.pdf",
  abstract =     "This article presents advances in the subject of
                 double-precision correctly rounded elementary functions
                 since the publication of the libultim mathematical
                 library developed by Ziv at IBM. This library
                 demonstrated that the performance overhead of correct
                 rounding could be made negligible in average. However,
                 the worst case execution time was up to 1000 times the
                 average time, and memory consumption was also a
                 problem. To address these questions, a range of new
                 techniques, from the more portable to the more
                 efficient, are presented, and demonstrated on two
                 typical functions, exponential and arctangent. The main
                 result of this paper is to show that the worst-case
                 execution time can be bounded within a factor of 2 to
                 10 of the average time, with memory consumption
                 comparable to current libms. This has in turn
                 implications on the techniques and tradeoffs for
                 correctly rounded functions. This article also shows
                 that these techniques make it much easier to prove the
                 correct rounding property. Thus, this article lifts the
                 last technical obstacles to a widespread use of (at
                 least some) correctly rounded double precision
                 elementary functions.",
  acknowledgement = ack-nhfb,
  keywords =     "correct rounding; Elementary Functions; floating-point
                 arithmetic; IEEE-754",
}


bibtype: article
filename: fparith.bib
label: deFigueiredo:2004:AAC
author: Luiz Henrique de Figueiredo and Jorge Stolfi
title: Affine Arithmetic: Concepts and Applications
journal: j-NUMER-ALGORITHMS
volume: 37
number: 1--4
pages: 147--158
month: dec
monthnumber: 12
year: 2004
CODEN: NUALEG
ISSN: 1017-1398 (print), 1572-9265 (electronic) OR 10171398 (print), 15729265 (electronic)
ISSNL: 1017-1398 OR 10171398
bibdate: Mon Dec 6 07:00:28 MST 2004
bibsource: http://www.kluweronline.com/issn/1017-1398; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 07:00:28 MST
URL: http://ipsapp009.kluweronline.com/IPS/content/ext/x/J/5058/I/58/A/10/abstract.htm
fjournal: Numerical Algorithms
remark: Special Issue: SCAN'2002 International Conference (Guest Editors: Rene Alt and Jean-Luc Lamotte)
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/11075
rawauthor: Luiz Henrique de Figueiredo and Jorge Stolfi
rawtitle: Affine Arithmetic: Concepts and Applications
entry:
@Article{deFigueiredo:2004:AAC,
  author =       "Luiz Henrique de Figueiredo and Jorge Stolfi",
  title =        "Affine Arithmetic: Concepts and Applications",
  journal =      j-NUMER-ALGORITHMS,
  volume =       "37",
  number =       "1--4",
  pages =        "147--158",
  month =        dec,
  year =         "2004",
  CODEN =        "NUALEG",
  ISSN =         "1017-1398 (print), 1572-9265 (electronic)",
  ISSN-L =       "1017-1398",
  bibdate =      "Mon Dec 6 07:00:28 MST 2004",
  bibsource =    "http://www.kluweronline.com/issn/1017-1398;
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  URL =          "http://ipsapp009.kluweronline.com/IPS/content/ext/x/J/5058/I/58/A/10/abstract.htm",
  acknowledgement = ack-nhfb,
  fjournal =     "Numerical Algorithms",
  journal-URL =  "http://link.springer.com/journal/11075",
  remark =       "Special Issue: SCAN'2002 International Conference
                 (Guest Editors: Ren{\'e} Alt and Jean-Luc Lamotte)",
}


bibtype: article
filename: fparith.bib
label: Defour:2004:PSM
title: Proposal for a Standardization of Mathematical Function Implementation in Floating-Point Arithmetic
journal: j-NUMER-ALGORITHMS
volume: 37
number: 1--4
pages: 367--375
month: dec
monthnumber: 12
year: 2004
CODEN: NUALEG
ISSN: 1017-1398 (print), 1572-9265 (electronic) OR 10171398 (print), 15729265 (electronic)
ISSNL: 1017-1398 OR 10171398
MRclass: 65D20 (65G50)
MRnumber: MR2109920
bibdate: Mon Dec 6 07:00:28 MST 2004
bibsource: http://www.kluweronline.com/issn/1017-1398; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 07:00:28 MST
fjournal: Numerical Algorithms
remark: Special Issue: SCAN'2002 International Conference (Guest Editors: Ren e Alt and Jean-Luc Lamotte)
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/11075
rawtitle: Proposal for a Standardization of Mathematical Function Implementation in Floating-Point Arithmetic
author:
David Defour and Guillaume Hanrot and Vincent Lefevre and Jean-Michel Muller and Nathalie Revol and Paul Zimmermann

URL:
http://ipsapp009.kluweronline.com/IPS/content/ext/x/J/5058/I/58/A/30/abstract.htm; http://perso.ens-lyon.fr/jean-michel.muller/NumAlg04.pdf; http://www.loria.fr/~zimmerma/papers/PropStandFunctions.pdf

rawauthor:
David Defour and Guillaume Hanrot and Vincent Lef{\`e}vre and Jean-Michel Muller and Nathalie Revol and Paul Zimmermann

entry:
@Article{Defour:2004:PSM,
  author =       "David Defour and Guillaume Hanrot and Vincent
                 Lef{\`e}vre and Jean-Michel Muller and Nathalie Revol
                 and Paul Zimmermann",
  title =        "Proposal for a Standardization of Mathematical
                 Function Implementation in Floating-Point Arithmetic",
  journal =      j-NUMER-ALGORITHMS,
  volume =       "37",
  number =       "1--4",
  pages =        "367--375",
  month =        dec,
  year =         "2004",
  CODEN =        "NUALEG",
  ISSN =         "1017-1398 (print), 1572-9265 (electronic)",
  ISSN-L =       "1017-1398",
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  MRnumber =     "MR2109920",
  bibdate =      "Mon Dec 6 07:00:28 MST 2004",
  bibsource =    "http://www.kluweronline.com/issn/1017-1398;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://ipsapp009.kluweronline.com/IPS/content/ext/x/J/5058/I/58/A/30/abstract.htm;
                 http://perso.ens-lyon.fr/jean-michel.muller/NumAlg04.pdf;
                 http://www.loria.fr/~zimmerma/papers/PropStandFunctions.pdf",
  acknowledgement = ack-nhfb,
  fjournal =     "Numerical Algorithms",
  journal-URL =  "http://link.springer.com/journal/11075",
  remark =       "Special Issue: SCAN'2002 International Conference
                 (Guest Editors: Ren {\'e} Alt and Jean-Luc Lamotte)",
}


bibtype: inproceedings
filename: fparith.bib
label: DelRe:2004:TAG
author: A. Del Re and A. Nannaelli and M. Re
booktitle: Proc. Design Auto. Test Europe (DATE), Vol. 1, Feb. 2004
title: A Tool for Automatic Generation of RTL-level VHDL Description of RNS FIR Filters
pages: ??--??
year: 2004
bibdate: Fri Jun 24 18:18:50 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.24 18:18:50 ???
keywords: Residue Number System (RNS)
acknowledgement: ack-nhfb
rawauthor: A. {Del Re} and A. Nannaelli and M. Re
rawbooktitle: Proc. Design Auto. Test Europe {(DATE)}, Vol. 1, Feb. 2004
rawtitle: A Tool for Automatic Generation of {RTL}-level {VHDL} Description of {RNS FIR} Filters
entry:
@InProceedings{DelRe:2004:TAG,
  author =       "A. {Del Re} and A. Nannaelli and M. Re",
  booktitle =    "Proc. Design Auto. Test Europe {(DATE)}, Vol. 1, Feb.
                 2004",
  title =        "A Tool for Automatic Generation of {RTL}-level {VHDL}
                 Description of {RNS FIR} Filters",
  publisher =    "????",
  address =      "????",
  pages =        "??--??",
  year =         "2004",
  ISBN =         "????",
  ISBN-13 =      "????",
  LCCN =         "????",
  bibdate =      "Fri Jun 24 18:18:50 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Residue Number System (RNS)",
}


bibtype: incollection
filename: fparith.bib
label: Demmel:2004:AEA
author: James Demmel and Plamen Koev
title: Accurate and efficient algorithms for floating point computation
crossref: Hilledt:2004:AME
pages: 73--88
year: 2004
MRclass: 65Gxx (65Fxx)
MRnumber: MR2296263
bibdate: Thu Nov 8 19:16:14 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.11.08 19:16:14 ???
keywords: accurate floating-point summation
acknowledgement: ack-nhfb
rawauthor: James Demmel and Plamen Koev
rawtitle: Accurate and efficient algorithms for floating point computation
entry:
@InCollection{Demmel:2004:AEA,
  author =       "James Demmel and Plamen Koev",
  title =        "Accurate and efficient algorithms for floating point
                 computation",
  crossref =     "Hilledt:2004:AME",
  pages =        "73--88",
  year =         "2004",
  MRclass =      "65Gxx (65Fxx)",
  MRnumber =     "MR2296263",
  bibdate =      "Thu Nov 8 19:16:14 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "accurate floating-point summation",
}


bibtype: article
filename: fparith.bib
label: Demmel:2004:FAF
author: James Demmel and Yozo Hida
title: Fast and Accurate Floating Point Summation with Application to Computational Geometry
journal: j-NUMER-ALGORITHMS
volume: 37
number: 1--4
pages: 101--112
month: dec
monthnumber: 12
year: 2004
CODEN: NUALEG
ISSN: 1017-1398 (print), 1572-9265 (electronic) OR 10171398 (print), 15729265 (electronic)
ISSNL: 1017-1398 OR 10171398
MRclass: 65B10 (65D18)
MRnumber: MR2109897
bibdate: Mon Dec 6 07:00:28 MST 2004
bibsource: http://www.kluweronline.com/issn/1017-1398; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 07:00:28 MST
URL: http://ipsapp009.kluweronline.com/IPS/content/ext/x/J/5058/I/58/A/6/abstract.htm
fjournal: Numerical Algorithms
keywords: accurate floating-point summation
remark: Special Issue: SCAN'2002 International Conference (Guest Editors: Ren e Alt and Jean-Luc Lamotte)
acknowledgement: ack-nhfb
journalURL: http://link.springer.com/journal/11075
rawauthor: James Demmel and Yozo Hida
rawtitle: Fast and Accurate Floating Point Summation with Application to Computational Geometry
entry:
@Article{Demmel:2004:FAF,
  author =       "James Demmel and Yozo Hida",
  title =        "Fast and Accurate Floating Point Summation with
                 Application to Computational Geometry",
  journal =      j-NUMER-ALGORITHMS,
  volume =       "37",
  number =       "1--4",
  pages =        "101--112",
  month =        dec,
  year =         "2004",
  CODEN =        "NUALEG",
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  ISSN-L =       "1017-1398",
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  bibdate =      "Mon Dec 6 07:00:28 MST 2004",
  bibsource =    "http://www.kluweronline.com/issn/1017-1398;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://ipsapp009.kluweronline.com/IPS/content/ext/x/J/5058/I/58/A/6/abstract.htm",
  acknowledgement = ack-nhfb,
  fjournal =     "Numerical Algorithms",
  journal-URL =  "http://link.springer.com/journal/11075",
  keywords =     "accurate floating-point summation",
  remark =       "Special Issue: SCAN'2002 International Conference
                 (Guest Editors: Ren {\'e} Alt and Jean-Luc Lamotte)",
}


bibtype: techreport
filename: fparith.bib
label: Detrey:2004:SOF
author: Jeremie Detrey and Florent de Dinechin
title: Second Order Function Approximation with a Single Small Multiplication
type: Research Report
number: RR2004-13
institution: Ecole Normale Superieure de Lyon
address: 69364 Lyon Cedex 07, France
pages: 2 + 8
month: mar
monthnumber: 3
year: 2004
bibdate: Mon Dec 06 10:51:35 2004
bibsource: http://www.ens-lyon.fr/LIP/Pub/rr2004.php; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 10:51:35 ???
URL: http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-13.ps.gz
keywords: Computer Arithmetic; Hardware Elementary Functions Evaluation.
acknowledgement: ack-nhfb
rawauthor: J{\'e}r{\'e}mie Detrey and Florent de Dinechin
rawtitle: Second Order Function Approximation with a Single Small Multiplication
abstract:
This paper presents a new scheme for the hardware evaluation of elementary functions, based on a piecewise second order minimax approximation. The novelty is that this evaluation requires only one small rectangular multiplication. Therefore the resulting architecture combines a small table size, thanks to second-order evaluation, with a short critical path: Consisting of one table lookup, the rectangular multiplication, and one addition, the critical path is shorter than that of a plain first-order evaluation. Synthesis results for several functions show that this method outperforms all the previously published methods in both area and speed for precisions ranging from 12 to 24 bits.

rawabstract:
This paper presents a new scheme for the hardware evaluation of elementary functions, based on a piecewise second order minimax approximation. The novelty is that this evaluation requires only one small rectangular multiplication. Therefore the resulting architecture combines a small table size, thanks to second-order evaluation, with a short critical path: Consisting of one table lookup, the rectangular multiplication, and one addition, the critical path is shorter than that of a plain first-order evaluation. Synthesis results for several functions show that this method outperforms all the previously published methods in both area and speed for precisions ranging from 12 to 24 bits.

entry:
@TechReport{Detrey:2004:SOF,
  author =       "J{\'e}r{\'e}mie Detrey and Florent de Dinechin",
  title =        "Second Order Function Approximation with a Single
                 Small Multiplication",
  type =         "Research Report",
  number =       "RR2004-13",
  institution =  "{\'E}cole Normale Sup{\'e}rieure de Lyon",
  address =      "69364 Lyon Cedex 07, France",
  pages =        "2 + 8",
  month =        mar,
  year =         "2004",
  bibdate =      "Mon Dec 06 10:51:35 2004",
  bibsource =    "http://www.ens-lyon.fr/LIP/Pub/rr2004.php;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-13.ps.gz",
  abstract =     "This paper presents a new scheme for the hardware
                 evaluation of elementary functions, based on a
                 piecewise second order minimax approximation. The
                 novelty is that this evaluation requires only one small
                 rectangular multiplication. Therefore the resulting
                 architecture combines a small table size, thanks to
                 second-order evaluation, with a short critical path:
                 Consisting of one table lookup, the rectangular
                 multiplication, and one addition, the critical path is
                 shorter than that of a plain first-order evaluation.
                 Synthesis results for several functions show that this
                 method outperforms all the previously published methods
                 in both area and speed for precisions ranging from 12
                 to 24 bits.",
  acknowledgement = ack-nhfb,
  keywords =     "Computer Arithmetic; Hardware Elementary Functions
                 Evaluation.",
}


bibtype: techreport
filename: fparith.bib
label: Detrey:2004:TBP
author: Jeremie Detrey and Florent de Dinechin
title: Table-based polynomials for fast hardware function evaluation
type: Research Report
number: November 2004
institution: Ecole Normale Superieure de Lyon
address: 69364 Lyon Cedex 07, France
pages: 2 + 11
year: 2004
bibdate: Mon Dec 06 11:19:55 2004
bibsource: http://www.ens-lyon.fr/LIP/Pub/rr2004.php; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 11:19:55 ???
URL: http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-52.ps.gz
keywords: FPGA; Function evaluation; hardware operators; polynomial approximation; table-based method
acknowledgement: ack-nhfb
rawauthor: J{\'e}r{\'e}mie Detrey and Florent de Dinechin
rawtitle: Table-based polynomials for fast hardware function evaluation
abstract:
Many general table-based methods for the evaluation in hardware of elementary functions have been published. The bipartite and multipartite methods implement a first-order approximation of the function using only table lookups and additions. Recently, a single-multiplier second-order method of similar inspiration has also been published. This paper presents a general framework extending such methods to approximations of arbitrary order, using adders, small multipliers, and very small ad-hoc powering units. We obtain implementations that are both smaller and faster than all previously published approaches. This paper also deals with the FPGA implementation of such methods. Previous work have consistently shown that the more complex methods were also faster: The reduction of the table size meant a reduction of its lookup time, which compensated for the addition and multiplication time. A second contribution is therefore to finally create a tradeoff between space and time among table-based methods.

rawabstract:
Many general table-based methods for the evaluation in hardware of elementary functions have been published. The bipartite and multipartite methods implement a first-order approximation of the function using only table lookups and additions. Recently, a single-multiplier second-order method of similar inspiration has also been published. This paper presents a general framework extending such methods to approximations of arbitrary order, using adders, small multipliers, and very small ad-hoc powering units. We obtain implementations that are both smaller and faster than all previously published approaches. This paper also deals with the FPGA implementation of such methods. Previous work have consistently shown that the more complex methods were also faster: The reduction of the table size meant a reduction of its lookup time, which compensated for the addition and multiplication time. A second contribution is therefore to finally create a tradeoff between space and time among table-based methods.

entry:
@TechReport{Detrey:2004:TBP,
  author =       "J{\'e}r{\'e}mie Detrey and Florent de Dinechin",
  title =        "Table-based polynomials for fast hardware function
                 evaluation",
  type =         "Research Report",
  number =       "November 2004",
  institution =  "{\'E}cole Normale Sup{\'e}rieure de Lyon",
  address =      "69364 Lyon Cedex 07, France",
  pages =        "2 + 11",
  year =         "2004",
  bibdate =      "Mon Dec 06 11:19:55 2004",
  bibsource =    "http://www.ens-lyon.fr/LIP/Pub/rr2004.php;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-52.ps.gz",
  abstract =     "Many general table-based methods for the evaluation in
                 hardware of elementary functions have been published.
                 The bipartite and multipartite methods implement a
                 first-order approximation of the function using only
                 table lookups and additions. Recently, a
                 single-multiplier second-order method of similar
                 inspiration has also been published. This paper
                 presents a general framework extending such methods to
                 approximations of arbitrary order, using adders, small
                 multipliers, and very small ad-hoc powering units. We
                 obtain implementations that are both smaller and faster
                 than all previously published approaches. This paper
                 also deals with the FPGA implementation of such
                 methods. Previous work have consistently shown that the
                 more complex methods were also faster: The reduction of
                 the table size meant a reduction of its lookup time,
                 which compensated for the addition and multiplication
                 time. A second contribution is therefore to finally
                 create a tradeoff between space and time among
                 table-based methods.",
  acknowledgement = ack-nhfb,
  keywords =     "FPGA; Function evaluation; hardware operators;
                 polynomial approximation; table-based method",
}


bibtype: techreport
filename: fparith.bib
label: Detrey:2004:TUC
author: Jeremie Detrey and Florent de Dinechin
title: A tool for unbiased comparison between logarithmic and floating-point arithmetic
type: Research Report
number: RR2004-31
institution: Ecole Normale Superieure de Lyon
address: 69364 Lyon Cedex 07, France
pages: 2 + 16
month: jun
monthnumber: 6
year: 2004
bibdate: Mon Dec 06 10:56:33 2004
bibsource: http://www.ens-lyon.fr/LIP/Pub/rr2004.php; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 10:56:33 ???
URL: http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-31.ps.gz
keywords: Arithmetic; Floating-Point; FPGA; Hardware Operators; LNS; Logarithmic Number system; VHDL
acknowledgement: ack-nhfb
rawauthor: J{\'e}r{\'e}mie Detrey and Florent de Dinechin
rawtitle: A tool for unbiased comparison between logarithmic and floating-point arithmetic
abstract:
This paper describes two concurrent libraries of parameterized arithmetic operators for manipulating high-dynamic numbers on FPGAs. One of them uses a floating-point representation, the other one uses a logarithmic representation. Along with their direct interest, those two libraries allow application-specific comparisons of those two number representation systems. They are unbiased in the sense that they tend to reflect the state-of-the-art for both number arithmetic systems, and are freely available at path =http://www.ens-lyon.fr/LIP/Arenaire/=.

rawabstract:
This paper describes two concurrent libraries of parameterized arithmetic operators for manipulating high-dynamic numbers on FPGAs. One of them uses a floating-point representation, the other one uses a logarithmic representation. Along with their direct interest, those two libraries allow application-specific comparisons of those two number representation systems. They are unbiased in the sense that they tend to reflect the state-of-the-art for both number arithmetic systems, and are freely available at \path=http://www.ens-lyon.fr/LIP/Arenaire/=.

entry:
@TechReport{Detrey:2004:TUC,
  author =       "J{\'e}r{\'e}mie Detrey and Florent de Dinechin",
  title =        "A tool for unbiased comparison between logarithmic and
                 floating-point arithmetic",
  type =         "Research Report",
  number =       "RR2004-31",
  institution =  "{\'E}cole Normale Sup{\'e}rieure de Lyon",
  address =      "69364 Lyon Cedex 07, France",
  pages =        "2 + 16",
  month =        jun,
  year =         "2004",
  bibdate =      "Mon Dec 06 10:56:33 2004",
  bibsource =    "http://www.ens-lyon.fr/LIP/Pub/rr2004.php;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-31.ps.gz",
  abstract =     "This paper describes two concurrent libraries of
                 parameterized arithmetic operators for manipulating
                 high-dynamic numbers on FPGAs. One of them uses a
                 floating-point representation, the other one uses a
                 logarithmic representation. Along with their direct
                 interest, those two libraries allow
                 application-specific comparisons of those two number
                 representation systems. They are unbiased in the sense
                 that they tend to reflect the state-of-the-art for both
                 number arithmetic systems, and are freely available at
                 \path=http://www.ens-lyon.fr/LIP/Arenaire/=.",
  acknowledgement = ack-nhfb,
  keywords =     "Arithmetic; Floating-Point; FPGA; Hardware Operators;
                 LNS; Logarithmic Number system; VHDL",
}


bibtype: inproceedings
filename: fparith.bib
label: Doss:2004:FBI
author: C. C. Doss and R. L. Riley, Jr.
title: FPGA-based implementation of a robust IEEE-754 exponential unit
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 229--238
year: 2004
bibdate: Sat Jul 16 17:14:11 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 17:14:11 MDT
acknowledgement: ack-nhfb
rawauthor: C. C. Doss and R. L. {Riley, Jr.}
rawtitle: {FPGA}-based implementation of a robust {IEEE-754} exponential unit
booktitle:
FCCM 2004. 12th Annual IEEE Symposium on Field-Programmable Custom Computing Machines, 20--23 April 2004

rawbooktitle:
{FCCM 2004}. 12th Annual {IEEE} Symposium on Field-Programmable Custom Computing Machines, 20--23 April 2004

entry:
@InProceedings{Doss:2004:FBI,
  author =       "C. C. Doss and R. L. {Riley, Jr.}",
  booktitle =    "{FCCM 2004}. 12th Annual {IEEE} Symposium on
                 Field-Programmable Custom Computing Machines, 20--23
                 April 2004",
  title =        "{FPGA}-based implementation of a robust {IEEE-754}
                 exponential unit",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "229--238",
  year =         "2004",
  CODEN =        "????",
  ISSN =         "????",
  bibdate =      "Sat Jul 16 17:14:11 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  summary =      "This work explores the feasibility of implementing a
                 floating-point exponentiation unit on reconfigurable
                 computing systems. A table-driven exponentiation unit
                 was implemented using synthesizable VHDL. The project
                 included creating pipelined \ldots{}",
}


bibtype: article
filename: fparith.bib
label: Efstathiou:2004:MBM
author: C. Efstathiou and H. T. Vergos and D. Nikolos
title: Modified Booth modulo $ 2^n - 1 $ multipliers
journal: j-IEEE-TRANS-COMPUT
volume: 53
number: 3
pages: 370--374
month: mar
monthnumber: 3
year: 2004
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2004.1261842
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Tue Jul 5 08:12:33 MDT 2011
bibtimestamp: 2011.07.05 08:12:33 MDT
URL: http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1261842
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: C. Efstathiou and H. T. Vergos and D. Nikolos
rawtitle: Modified {Booth} modulo $ 2^n - 1 $ multipliers
entry:
@Article{Efstathiou:2004:MBM,
  author =       "C. Efstathiou and H. T. Vergos and D. Nikolos",
  title =        "Modified {Booth} modulo $ 2^n - 1 $ multipliers",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "53",
  number =       "3",
  pages =        "370--374",
  month =        mar,
  year =         "2004",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2004.1261842",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Tue Jul 5 08:12:33 MDT 2011",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2000.bib",
  URL =          "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=1261842",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
}


bibtype: inproceedings
filename: fparith.bib
label: Egner:2004:CTN
author: Sebastian Egner and Richard A. Kelsey and Michael Sperber
booktitle: Fifth Workshop on Scheme and Functional Programming. September 22, 2004, Snowbird, Utah, USA
title: Cleaning up the Tower: Numbers in Scheme
pages: 13
day: 22
month: sep
monthnumber: 9
year: 2004
bibdate: Mon Apr 25 06:55:59 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.04.25 06:55:59 ???
URL: http://www-pu.informatik.uni-tuebingen.de/users/sperber/papers/numerical-tower.pdf
acknowledgement: ack-nhfb
rawauthor: Sebastian Egner and Richard A. Kelsey and Michael Sperber
rawbooktitle: Fifth Workshop on Scheme and Functional Programming. {September 22, 2004, Snowbird, Utah, USA}
rawtitle: Cleaning up the Tower: Numbers in {Scheme}
entry:
@InProceedings{Egner:2004:CTN,
  author =       "Sebastian Egner and Richard A. Kelsey and Michael
                 Sperber",
  editor =       "????",
  booktitle =    "Fifth Workshop on Scheme and Functional Programming.
                 {September 22, 2004, Snowbird, Utah, USA}",
  title =        "Cleaning up the Tower: Numbers in {Scheme}",
  publisher =    "????",
  address =      "????",
  pages =        "13",
  day =          "22",
  month =        sep,
  year =         "2004",
  ISBN =         "????",
  ISBN-13 =      "????",
  LCCN =         "????",
  bibdate =      "Mon Apr 25 06:55:59 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www-pu.informatik.uni-tuebingen.de/users/sperber/papers/numerical-tower.pdf",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: ElHajji:2004:SIL
author: Said El Hajji and Nathalie Revol and Paul Van Dooren
journal: j-J-COMPUT-APPL-MATH
volume: 162
number: 1
pages: ix--x
day: 1
month: jan
monthnumber: 1
year: 2004
CODEN: JCAMDI
ISSN: 0377-0427 (print), 1879-1778 (electronic) OR 03770427 (print), 18791778 (electronic)
ISSNL: 0377-0427 OR 03770427
bibdate: Sat Feb 25 12:59:56 MST 2017
bibtimestamp: 2017.02.25 12:59:56 MST
URL: http://www.sciencedirect.com/science/article/pii/S0377042703007428
fjournal: Journal of Computational and Applied Mathematics
acknowledgement: ack-nhfb
journalURL: http://www.sciencedirect.com/science/journal/03770427
rawauthor: Said {El Hajji} and Nathalie Revol and Paul {Van Dooren}
title:
Special Issue on Linear Algebra and Arithmetic, Proceedings of the ALA'01 Conference held in Rabat, Morocco on May 28--31, 2001

rawtitle:
Special Issue on {Linear Algebra and Arithmetic, Proceedings of the ALA'01 Conference held in Rabat, Morocco on May 28--31, 2001}

entry:
@Article{ElHajji:2004:SIL,
  author =       "Said {El Hajji} and Nathalie Revol and Paul {Van
                 Dooren}",
  title =        "Special Issue on {Linear Algebra and Arithmetic,
                 Proceedings of the ALA'01 Conference held in Rabat,
                 Morocco on May 28--31, 2001}",
  journal =      j-J-COMPUT-APPL-MATH,
  volume =       "162",
  number =       "1",
  pages =        "ix--x",
  day =          "1",
  month =        jan,
  year =         "2004",
  CODEN =        "JCAMDI",
  ISSN =         "0377-0427 (print), 1879-1778 (electronic)",
  ISSN-L =       "0377-0427",
  bibdate =      "Sat Feb 25 12:59:56 MST 2017",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/jcomputapplmath2000.bib",
  URL =          "http://www.sciencedirect.com/science/article/pii/S0377042703007428",
  acknowledgement = ack-nhfb,
  fjournal =     "Journal of Computational and Applied Mathematics",
  journal-URL =  "http://www.sciencedirect.com/science/journal/03770427",
}


bibtype: techreport
filename: fparith.bib
label: Ercegovac:2004:CSRa
author: Milos Ercegovac and Jean-Michel Muller
title: Complex Square Root with Operand Prescaling
type: Research Report
number: RR2004-42
institution: Ecole Normale Superieure de Lyon
address: 69364 Lyon Cedex 07, France
pages: 2 + 12
month: sep
monthnumber: 9
year: 2004
bibdate: Mon Dec 06 11:07:40 2004
bibsource: http://www.ens-lyon.fr/LIP/Pub/rr2004.php; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2004.12.06 11:07:40 ???
URL: http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-42.pdf
acknowledgement: ack-nhfb
rawauthor: Milo{\v{s}} Ercegovac and Jean-Michel Muller
rawtitle: Complex Square Root with Operand Prescaling
abstract:
We propose a radix-$r$ digit-recurrence algorithm for complex square-root. The operand is prescaled to allow the selection of square-root digits by rounding of the residual. This leads to a simple hardware implementation. Moreover, the use of digit recurrence approach allows correct rounding of the result. The algorithm, compatible with the complex division, and its design are described at a high-level. We also give rough comparisons of its latency and cost with respect to implementation based on standard floating-point instructions as used in software routines for complex square root.

keywords:
complex square-root; Computer arithmetic; correct rounding; digit-recurrence algorithm; floating-point arithmetic; operand prescaling.

rawabstract:
We propose a radix-$r$ digit-recurrence algorithm for complex square-root. The operand is prescaled to allow the selection of square-root digits by rounding of the residual. This leads to a simple hardware implementation. Moreover, the use of digit recurrence approach allows correct rounding of the result. The algorithm, compatible with the complex division, and its design are described at a high-level. We also give rough comparisons of its latency and cost with respect to implementation based on standard floating-point instructions as used in software routines for complex square root.

entry:
@TechReport{Ercegovac:2004:CSRa,
  author =       "Milo{\v{s}} Ercegovac and Jean-Michel Muller",
  title =        "Complex Square Root with Operand Prescaling",
  type =         "Research Report",
  number =       "RR2004-42",
  institution =  "{\'E}cole Normale Sup{\'e}rieure de Lyon",
  address =      "69364 Lyon Cedex 07, France",
  pages =        "2 + 12",
  month =        sep,
  year =         "2004",
  bibdate =      "Mon Dec 06 11:07:40 2004",
  bibsource =    "http://www.ens-lyon.fr/LIP/Pub/rr2004.php;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.ens-lyon.fr/LIP/Pub/Rapports/RR/RR2004/RR2004-42.pdf",
  abstract =     "We propose a radix-$r$ digit-recurrence algorithm for
                 complex square-root. The operand is prescaled to allow
                 the selection of square-root digits by rounding of the
                 residual. This leads to a simple hardware
                 implementation. Moreover, the use of digit recurrence
                 approach allows correct rounding of the result. The
                 algorithm, compatible with the complex division, and
                 its design are described at a high-level. We also give
                 rough comparisons of its latency and cost with respect
                 to implementation based on standard floating-point
                 instructions as used in software routines for complex
                 square root.",
  acknowledgement = ack-nhfb,
  keywords =     "complex square-root; Computer arithmetic; correct
                 rounding; digit-recurrence algorithm; floating-point
                 arithmetic; operand prescaling.",
}


bibtype: inproceedings
filename: fparith.bib
label: Ercegovac:2004:CSRb
author: Milos Ercegovac and Jean-Michel Muller
title: Complex square root with operand prescaling
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 52--62
year: 2004
DOI: https://doi.org/10.1109/ASAP.2004.1342458
ISBN: 0-7695-2226-2 OR 0769522262
ISBN13: 978-0-7695-2226-5 OR 9780769522265
ISSN: 1063-6862 OR 10636862
bibdate: Sat Jul 16 15:28:13 MDT 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.07.16 15:28:13 MDT
acknowledgement: ack-nhfb
rawauthor: Milo{\v{s}} Ercegovac and Jean-Michel Muller
rawtitle: Complex square root with operand prescaling
booktitle:
Proceedings of the 15th IEEE International Conference on Application-Specific Systems, Architectures and Processors, 2004

rawbooktitle:
{Proceedings of the 15th IEEE International Conference on Application-Specific Systems, Architectures and Processors, 2004}

entry:
@InProceedings{Ercegovac:2004:CSRb,
  author =       "Milo{\v{s}} Ercegovac and Jean-Michel Muller",
  booktitle =    "{Proceedings of the 15th IEEE International Conference
                 on Application-Specific Systems, Architectures and
                 Processors, 2004}",
  title =        "Complex square root with operand prescaling",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "52--62",
  year =         "2004",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1109/ASAP.2004.1342458",
  ISBN =         "0-7695-2226-2",
  ISBN-13 =      "978-0-7695-2226-5",
  ISSN =         "1063-6862",
  bibdate =      "Sat Jul 16 15:28:13 MDT 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  summary =      "We propose a radix-r digit-recurrence algorithm for
                 complex square-root. The operand is prescaled to allow
                 the selection of square-root digits by rounding of the
                 residual. This leads to a simple hardware
                 implementation. Moreover, the use of digit \ldots{}",
}


bibtype: book
filename: fparith.bib
label: Ercegovac:2004:DA
author: Milos Dragutin Ercegovac and Tomas Lang
title: Digital Arithmetic
publisher: pub-MORGAN-KAUFMANN
address: pub-MORGAN-KAUFMANN:adr
pages: xxv + 709
year: 2004
ISBN: 1-55860-798-6 OR 1558607986
ISBN13: 978-1-55860-798-9 OR 9781558607989
LCCN: QA76.9.C62 E72 2004
bibdate: Thu Jun 20 10:19:42 2002
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; z3950.loc.gov:7090/Voyager
bibtimestamp: 2002.06.20 10:19:42 ???
subject: Computer arithmetic
acknowledgement: ack-nhfb
rawauthor: Milo{\v{s}} Dragutin Ercegovac and Tom{\'a}s Lang
rawtitle: Digital Arithmetic
URL:
ftp://uiarchive.cso.uiuc.edu/pub/etext/gutenberg/; http://www.loc.gov/catdir/description/els031/2002114337.html; http://www.loc.gov/catdir/toc/els031/2002114337.html

TOC:
Counter Preface 1. Review of Basic Number Representations and Arithmetic Algorithms 2. Two-Operand Addition 3. Multi-Operand Addition 4. Multiplication 5. Division by Digit Recurrence 6. Square Root by Digit Recurrence 7. Reciprocal, Division, Reciprocal Square Root and Square Root by Iterative Approximation 8. Floating-Point Representation, Algorithms, and Implementations 9. Digit-Serial Arithmetic 10. Function Evaluation 11. CORDIC Algorithm and Implementations

rawTOC:
Counter Preface \\ 1. Review of Basic Number Representations and Arithmetic Algorithms \\ 2. Two-Operand Addition \\ 3. Multi-Operand Addition \\ 4. Multiplication \\ 5. Division by Digit Recurrence \\ 6. Square Root by Digit Recurrence \\ 7. Reciprocal, Division, Reciprocal Square Root and Square Root by Iterative Approximation \\ 8. Floating-Point Representation, Algorithms, and Implementations \\ 9. Digit-Serial Arithmetic \\ 10. Function Evaluation \\ 11. CORDIC Algorithm and Implementations

entry:
@Book{Ercegovac:2004:DA,
  author =       "Milo{\v{s}} Dragutin Ercegovac and Tom{\'a}s Lang",
  title =        "Digital Arithmetic",
  publisher =    pub-MORGAN-KAUFMANN,
  address =      pub-MORGAN-KAUFMANN:adr,
  pages =        "xxv + 709",
  year =         "2004",
  ISBN =         "1-55860-798-6",
  ISBN-13 =      "978-1-55860-798-9",
  LCCN =         "QA76.9.C62 E72 2004",
  bibdate =      "Thu Jun 20 10:19:42 2002",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 z3950.loc.gov:7090/Voyager",
  price =        "US\$89.95, UK\pounds 59.95",
  URL =          "ftp://uiarchive.cso.uiuc.edu/pub/etext/gutenberg/;
                 http://www.loc.gov/catdir/description/els031/2002114337.html;
                 http://www.loc.gov/catdir/toc/els031/2002114337.html",
  acknowledgement = ack-nhfb,
  subject =      "Computer arithmetic",
  tableofcontents = "Counter Preface \\
                 1. Review of Basic Number Representations and
                 Arithmetic Algorithms \\
                 2. Two-Operand Addition \\
                 3. Multi-Operand Addition \\
                 4. Multiplication \\
                 5. Division by Digit Recurrence \\
                 6. Square Root by Digit Recurrence \\
                 7. Reciprocal, Division, Reciprocal Square Root and
                 Square Root by Iterative Approximation \\
                 8. Floating-Point Representation, Algorithms, and
                 Implementations \\
                 9. Digit-Serial Arithmetic \\
                 10. Function Evaluation \\
                 11. CORDIC Algorithm and Implementations",
}


