Entry Venugopal:1995:SET from complngs.bib

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BibTeX entry

@Article{Venugopal:1995:SET,
  author =       "R. Venugopal and Y. N. Srikant",
  title =        "Scheduling expression trees with reusable registers on
                 delayed-load architectures",
  journal =      j-COMP-LANGS,
  volume =       "21",
  number =       "1",
  pages =        "49--65",
  month =        apr,
  year =         "1995",
  CODEN =        "COLADA",
  ISSN =         "0096-0551 (print), 1873-6742 (electronic)",
  ISSN-L =       "0096-0551",
  bibdate =      "Tue Mar 25 14:04:06 MST 1997",
  bibsource =    "Compendex database;
                 http://www.math.utah.edu/pub/tex/bib/complngs.bib",
  acknowledgement = ack-nhfb,
  affiliation =  "Indian Inst of Science",
  affiliationaddress = "Bangalore, India",
  classcodes =   "C6150N (Distributed systems software); C6120 (File
                 organisation); C6150C (Compilers, interpreters and
                 other processors); C4240C (Computational complexity);
                 C6150G (Diagnostic, testing, debugging and evaluating
                 systems); C5220 (Computer architecture)",
  classification = "721.1; 723; 723.2",
  corpsource =   "Dept. of Comput. Sci. and Autom., Indian Inst. of
                 Sci., Bangalore, India",
  journal-URL =  "http://www.sciencedirect.com/science/journal/00960551",
  journalabr =   "Comput Lang",
  keywords =     "algorithm; Algorithms; approximate; architectures;
                 code schedule; Codes (symbols); compiler; computational
                 complexity; Computational complexity; computing; data
                 flow analysis; Data structures; data-flow analyzer;
                 Delayed load architectures; delayed-load; expression
                 tree scheduling; Expression trees; Instruction
                 scheduling; interlock; linear complexity; minimized
                 spilling; optimal schedule; processor; program
                 compilers; Program compilers; reduced instruction set;
                 Reduced instruction set computing; reusable registers;
                 Reusable registers; scheduling; tree data structures",
  treatment =    "T Theoretical or Mathematical",
}

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