Last update:
Mon Dec 11 13:24:37 MST 2023
M. A. Mayer and
B. M. Gordon and
R. N. Nicola An operational digital feedback divider 17--20
E. Weiss Applications of CRC-105 Decimal DDA . . 19--24
M. K. Haynes Multidimensional magnetic memory
selection systems . . . . . . . . . . . 25--29
C. D. Morrill and
R. V. Baum A Stabilized Electronic Multiplier . . . 52--59
Robert D. Elbourn and
Richard P. Witt Dynamic circuit techniques used in SEAC
and DYSEAC . . . . . . . . . . . . . . . 2--9
Louis G. Walters Hidden regenerative loops in electronic
analog computers . . . . . . . . . . . . 1--4
J. R. Anderson Electrical Delay Lines for Digital
Computer Applications . . . . . . . . . 5--13
William H. Libaw and
Leonard J. Craig A Photoelectric Decimal-Coded Shaft
Digitizer . . . . . . . . . . . . . . . 1--4
A. D. Scarbrough An Analog-to-Digital Converter . . . . . 5--7
Thomas D. Hinkelman and
Max H. Kraus The UNIVAC Tube Program . . . . . . . . 8--12
Anonymous Contributors . . . . . . . . . . . . . . 12--12
Anonymous Review Section . . . . . . . . . . . . . 13--27
Anonymous Editorial . . . . . . . . . . . . . . . 1--1
Anonymous Notice to Prospective Speakers . . . . . 1--1
Nathaniel Rochester and
Willis H. Ware Computer Definitions . . . . . . . . . . 2--2
Carl E. Howe and
Robert M. Howe Solution of Linear Differential
Equations with Variable Coefficients by
the Electronic Differential Analyzer . . 3--8
Rudolph J. Klein Automatic Beam Current Stabilization for
Williams Tube Memories . . . . . . . . . 8--11
Lee Cahn Accuracy of an Analog Computer . . . . . 12--18
Louis D. Wilson and
Saul Meyer The Model II Unityper . . . . . . . . . 19--27
Anonymous Contributors . . . . . . . . . . . . . . 27--28
Anonymous Review Section . . . . . . . . . . . . . 29--47
A. L. Leiner and
S. N. Alexander System organization of the DYSEAC . . . 1--10
H. Freeman and
E. Parsons Time-Sharing Analog Multiplier (TSAM) 11--17
M. E. Maron Logic, discovery, and the foundations of
computing machinery . . . . . . . . . . 2--7
A. L. Leiner and
W. A. Notz and
J. L. Smith and
A. Weinberger System design of the SEAC and DYSEAC . . 8--23
L. D. Kovach and
W. Comley An Analog Multiplier Using Thyrite . . . 42--45
D. E. Muller Application of Boolean algebra to
switching circuit design and to error
detection . . . . . . . . . . . . . . . 6--12
E. C. Nelson An algebraic theory for use in digital
computer design . . . . . . . . . . . . 12--21
Bernard Widrow A Radio-Frequency Nondestructive Readout
for Magnetic-Core Memories . . . . . . . 12--15
W. J. Cunningham Time-Delay Networks for an Analog
Computer . . . . . . . . . . . . . . . . 16--18
John C. Alrich Engineering Description of the
ElectroData Digital Computer . . . . . . 1--10
C. L. Wanlass Transistor Circuitry for Digital
Computers . . . . . . . . . . . . . . . 11--16
Joseph M. Wier A High-Speed Permanent Storage Device 16--20
Anonymous Correction . . . . . . . . . . . . . . . 20--20
W. A. Malthaner and
H. E. Vaughan Control Features of a Magnetic-Drum
Telephone Office . . . . . . . . . . . . 21--26
William Karush Stability of a Method of Smoothing in a
Digital Control Computer . . . . . . . . 26--31
Anonymous PGEC News . . . . . . . . . . . . . . . 32--32
Anonymous Contributors . . . . . . . . . . . . . . 32--33
David R. Brown Review of Electronic Computer Progress
During 1954 . . . . . . . . . . . . . . 33--38
Anonymous Reviews of Current Literature . . . . . 39--47
H. H. Goode PGEC Student Activities and Education in
Computers . . . . . . . . . . . . . . . 49--51
L. B. Wadel and
A. W. Wortham A Survey of Electronic Analog Computer
Installations . . . . . . . . . . . . . 52--55
W. H. Dunn and
C. Eldert and
P. V. Levonian A Digital Computer for Use in an
Operational Flight Trainer . . . . . . . 55--63
H. J. Gray and
M. Rubinoff and
J. Tompkins A Diode Multiplexer for Analog Voltages 64--66
R. M. Brown Some Notes on Logical Binary Counters 67--69
D. B. Murray A Variable Binary Scaler . . . . . . . . 70--74
W. E. Thomson Time-Delay Circuits . . . . . . . . . . 74--74
Anonymous Contributors . . . . . . . . . . . . . . 75--75
Anonymous PGEC News . . . . . . . . . . . . . . . 76--76
Anonymous Reviews of Current Literature . . . . . 77--85
Anonymous Where Should I Send My Manuscript? . . . 87--87
Anonymous Constitution for IRE Professional Group
on Electronic Computers . . . . . . . . 88--92
A. S. Hoagland A Logical Reading System for
Nonreturn-to-Zero Magnetic Recording . . 93--95
A. S. Robinson An Electronic Analog Computing Technique
for the Solution of Trigonometric
Problems . . . . . . . . . . . . . . . . 95--101
F. S. Preston An Analog Computer for the Solution of
Tangents . . . . . . . . . . . . . . . . 101--106
T. Teichmann Closed-Loop Control Systems Containing a
Digital Computer . . . . . . . . . . . . 106--117
H. Hellerman On the Input Impedance Network Error in
Operational Amplifiers . . . . . . . . . 118--118
J. E. Robertson Two's Complement Multiplication in
Binary Parallel Digital Computers . . . 118--119
Anonymous PGEC News . . . . . . . . . . . . . . . 119--119
Anonymous Contributors . . . . . . . . . . . . . . 119--120
Anonymous Reviews of Current Literature . . . . . 121--131
Bruce Gilchrist and
J. H. Pomerene and
S. Y. Wong Fast Carry Logic for Digital Computers 133--136
Alfred Milch Bit Storage via Electro-optical Feedback 136--144
R. S. Mackay and
R. MacIntyre Ternary Counters . . . . . . . . . . . . 144--149
E. M. Glaser and
H. Blasbalg A Logarithmic Voltage Quantizer . . . . 150--155
S. Y. Wong High Density Williams Storage . . . . . 156--158
Bernard Lippel A Decimal Code for Analog-to-Digital
Conversion . . . . . . . . . . . . . . . 158--159
Anonymous Contributors . . . . . . . . . . . . . . 159--160
Anonymous PGEC News . . . . . . . . . . . . . . . 160--160
Anonymous Reviews of Current Literature . . . . . 161--173
D. W. Hagelbarger SEER, A SEquence Extrapolating Robot . . 1--7
J. J. Wedel and
A. Huntington and
M. B. Bain Automatic Data-Accumulation System for
Wind Tunnels . . . . . . . . . . . . . . 7--11
J. E. Robertson Odd Binary Asynchronous Counters . . . . 12--15
David E. Muller Complexity in Electronic Switching
Circuits . . . . . . . . . . . . . . . . 15--19
N. M. Blachman On the Wiring of Two-Dimensional
Multiple-Coincidence Magnetic Memories 19--21
J. N. Harris A Programmed Variable-Rate Counter for
Generating the Sine Function . . . . . . 21--26
M. Lejet Lilamand A Time-Division Multiplier . . . . . . . 26--34
Anonymous Contributors . . . . . . . . . . . . . . 35--35
N. M. Blachman A Report on the International Analogy
Computation Meeting . . . . . . . . . . 36--41
Anonymous PGEC News . . . . . . . . . . . . . . . 42--42
John P. Nash Review of Electronic Computer Progress
During 1955 . . . . . . . . . . . . . . 43--47
Anonymous Reviews of Current Literature . . . . . 47--59
Anonymous Contents . . . . . . . . . . . . . . . . 61--62
Anonymous PGEC Papers Awards for 1955 . . . . . . 63--64
A. Weinberger and
J. L. Smith A One-Microsecond Adder Using
One-Megacycle Circuitry . . . . . . . . 65--73
W. J. Bartik and
T. H. Bonn A Small Coincident-Current Magnetic
Memory . . . . . . . . . . . . . . . . . 73--78
Ivan Flores Reflected Number Systems . . . . . . . . 79--82
R. L. Sydnor and
T. R. O'Meara and
J. Strathman Analog Multipliers and Squarers Using a
Multigrid Modulator . . . . . . . . . . 82--85
Branch P. Kerfoot Transistors in Current-Analog Computing 86--93
Alexander Fuchs Working Time in Repetitive Analog
Computers . . . . . . . . . . . . . . . 94--94
Anonymous Contributors . . . . . . . . . . . . . . 94--95
Anonymous PGEC News . . . . . . . . . . . . . . . 95--96
Anonymous Reviews of Current Literature . . . . . 97--109
Donald T. Greenwood The Representation of Constraints by
Means of an Electronic Differential
Analyzer . . . . . . . . . . . . . . . . 111--113
V. L. Newhouse and
N. S. Prywes High-Speed Shift Registers Using One
Core Per Bit . . . . . . . . . . . . . . 114--120
Z. Bay and
N. T. Grisamore High-Speed Flip-Flops for the
Millimicrosecond Region . . . . . . . . 121--125
R. H. Urbano and
R. K. Mueller A Topological Method for the
Determination of the Minimal Forms of a
Boolean Function . . . . . . . . . . . . 126--132
G. W. Booth and
T. P. Bothwell Logic Circuits for a Transistor Digital
Computer . . . . . . . . . . . . . . . . 132--138
Howard E. Tompkins Unit-Distance Binary-Decimal Codes for
Two-Track Commutation . . . . . . . . . 139--139
G. Estrin and
B. Gilchrist and
J. H. Pomerene A Note on High-Speed Digital
Multiplication . . . . . . . . . . . . . 140--140
Martin Graham An Improved Method for Williams Storage 140--140
John R. Clark Fourier Analysis by Machine Methods . . 141--141
Anonymous Symposium on the Impact of Computers on
Science and Society . . . . . . . . . . 142--158
Nelson M. Blachman Some Automatic Digital Computers in
Western Europe . . . . . . . . . . . . . 158--166
Anonymous Correction . . . . . . . . . . . . . . . 167--167
Anonymous Contributors . . . . . . . . . . . . . . 168--168
Anonymous PGEC News . . . . . . . . . . . . . . . 169--169
Anonymous Reviews of Current Literature . . . . . 171--181
Anonymous Index to IRE Transactions on Electronic
Computers . . . . . . . . . . . . . . . 1--4
Nelson M. Blachman Change of Editorship . . . . . . . . . . 183--183
John R. Anderson A New Type of Ferroelectric Shift
Register . . . . . . . . . . . . . . . . 184--191
G. J. Prom and
R. L. Crosby Junction Transistor Switching Circuits
for High-Speed Digital Computer
Applications . . . . . . . . . . . . . . 192--196
Nick D. Diamantides A Multipurpose Electronic Switch for
Analog Computer Simulation and
Autocorrelation Applications . . . . . . 197--202
Robert M. Howe Representation of Nonlinear Functions by
Means of Operational Amplifiers . . . . 203--206
Velio A. Marsocci An Error Analysis of Electronic Analog
Computers . . . . . . . . . . . . . . . 207--212
Z. Bay and
N. T. Grisamore Pulse Generator and High-Speed Memory
Circuit . . . . . . . . . . . . . . . . 213--218
Richard E. Merwin The IBM 705 EDPM Memory System . . . . . 219--224
Harold F. Heath Reliability of an Air Defense Computing
System: Component Development . . . . . 224--226
Raymond E. Nienburg Reliability of an Air Defense Computing
System: Circuit Design . . . . . . . . . 227--233
M. M. Astrahan and
L. R. Walters Reliability of an Air Defense Computing
System: Marginal Checking and
Maintenance Programming . . . . . . . . 233--237
Mitchell P. Marcus The Detection and Identification of
Symmetric Switching Functions with the
Use of Tables of Combinations . . . . . 237--239
Anonymous Symposium: The Design of Machines to
Simulate the Behavior of the Human Brain 240--255
Anonymous Contributors . . . . . . . . . . . . . . 256--257
Anonymous PGEC News . . . . . . . . . . . . . . . 257--257
Anonymous Reviews of Current Literature . . . . . 259--273
Marcel J. E. Golay The Logic of Bidirectional Binary
Counters . . . . . . . . . . . . . . . . 1--4
Stanley P. Frankel The Logical Design of a Simple General
Purpose Computer . . . . . . . . . . . . 5--14
E. Leroy Younker A Transistor-Driven Magnetic-Core Memory 14--20
J. A. Rajchman and
H. D. Crane Current Steering in Magnetic Circuits 21--30
Erich S. Weibel An Electronic Analog Multiplier Using
Carriers . . . . . . . . . . . . . . . . 30--34
Rajko Tomovich Picard's Method and Analog Computation 34--34
George H. Myers Extending the Operational Time of Analog
Integrators . . . . . . . . . . . . . . 34--35
Robert A. Bruns An Integral-Error-Squared Method for
Evaluating Analog Computer Components 35--36
Alexander Fuchs A Note on the Accuracy of Differential
Analyzers . . . . . . . . . . . . . . . 36--36
Anonymous Ways of Developing Soviet Computer
Production . . . . . . . . . . . . . . . 37--49
W. L. Martin and
S. R. Olson PGEC Membership Survey . . . . . . . . . 49--55
Anonymous Review of Electronic Computer Progress
During 1956 . . . . . . . . . . . . . . 55--60
Anonymous Contributors . . . . . . . . . . . . . . 60--61
Anonymous PGEC News . . . . . . . . . . . . . . . 61--62
Anonymous Reviews of Current Literature . . . . . 63--69
W. R. G. Baker The IRE ``Affiliate'' Plan --- A New
Venture in Engineering Society Structure
and Service . . . . . . . . . . . . . . 71--71
Gene W. Arant A Time-Sequential Tabular Analysis of
Flip-Flop Logical Operation . . . . . . 72--74
Amos Nathan Dynamic Accuracy as a Design Criterion
of Linear Electronic-Analog Differential
Analyzers . . . . . . . . . . . . . . . 74--86
R. M. Howe and
E. G. Gilbert Trigonometric Resolution in Analog
Computers by Means of Multiplier
Elements . . . . . . . . . . . . . . . . 86--92
Mitchell P. Marcus Minimization of the Partially-Developed
Transfer Tree . . . . . . . . . . . . . 92--95
T. Miura and
H. Amemiya and
T. Numakura A New Diode Function Generator . . . . . 95--100
David C. Kalbfell An Electronic Analog Multiplier . . . . 100--103
Bernard Harris An Algorithm for Determining Minimal
Representations of a Logic Function . . 103--108
C. J. Hirsch and
F. C. Hallden Computing Techniques for the Sampling
Parametric Computer . . . . . . . . . . 108--119
Arieh F. Fischmann A Gray Code Counter . . . . . . . . . . 120--120
Charles H. Davidson A Survey of the Characteristics of
Currently Used Bistable Multivibrators 121--121
B. Lippel and
I. J. Epstein A Method for Obtaining Complete Digital
Coding Chains . . . . . . . . . . . . . 121--121
Joseph A. O'Brien Unit-Distance Binary-Decimal Code
Translators . . . . . . . . . . . . . . 122--123
Louis B. Wadel Negative Base Number Systems . . . . . . 123--123
Gene H. Leichner A Fast Circulating Memory . . . . . . . 123--124
Anonymous Contributors . . . . . . . . . . . . . . 124--125
Anonymous PGEC News . . . . . . . . . . . . . . . 126--127
Anonymous Reviews of Current Literature . . . . . 129--141
M. R. Bates and
D. H. Bock and
F. D. Powell Analog Computer Applications in
Predictor Design . . . . . . . . . . . . 143--153
F. E. Hohn and
S. Seshu and
D. D. Aufenkamp The Theory of Nets . . . . . . . . . . . 154--161
George Sebestyen A Design Technique for Pedestal-Free
Switching Circuits . . . . . . . . . . . 162--166
Lazarus G. Polimerou A New Method for Generating a Function
of Two Independent Variables . . . . . . 167--169
Thomas B. Van Horne An Analog Method for the Solution of
Probability of Hit and Related
Statistical Problems . . . . . . . . . . 170--175
F. P. Brooks and
A. L. Hopkins and
P. G. Neumann and
W. V. Wright An Experiment in Musical Composition . . 175--182
J. H. Sasseen An Electronic Analog Cross Correlator
for Dip Logs . . . . . . . . . . . . . . 182--187
R. S. Stone and
R. A. Dandl A Variable Function Delay for Analog
Computers . . . . . . . . . . . . . . . 187--189
Warren S. McCulloch Biological Computers . . . . . . . . . . 190--192
H. Quastler The Complexity of Biological Computers 192--194
George A. Miller A Note on the Remarkable Memory of Man 194--195
Lawrence J. Fogel The Human Computer in Flight Control . . 195--202
Anonymous Correction . . . . . . . . . . . . . . . 202--202
H. Hamer and
A. Lupinski A Method for Evaluating Amplifier Phase
Shift at Low Frequencies . . . . . . . . 203--203
M. Lehman High-Speed Digital Multiplication . . . 204--205
Anonymous Contributors . . . . . . . . . . . . . . 205--207
Anonymous PGEC News . . . . . . . . . . . . . . . 208--208
Anonymous Reviews of Current Literature . . . . . 209--229
Anonymous Index to IRE Transactions on Electronic
Computers . . . . . . . . . . . . . . . 1--4
Joseph O. Campeau The Synthesis and Analysis of Digital
Systems by Boolean Matrices . . . . . . 231--241
R. J. Domenico Simulation of Transistor Switching
Circuits on the IBM 704 . . . . . . . . 242--247
C. K. Chow An Optimum Character Recognition System
Using Decision Functions . . . . . . . . 247--254
Paul C. Dow An Analysis of Certain Errors in
Electronic Differential Analyzers. I.
Bandwidth Limitations . . . . . . . . . 255--260
R. E. Horn and
V. G. Fauque Synthesis of Vector Networks . . . . . . 261--265
D. W. Davies Switching Functions of Three Variables 265--275
D. D. Aufenkamp and
F. E. Hohn Analysis of Sequential Machines . . . . 276--285
Robert M. Mason The Logical Combination of Punched Paper
Tapes . . . . . . . . . . . . . . . . . 285--286
Amos Nathan and
Yona Mahler Demonstration of Conditional Stability
on an Analog Computer . . . . . . . . . 287--287
Norman R. Scott On the Use of Redundant Integrators in
Analog Computers . . . . . . . . . . . . 287--288
Anonymous Contributors . . . . . . . . . . . . . . 288--288
Anonymous PGEC News . . . . . . . . . . . . . . . 289--289
Anonymous Reviews of Current Literature . . . . . 291--307
Anonymous Reviews and Bibliographies . . . . . . . 1--1
J. R. Harris Direct-Coupled Transistor Logic
Circuitry . . . . . . . . . . . . . . . 2--6
James W. Easley Transistor Characteristics for
Direct-Coupled Transistor Logic Circuits 6--16
Paul C. Dow An Analysis of Certain Errors in
Electronic Differential Analyzers II ---
Capacitor Dielectric Absorption . . . . 17--22
J. M. Maughmer and
H. D. Huskey A Study of Refill Phenomena in Williams'
Tube Memories . . . . . . . . . . . . . 23--31
Amos Nathan Computing and Error Matrices in Linear
Differential Analyzers . . . . . . . . . 32--33
C. F. Pulvari and
G. E. McDuffie Scanners for Ferroelectric Memory
Capacitors . . . . . . . . . . . . . . . 34--40
Hermann Schmid A Transistorized Four-Quadrant
Time-Division Multiplier with an
Accuracy of 0.1 Per Cent . . . . . . . . 41--47
Rajko Tomovich New Applications of an Electronic
Function Generator . . . . . . . . . . . 48--51
R. D. Berlin Synthesis of $N$-Valued Switching
Circuits . . . . . . . . . . . . . . . . 52--56
George Epstein Synthesis of Electronic Circuits for
Symmetric Functions . . . . . . . . . . 57--60
Anonymous Correction . . . . . . . . . . . . . . . 60--60
J. J. Gano and
G. F. Sandy Thermistors for the Gradual Application
of Heater Voltage to Thermionic Tubes 61--64
R. P. Castanias and
J. E. Sherman Review of Computer Progress in 1957 . . 65--72
Anonymous Contributors . . . . . . . . . . . . . . 73--74
Anonymous PGEC News . . . . . . . . . . . . . . . 75--76
Anonymous Reviews of Current Literature . . . . . 77--89
L. D. Kovach and
W. Comley Nonlinear Transfer Functions with
Thyrite . . . . . . . . . . . . . . . . 91--97
P. Venkata Rao A Novel Type of Isograph (Algebraic
Equation Solver) . . . . . . . . . . . . 97--103
John V. Blankenbaker Logically Micro-Programmed Computers . . 103--109
M. W. Marcovitz and
E. Seif Analytical Design of Resistor-Coupled
Transistor Logical Circuits . . . . . . 109--119
R. G. Gillespie and
D. D. Aufenkamp On the Analysis of Sequential Machines 119--122
Anonymous Correction . . . . . . . . . . . . . . . 122--122
Edward L. Braun Digital Computers in Continuous Control
Systems . . . . . . . . . . . . . . . . 123--128
William F. Gunning Computers in Process Industry Control 129--133
Walter F. Bauer Aspects of Real-Time Simulation . . . . 134--136
Alfred K. Susskind Digital Information Processing for
Machine-Tool Control . . . . . . . . . . 136--140
L. R. Turner and
J. H. Rawlings Realization of Randomly Timed Computer
Input and Output by Means of an
Interrupt Feature . . . . . . . . . . . 141--149
Anonymous Questions and Discussion . . . . . . . . 150--155
Douglas B. Netherwood Logical Machine Design: A Selected
Bibliography . . . . . . . . . . . . . . 155--178
W. H. Kautz Unit-Distance Error-Checking Codes . . . 179--180
Ivan Flores An Optimum Character Recognition System
Using Decision Functions . . . . . . . . 180--180
John N. Warfield A Note on the Reduction of Switching
Functions . . . . . . . . . . . . . . . 180--181
N. T. Grisamore and
L. S. Rotolo and
G. U. Uyehara Logical Design Using the Stroke Function 181--183
Anonymous Contributors . . . . . . . . . . . . . . 183--184
Anonymous SENEWS Science Education Subcommittee
Newsletter . . . . . . . . . . . . . . . 185--188
Anonymous PGEC News . . . . . . . . . . . . . . . 188--188
Anonymous The Chairman's Column . . . . . . . . . 189--189
Anonymous Willis H. Ware . . . . . . . . . . . . . 190--190
C. A. Krause and
R. R. Lowe Design of AC Computing Amplifiers Using
Transistors . . . . . . . . . . . . . . 191--195
Roderick Gould A Note on Contact Networks for Switching
Functions of Four Variables . . . . . . 196--198
Joseph Otterman On the Loop- and Node-Analysis
Approaches to the Simulation of
Electrical Networks . . . . . . . . . . 199--206
Harvey L. Garner Generalized Parity Checking . . . . . . 207--213
Harry J. Gray Investigations of Magnetic Amplifiers
with Feedback . . . . . . . . . . . . . 213--217
James E. Robertson A New Class of Digital Division Methods 218--222
Jack L. Rosenfeld Magnetic Core Pulse-Switching Circuits
for Standard Packages . . . . . . . . . 223--228
T. D. Rossing and
W. M. Overn and
V. J. Korkowski The Switching Characteristics of 4-79
Permalloy Cores with Different Anneals 228--231
Raymond E. Miller Formal Analysis and Synthesis of
Bilateral Switching Networks . . . . . . 231--244
Douglas J. Hamilton A Transistor Pulse Generator for Digital
Systems . . . . . . . . . . . . . . . . 244--249
Anonymous Corrections . . . . . . . . . . . . . . 250--250
Anonymous Corrections . . . . . . . . . . . . . . 250--250
J. N. Warfield Switching Circuits as Topological Models
in Discrete Probability Theory . . . . . 251--252
Anonymous Contributors . . . . . . . . . . . . . . 252--253
Anonymous SENEWS Science Education Subcommittee
Newsletter . . . . . . . . . . . . . . . 254--258
Anonymous PGEC News . . . . . . . . . . . . . . . 259--259
Anonymous Howard E. Tompkins . . . . . . . . . . . 261--261
Mao-Chao Chen A Magnetic Core Parallel Adder . . . . . 262--264
N. Metropolis and
R. L. Ashenhurst Significant Digit Computer Arithmetic 265--267
Shreeram Abhyankar Minimal ``Sum of Products of Sums''
Expressions of Boolean Functions . . . . 268--276
I. Flores and
F. Ragonese A Method for Synthesizing the Waveform
Generated by a Character, Printed in
Magnetic Ink, in Passing Beneath a
Magnetic Reading Head . . . . . . . . . 277--282
S. P. Frankel On the Minimum Logical Complexity
Required for a General Purpose Computer 282--285
E. J. McCluskey, Jr. Iterative Combinational Switching
Networks --- General Design
Considerations . . . . . . . . . . . . . 285--291
N. Rouche Some Properties of Boolean Equations . . 291--298
D. D. Aufenkamp Analysis of Sequential Machines II . . . 299--306
T. Miura and
M. Nagata Theoretical Consideration of Computing
Errors of a Slow Type Electronic Analog
Computer . . . . . . . . . . . . . . . . 306--312
John F. Couleur BIDEC --- A Binary-to-Decimal or
Decimal-to-Binary Converter . . . . . . 313--316
Noah S. Prywes Diodeless Magnetic Shift Registers
Utilizing Transfluxors . . . . . . . . . 316--324
Anonymous Correction . . . . . . . . . . . . . . . 324--324
G. P. Weeg Folding of Symmetric Functions . . . . . 325--325
Anonymous Contributors . . . . . . . . . . . . . . 326--327
Anonymous PGEC News . . . . . . . . . . . . . . . 327--327
Anonymous SENEWS Science Education Subcommittee
Newsletter . . . . . . . . . . . . . . . 328--330
Anonymous Index to IRE Transactions on Electronic
Computers . . . . . . . . . . . . . . . 331--334
Anonymous The Chairman's Column . . . . . . . . . 1--2
Shreeram Abhyankar Absolute Minimal Expressions of Boolean
Functions . . . . . . . . . . . . . . . 3--8
S. C. Chao A Generalized Resistor-Transistor Logic
Circuit and Some Applications . . . . . 8--12
Seymour Ginsburg A Synthesis Technique for Minimal State
Sequential Machines . . . . . . . . . . 13--24
Harvey L. Garner A Ring Model for the Study of
Multiplication for Complement Codes . . 25--30
Donald Savitt A High-Speed Analog to Digital Converter 31--35
D. W. Ladd and
E. W. Wolf A Non-Real-Time Simulation of SAGE
Tracking and BOMARC Guidance . . . . . . 36--41
Eugene Rawdin Time Multiplexing as Applied to Analog
Computation . . . . . . . . . . . . . . 42--47
J. H. Mulligan A Figure of Merit for Single-Pass Data
Recording Systems . . . . . . . . . . . 48--54
A. A. B. Pritsker and
R. C. Van Buskirk and
J. K. Wetherbee Simulation to Obtain a Systems Measure
of an Air Duel Environment . . . . . . . 55--59
K. W. Uncapher 1958 PGEC Membership Survey Report . . . 60--67
William E. Waters An Analog Method for Constructing a
Curve . . . . . . . . . . . . . . . . . 68--68
Anonymous Abstracts of Current Computer Literature 69--79
Anonymous Subject Index . . . . . . . . . . . . . 79--82
Anonymous Author Index . . . . . . . . . . . . . . 82--82
Anonymous Contributors . . . . . . . . . . . . . . 83--84
Anonymous SENEWS . . . . . . . . . . . . . . . . . 85--86
Anonymous PGEC News . . . . . . . . . . . . . . . 87--87
Anonymous Richard O. Endres . . . . . . . . . . . 89--89
Anonymous The Chairman's Column . . . . . . . . . 90--91
Eric E. Bittmann Thin-Film Memories . . . . . . . . . . . 92--97
J. T. Wallmark and
S. M. Marcus Integrated Devices Using Direct-Coupled
Unipolar Transistor Logic . . . . . . . 98--107
V. H. Grinich and
I. Haas P-N-$\pi$-N Triode Switching
Applications . . . . . . . . . . . . . . 108--113
T. E. Bray An Electro-Optical Shift Register . . . 113--117
Frederick P. Brooks, Jr. and
Gerrit A. Blaauw and
Werner Buchholz Processing Data in Bits and Pieces . . . 118--124
D. E. Rosenheim and
R. B. Ash Increasing Reliability by the Use of
Redundant Machines . . . . . . . . . . . 125--130
Robert S. Ledley Boolean Matrix Equations in Digital
Circuit Design . . . . . . . . . . . . . 131--139
Harvey L. Garner The Residue Number System . . . . . . . 140--147
Walter L. Morgan Bibliography of Digital Magnetic
Circuits and Materials . . . . . . . . . 148--158
J. J. Miyata and
R. R. Hartel The Recording and Reproduction of
Signals on Magnetic Medium Using
Saturation-Type Recording . . . . . . . 159--169
E. Bloch and
R. C. Paulsen Magnetic Core Logic in a High-Speed
Card-to-Tape Converter . . . . . . . . . 169--181
P. Madich and
J. Petrich and
N. Parezanovich The Use of a Repetitive Differential
Analyzer for Finding Roots of Polynomial
Equations . . . . . . . . . . . . . . . 182--185
R. C. Lee and
F. B. Cox A High-Speed Analog-Digital Computer for
Simulation . . . . . . . . . . . . . . . 186--197
R. V. Powell Distributed Parameter Vibration with
Structural Damping and Noise Excitation 197--200
J. K. Munson and
A. I. Rubin Optimization by Random Search on the
Analog Computer . . . . . . . . . . . . 200--203
Elmer G. Gilbert Linear System Approximation by
Differential Analyzer Simulation of
Orthonormal Approximation Functions . . 204--209
George A. Bekey Generalized Integration on the Analog
Computer . . . . . . . . . . . . . . . . 210--217
L. Bush and
P. Orlando A Perturbation Technique for Analog
Computers . . . . . . . . . . . . . . . 218--221
Paul E. Pfeiffer A Four-Quadrant Multiplier Using
Triangular Waves, Diodes, Resistors, and
Operational Amplifiers . . . . . . . . . 222--227
Paul M. Kintner Dual-Polarity Logic as a Design Tool . . 227--228
P. J. Van Heerden Analysis of Binary Time Series in
Periodic Functions . . . . . . . . . . . 228--229
Jerome Rothstein Residues of Binary Numbers Modulo Three 229--229
C. K. Chow Comments on Optimum Character
Recognition Systems . . . . . . . . . . 230--230
Robert S. Ledley Solution to Boolean Equations . . . . . 230--230
Anonymous Contributors . . . . . . . . . . . . . . 231--235
Anonymous Abstracts of Current Computer Literature 236--247
Anonymous Subject Index . . . . . . . . . . . . . 248--249
Anonymous Author Index . . . . . . . . . . . . . . 250--250
Anonymous PGEC News and Notices . . . . . . . . . 251--252
Anonymous Information for Authors . . . . . . . . 253--260
Anonymous The Chairman's Column . . . . . . . . . 261--261
Marshall C. Yovits ONR Symposium on Microwave Techniques
for Computing Systems . . . . . . . . . 262--262
R. E. Meagher History and Introduction --- Microwave
Techniques for Computers . . . . . . . . 263--265
W. C. G. Ortel Nanosecond Logic by Amplitude Modulation
at $X$ Band . . . . . . . . . . . . . . 265--271
Stanley P. Frankel A Logic Design for a Microwave Computer 271--276
L. S. Onyshkevych and
W. F. Kosonocky and
A. W. Lo Parametric Phase-Locked Oscillator ---
Characteristics and Applications to
Digital Systems . . . . . . . . . . . . 277--286
J. Hilibrand and
C. W. Mueller and
C. F. Stocker and
R. D. Gold Semiconductor Parametric Diodes in
Microwave Computers . . . . . . . . . . 287--297
D. J. Blattner and
F. Sterzer Fast Microwave Logic Circuits . . . . . 297--301
W. Sauter and
P. J. Isaacs Microwave Logic Circuits Using Diodes 302--307
Norman Kroll Properties of Propagating Structures
with Variable Parameter Elements . . . . 307--307
S. Muroga and
K. Takashima The Parametron Digital Computer
MUSASINO-1 . . . . . . . . . . . . . . . 308--316
Stanley K. Chao A Glow Counting Tube Read-Out Technique
and Its Application . . . . . . . . . . 317--320
William L. Kilmer An Idealized Over-All Error-Correcting
Digital Computer Having Only an
Error-Detecting Combinational Part . . . 321--325
H. J. Gray and
H. H. Nishino and
A. L. Vivatson System Organization of a
Multiple-Cockpit Digital Operational
Flight Trainer . . . . . . . . . . . . . 326--330
Jack E. Volder The CORDIC Trigonometric Computing
Technique . . . . . . . . . . . . . . . 330--334
D. H. Daggett Decimal--Binary Conversions in CORDIC 335--339
Douglas B. Netherwood Minimal Sequential Machines . . . . . . 339--345
Seymour Ginsburg A Technique for the Reduction of a Given
Machine to a Minimal-State Machine . . . 346--355
M. C. Paull and
S. H. Unger Minimizing the Number of States in
Incompletely Specified Sequential
Switching Functions . . . . . . . . . . 356--367
Douglas B. Netherwood Logical Machine Design II: A Selected
Bibliography . . . . . . . . . . . . . . 367--380
A. Ben Clymer Operational Analog Simulation of the
Vibration of a Beam and a Rectangular
Multicellular Structure . . . . . . . . 381--391
Edward O. Gilbert The Design of Position and Velocity
Servos for Multiplying and Function
Generation . . . . . . . . . . . . . . . 391--399
Robert T. Chien Orthogonal Matrices, Error-Correcting
Codes and Load-Sharing Matrix Switches 400--400
D. E. Muller Treatment of Transition Signals in
Electronic Switching Circuits by
Algebraic Methods . . . . . . . . . . . 401--401
Anonymous Contributors . . . . . . . . . . . . . . 402--406
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 407--408
Anonymous Abstracts of Current Computer Literature 409--420
Anonymous Subject Index . . . . . . . . . . . . . 421--423
Anonymous Author Index . . . . . . . . . . . . . . 423--423
Anonymous SENEWS . . . . . . . . . . . . . . . . . 424--429
Anonymous PGEC News and Notices . . . . . . . . . 430--430
Anonymous Index to IRE Transactions on Electronic
Computers . . . . . . . . . . . . . . . 1--6
Richard O. Endres The Chairman's Column . . . . . . . . . 431--431
W. J. Giguere and
J. H. Jamison and
J. C. Noll Transistor Pulse Circuits for 160-MC
Clock Rates . . . . . . . . . . . . . . 432--438
E. J. McCluskey and
S. H. Unger A Note on the Number of Internal
Variable Assignments for Sequential
Switching Circuits . . . . . . . . . . . 439--440
Seymour Ginsburg Synthesis of Minimal-State Machines . . 441--449
Harold M. Lucal Arithmetic Operations for Digital
Computers Using a Modified Reflected
Binary Code . . . . . . . . . . . . . . 449--458
H. Chang and
A. G. Milnes Magnetic Fields of Square-Loop Thin
Films of Oblate Spheroidal Geometry . . 458--464
S. J. Schwartz and
J. S. Sallo Electrodeposited Twistor and Bit Wire
Components . . . . . . . . . . . . . . . 465--469
L. M. Lambert Nondestructive Readout of Metallic-Tape
Computer Cores . . . . . . . . . . . . . 470--474
A. Melmed and
R. Shevlin Diode-Steered Magnetic-Core Memory . . . 474--478
M. Graham and
G. L. Miller and
H. R. Pate and
R. Spinrad The Design of a Large Electrostatic
Memory . . . . . . . . . . . . . . . . . 479--485
Arthur Gill Systematic Scaling for Digital
Differential Analyzers . . . . . . . . . 486--489
E. M. Zaitzeff and
M. M. Astrahan Russian Visit to U.S. Computers . . . . 489--497
R. Fullwood and
P. Spiegel An Accurate Bidirectional Transmission
Gate Using Semiconductor Diodes . . . . 498--498
A. A. Mullin Self-Dual Symmetric Switching Functions
with a Certain $a$-Number Constraint . . 498--499
A. A. Mullin Combinational Relay Switching Fields . . 499--499
Anonymous Contributors . . . . . . . . . . . . . . 500--502
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 503--506
Anonymous Abstracts of Current Computer Literature 507--520
Anonymous 1959 Index to Abstracts of Current
Computer Literature . . . . . . . . . . 521--531
Anonymous PGEC News and Notices . . . . . . . . . 532--532
Anonymous SENEWS . . . . . . . . . . . . . . . . . 533--534
Anonymous Arnold A. Cohen: Elected Chairman, PGEC,
1960--1961 . . . . . . . . . . . . . . . 1--1
A. S. Hoagland and
G. C. Bacon High Density Digital Magnetic Recording
Techniques . . . . . . . . . . . . . . . 2--11
Arthur Gill The Optimal Organization of Serial
Memory Transfers . . . . . . . . . . . . 12--15
Dale P. Masher The Design of Diode-Transistor NOR
Circuits . . . . . . . . . . . . . . . . 15--24
E. Goto and
K. Murata and
K. Nakazawa and
K. Nakagawa and
T. Moto-Oka and
Y. Matsuoka and
Y. Ishibashi and
H. Ishida and
T. Soma and
E. Wada Esaki Diode High-Speed Logical Circuits 25--29
D. B. Armstrong and
T. H. Crowley and
U. F. Gianola and
E. E. Newhall Magnetic Analogs of Relay Contact
Networks for Logic . . . . . . . . . . . 30--35
George W. Reitwiesner The Determination of Carry Propagation
Length for Binary Addition . . . . . . . 35--38
R. McNaughton and
H. Yamada Regular Expressions and State Graphs for
Automata . . . . . . . . . . . . . . . . 39--47
Sam D. Stearns A Method for the Design of Pattern
Recognition Logic . . . . . . . . . . . 48--53
I. Flores and
L. Grey Optimization of Reference Signals for
Character Recognition Systems . . . . . 54--61
Ted W. Berwin Frequency-to-Period-to-Analog Computer
for Flowrate Measurement . . . . . . . . 62--71
Willis H. Ware Soviet Computer Technology --- 1959 . . 72--120
Granino A. Korn Analog-Computer Representation of
Inelastic Stops . . . . . . . . . . . . 121--121
C. J. Nisson Analysis and Methods for Detection of
Some DC Amplifier Errors . . . . . . . . 121--122
Arthur Gill Minimization of Contact Networks Subject
to Reliability Specifications . . . . . 122--123
D. S. Kamat Two Modulator-Switches for Computer
Applications . . . . . . . . . . . . . . 123--124
E. J. Gauss Concerning Abstracts . . . . . . . . . . 125--125
Anonymous Contributors . . . . . . . . . . . . . . 125--129
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 130--133
Anonymous Abstracts of Current Computer Literature 134--148
Anonymous Subject Index . . . . . . . . . . . . . 148--151
Anonymous Author Index . . . . . . . . . . . . . . 151--151
Anonymous PGEC News and Notices . . . . . . . . . 152--153
H. D. Crane Sequence Detection Using All-Magnetic
Circuits . . . . . . . . . . . . . . . . 155--160
G. H. Goldstick Comparison of Saturated and Nonsaturated
Switching Circuit Techniques . . . . . . 161--175
V. P. Mathis and
H. Raillard and
J. J. Suran Comparative Performance of Saturating
and Current-Clamped High-Frequency Pulse
Circuits . . . . . . . . . . . . . . . . 175--175
I. P. V. Carter A New Core Switch for Magnetic Matrix
Stores and Other Purposes . . . . . . . 176--191
H. P. Schlaeppi and
I. P. V. Carter Submicrosecond Core Memories Using
Multiple Coincidence . . . . . . . . . . 192--198
H. Chang and
A. G. Milnes Magnetic Fields of Twistors Represented
by Confocal Hollow Prolate Spheroids . . 199--207
Thomas W. Kampe The Design of a General-Purpose
Microprogram-Controlled Computer with
Elementary Structure . . . . . . . . . . 208--213
J. Sklansky An Evaluation of Several Two-Summand
Binary Adders . . . . . . . . . . . . . 213--226
J. Sklansky Conditional-Sum Addition Logic . . . . . 226--231
William H. Kautz Constant-Weight Counters and Decoding
Trees . . . . . . . . . . . . . . . . . 231--244
Thomas H. Mott Determination of the Irredundant Normal
Forms of a Truth Function by Iterated
Consensus of the Prime Implicants . . . 245--252
W. F. Caldwell and
G. A. Korn and
V. R. Latorre and
G. R. Peterson A Precision Amplitude-Distribution
Amplifier . . . . . . . . . . . . . . . 252--255
E. V. Bohn A Pulse Position Modulation Analog
Computer . . . . . . . . . . . . . . . . 256--261
Anonymous Correction . . . . . . . . . . . . . . . 261--261
D. R. Bennion A Note on Magnetic Shift Registers . . . 262--262
John E. Croy Improved Arrangement of a Decimal
Multiplier . . . . . . . . . . . . . . . 263--263
W. H. Highleyman and
L. A. Kamentsky Comments on a Character Recognition
Method of Bledsoe and Browning . . . . . 263--263
Theodore A. Bickart Computation of an Expression for the
Frequency Spectrum of a Two-Sided Signal 263--264
Bernard Elspas Self-Complementary Symmetry Types of
Boolean Functions . . . . . . . . . . . 264--266
A. A. Mullin Correction to ``Self-Dual Symmetric
Switching Functions with a Certain
$a$-Number Constraint'' . . . . . . . . 266--266
R. P. Mayer Progress Toward Block Diagram Standards 266--267
Anonymous Contributors . . . . . . . . . . . . . . 267--269
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 270--274
Anonymous Abstracts of Current Computer Literature 275--288
Anonymous Subject Index . . . . . . . . . . . . . 288--291
Anonymous Author Index . . . . . . . . . . . . . . 291--292
Anonymous PGEC Notices . . . . . . . . . . . . . . 293--293
Anonymous Notices . . . . . . . . . . . . . . . . 294--294
W. F. Chow Tunnel Diode Digital Circuitry . . . . . 295--301
D. B. Jarvis and
L. P. Morgan and
J. A. Weaver Transistor Current Switching and Routing
Techniques . . . . . . . . . . . . . . . 302--308
A. V. Pohm and
E. N. Mitchell Magnetic Film Memories, A Survey . . . . 308--314
R. F. Schauer and
R. M. Stewart and
A. V. Pohm and
A. A. Read Some Applications of Magnetic Film
Parametrons as Logical Devices . . . . . 315--320
Kent D. Broadbent A Thin Magnetic Film Shift Register . . 321--323
Robert M. Tillman Fluxlok --- A Nondestructive,
Random-Access Electrically Alterable:
High-Speed Memory Technique Using
Standard Ferrite Memory Cores . . . . . 323--328
D. A. Aaronson and
D. B. James Magnetostrictive Ultrasonic Delay Lines
for a PCM Communication System . . . . . 329--332
David T. Brown Error Detecting and Correcting Binary
Codes for Arithmetic Operations . . . . 333--337
R. Lindaman A Theorem for Deriving Majority-Logic
Networks Within an Augmented Boolean
Algebra . . . . . . . . . . . . . . . . 338--342
E. L. Lawler and
G. A. Salton The Use of Parenthesis-Free Notation for
the Automatic Design of Switching
Circuits . . . . . . . . . . . . . . . . 342--352
R. L. Konigsberg DC Amplifier Misalignment in Computing
Systems . . . . . . . . . . . . . . . . 352--358
M. B. Broughton A Feedback Method for Obtaining a
Synchro Output Signal Proportional to
Input Angle $\theta$ for Large $\theta$ 359--362
Gilbert R. Grado A Solution to the Euler Angle
Transformation Equations . . . . . . . . 362--369
H. D. Crane The Neuristor . . . . . . . . . . . . . 370--371
S. C. Chao Generalized RTL Circuits ---
Supplementary . . . . . . . . . . . . . 371--372
Joel H. Germeroth Casting Out Threes in Binary Numbers . . 373--373
Julus T. Tou Digital Programming for the Inversion of
$Z$ Transforms . . . . . . . . . . . . . 373--373
Anonymous Contributors . . . . . . . . . . . . . . 374--376
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 377--388
Anonymous Abstracts of Current Computer Literature 389--404
Anonymous Author Index . . . . . . . . . . . . . . 404--405
Anonymous Subject Index . . . . . . . . . . . . . 405--408
Anonymous PGEC News . . . . . . . . . . . . . . . 409--410
Anonymous Notices . . . . . . . . . . . . . . . . 411--413
Anonymous Index to IRE Transactions on Electronic
Computers . . . . . . . . . . . . . . . 1--9
F. K. Buelow Improvements to Current Switching . . . 415--418
J. T. Lynch and
J. J. Karew System Application of Hybrid Logic
Circuitry . . . . . . . . . . . . . . . 418--423
G. W. Neff and
S. A. Butler and
D. L. Critchlow Esaki Diode Logic Circuits . . . . . . . 423--429
R. H. Bergman Tunnel Diode Logic Circuits . . . . . . 430--438
Jan A. Narud A Secondary-Emission Pulse Circuit, Its
Analysis and Application . . . . . . . . 439--451
R. L. Gray An Electrically Alterable Nondestructive
Twistor Memory . . . . . . . . . . . . . 451--455
Douglas J. Hamilton Current Build-Up in Avalanche
Transistors with Resistance Loads . . . 456--460
Forrest Salter High-Speed Transistorized Adder for a
Digital Computer . . . . . . . . . . . . 461--464
Herbert C. Hendrickson Fast High-Accuracy Binary Parallel
Addition . . . . . . . . . . . . . . . . 465--469
Arthur Gill Characterizing Experiments for
Finite-Memory Binary Automata . . . . . 469--471
T. Marill and
D. M. Green Statistical Recognition Functions and
the Design of Pattern Recognizers . . . 472--477
G. C. Vandling The Simplification of Multiple-Output
Switching Networks Composed of
Unilateral Devices . . . . . . . . . . . 477--486
G. P. Weeg Uniqueness of Weighted Code
Representations . . . . . . . . . . . . 487--489
R. J. Martin and
N. A. Masnari and
J. E. Rowe Analog Representation of Poisson's
Equation in Two Dimensions . . . . . . . 490--496
L. D. Kovach and
W. Comley A New, Solid-State, Nonlinear Analog
Component . . . . . . . . . . . . . . . 496--503
R. Tomovic and
N. Parezanovic Solving Integral Equations on a
Repetitive Differential Analyzer . . . . 503--506
M. A. Thomae A New Technique for Analog Integration
and Differentiation . . . . . . . . . . 507--509
Anonymous Correction . . . . . . . . . . . . . . . 509--509
P. J. Van Heerden Periodic Binary Time Series and Their
Relation to Boolean Functions . . . . . 510--510
M. Lehman and
N. Burla A Note on the
Simultaneous-Carry-Generation System for
High-Speed Adders . . . . . . . . . . . 510--510
Anonymous Contributors . . . . . . . . . . . . . . 511--514
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 515--530
Anonymous Abstracts of Current Computer Literature 531--545
Anonymous Two-Year Cumulative Index for Abstracts
of Current Computer Literature
1959--1960 . . . . . . . . . . . . . . . 547--572
Anonymous PGEC News . . . . . . . . . . . . . . . 573--573
Anonymous Notices . . . . . . . . . . . . . . . . 574--578
Anonymous Information for Authors . . . . . . . . nil5
Robert McNaughton Unate Truth Functions . . . . . . . . . 1--6
Robert C. Minnick Linear-Input Logic . . . . . . . . . . . 6--16
M. Cohn and
R. Lindaman Axiomatic Majority-Decision Logic . . . 17--21
Thomas C. Bartee Computer Design of Multiple-Output
Logical Networks . . . . . . . . . . . . 21--30
Douglas C. Engelbart Games That Teach the Fundamentals of
Computer Operation . . . . . . . . . . . 31--41
M. Aoki and
G. Estrin Bilateral Switching Using Nonsymmetric
Elements . . . . . . . . . . . . . . . . 42--50
R. Betts and
G. Bishop Ferrite Toroid Core Circuit Analysis . . 51--56
C. G. Shook A Digital Static Magnetic Wire Storage
with Nondestructive Read-Out . . . . . . 56--62
Anonymous Correction . . . . . . . . . . . . . . . 62--62
Philip Warren Cheney A Digital Correlator Based on the
Residue Number System . . . . . . . . . 63--70
R. M. Duffy and
C. P. Gilbert A Function Generator Using Cold-Cathode
Selector Tubes . . . . . . . . . . . . . 71--77
K. S. Miller and
J. B. Walsh Initial Conditions in Computer
Simulation . . . . . . . . . . . . . . . 78--80
Keith W. Uncapher 1960 PGEC Membership Report . . . . . . 81--91
R. B. Stone and
G. M. White High-Order Probability Generators . . . 92--93
M. V. Wilkes Self-Repairing Computers . . . . . . . . 93--94
H. S. Miiller Majority Gates Applied to Simultaneous
Comparators . . . . . . . . . . . . . . 94--95
R. Bianchini and
C. Freiman On Internal Variable Assignments for
Sequential Switching Circuits . . . . . 95--96
W. W. Bledsoe Further Results on the $N$-tuple Pattern
Recognition Method . . . . . . . . . . . 96--96
Leonard Uhr A Possibly Misleading Conclusion as to
the Inferiority of One Method for
Pattern Recognition to a Second Method
to which it is Guaranteed to be Superior 96--97
W. H. Highleyman Further Comments on the $N$-tuple
Pattern Recognition Method . . . . . . . 97--97
N. V. Findler Computer Model of Gambling and Bluffing 97--98
Jerome R. Cox A Squaring Analog-Digital Converter . . 98--100
Philip W. Cheney Analog-to-Digital Conversion with
Threshold Detectors . . . . . . . . . . 100--101
Anonymous Contributors . . . . . . . . . . . . . . 102--104
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 105--117
Anonymous Abstracts of Current Computer Literature 118--136
Anonymous Author Index . . . . . . . . . . . . . . 137--137
Anonymous Subject Index . . . . . . . . . . . . . 138--141
Anonymous PGEC News . . . . . . . . . . . . . . . 142--143
Anonymous Notices . . . . . . . . . . . . . . . . 143--147
Anonymous New Editor-in-Chief of IRETEC . . . . . 149--149
Anonymous Editorial . . . . . . . . . . . . . . . 150--150
K. V. Mina and
E. E. Newhall A Straightforward Way of Generating All
Boolean Functions of $N$ Variables Using
a Single Magnetic Circuit . . . . . . . 151--156
J. Hartmanis On the State Assignment Problem for
Sequential Machines. I . . . . . . . . . 157--165
J. T. Chu A Generalization of a Theorem of Quine
for Simplifying Truth Functions . . . . 165--168
Roy G. Saltman Reducing Computing Time for Synchronous
Binary Division . . . . . . . . . . . . 169--174
H. J. Heijn and
J. C. Selman The Philips Computer PASCAL . . . . . . 175--183
H. S. Yourke and
S. A. Butler and
W. G. Strohm Esaki Diode NOT--OR Logic Circuits . . . 183--190
John L. Haynes Logic Circuits Using Square-Loop
Magnetic Devices: A Survey . . . . . . . 191--203
D. R. Bennion and
H. D. Crane and
D. C. Engelbart A Bibliographical Sketch of All-Magnetic
Logic Schemes . . . . . . . . . . . . . 203--206
H. D. Crane and
E. K. Van De Riet Design of an All-Magnetic Computing
System: Part I --- Circuit Design . . . 207--220
H. D. Crane Design of an All-Magnetic Computing
System: Part II --- Logical Design . . . 221--232
C. A. Allen and
G. D. Bruce and
E. D. Councill A 2.18-Microsecond Megabit Core Storage
Unit . . . . . . . . . . . . . . . . . . 233--237
Warren A. Christopherson Matrix Switch and Drive System for a
Low-Cost Magnetic-Core Memory . . . . . 238--246
M. Lehman Serial Matrix Storage Systems . . . . . 247--252
Frank F. Tsui A Flexible and Inexpensive Method of
Monitoring Program Execution in a
Digital Computer . . . . . . . . . . . . 253--259
Herbert Freeman On the Encoding of Arbitrary Geometric
Configurations . . . . . . . . . . . . . 260--268
E. Kettel and
W. Schneider An Accurate Analog Multiplier and
Divider . . . . . . . . . . . . . . . . 269--272
R. A. Kaenel High-Speed Analog-to-Digital Converters
Utilizing Tunnel Diodes . . . . . . . . 273--284
Arthur Rothbart Bibliography on Magnetostrictive Delay
Lines . . . . . . . . . . . . . . . . . 285--285
H. H. Edwards and
V. L. Newhouse and
J. W. Bremer Analysis of a Crossed-Film Cryoton Shift
Register . . . . . . . . . . . . . . . . 285--287
W. H. Highleyman A Note on Optimum Pattern Recognition
Systems . . . . . . . . . . . . . . . . 287--288
J. E. Mezei Minimal Characterizing Experiments for
Finite Memory Automata . . . . . . . . . 288--288
J. Myhill and
W. H. Kautz On the Size of Weights Required for
Linear-Input Switching Functions . . . . 288--290
Arthur Gill A Note on Moore's Distinguishability
Theorem . . . . . . . . . . . . . . . . 290--291
Douglas C. Engelbart Correction: ``Games that Teach the
Fundamentals of Computer Operation'' . . 291--291
Anonymous Contributors . . . . . . . . . . . . . . 292--295
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 296--315
Anonymous Abstracts of Current Computer Literature 316--332
Anonymous Subject Index . . . . . . . . . . . . . 332--335
Anonymous Author Index . . . . . . . . . . . . . . 335--336
Anonymous PGEC News . . . . . . . . . . . . . . . 337--340
Anonymous Notices . . . . . . . . . . . . . . . . 341--342
Anonymous Information for Authors . . . . . . . . 343--343
Anonymous Editorial . . . . . . . . . . . . . . . 345--345
C. Y. Lee An Algorithm for Path Connections and
Its Applications . . . . . . . . . . . . 346--365
Arthur Gill Cascaded Finite-State Machines . . . . . 366--370
William H. Kautz The Realization of Symmetric Switching
Functions with Linear-Input Logical
Elements . . . . . . . . . . . . . . . . 371--378
Robert P. Coleman Orthogonal Functions for the Logical
Design of Switching Circuits . . . . . . 379--383
B. M. Eisenstadt and
B. Gold Autocorrelations for Boolean Functions
of Noiselike Periodic Sequences . . . . 383--388
Algirdas Avi\vzienis Signed-Digit Number Representations for
Fast Parallel Arithmetic . . . . . . . . 389--400
C. W. Rosenthal Computing Machine Aids to a Development
Project . . . . . . . . . . . . . . . . 400--406
W. G. Brown and
J. Tierney and
R. Wasserman Improvement of Electronic-Computer
Reliability through the Use of
Redundancy . . . . . . . . . . . . . . . 407--416
Arthur W. Lo Some Thoughts on Digital Components and
Circuit Techniques . . . . . . . . . . . 416--425
N. S. Prywes and
H. Lukoff and
J. Schwarz UNIVAC--LARC High-Speed Circuitry: Case
History in Circuit Optimization . . . . 426--438
L. L. Burns and
G. A. Alphonse and
G. W. Leck Coincident-Current Superconductive
Memory . . . . . . . . . . . . . . . . . 438--446
D. H. MacPherson and
R. K. York Semipermanent Storage by Capacitive
Coupling . . . . . . . . . . . . . . . . 446--451
W. A. Barrett and
F. B. Humphrey and
J. A. Ruff and
H. L. Stadler A Card-Changeable
Permanent-Magnet-Twistor Memory of Large
Capacity . . . . . . . . . . . . . . . . 451--461
Anonymous Correction . . . . . . . . . . . . . . . 461--461
P. L. Simmons and
R. F. Simmons The Simulation of Cognitive Processes:
An Annotated Bibliography . . . . . . . 462--483
Herbert Gelernter A Note on the System Requirements of a
Digital Computer for the Manipulation of
List Structures . . . . . . . . . . . . 484--489
L. A. Kamentsky The Simulation of Three Machines Which
Read Rows of Handwritten Arabic Numbers 489--501
W. H. Highleyman An Analog Method for Character
Recognition . . . . . . . . . . . . . . 502--512
G. Kovatch and
W. E. Meserve The Hall-Effect Analog Multiplier . . . 512--515
C. H. Single and
J. A. Brussolo Copper-Mandrel Potentiometer Dynamic
Error and Compensation . . . . . . . . . 516--523
M. L. Morgan and
J. C. Looney Design of the ESIAC\reg Algebraic
Computer . . . . . . . . . . . . . . . . 524--529
W. W. Bledsoe A Basic Limitation on the Speed of
Digital Computers . . . . . . . . . . . 530--530
John P. Larkin Axiomatic Majority-Decision Logic . . . 530--530
Karl S. Menger A Modulo Two Adder for Three Inputs
Using a Single Tunnel Diode . . . . . . 530--531
R. Narasimhan Minimizing Incompletely Specified
Sequential Switching Functions . . . . . 531--532
D. B. G. Edwards High-Speed Transistorized Adders . . . . 532--532
T. W. Connolly and
K. S. Miller Analog Computation of Covariance
Matrices . . . . . . . . . . . . . . . . 533--533
Rob Roy Multichannel Minimum-Amplitude
Comparator . . . . . . . . . . . . . . . 533--534
Anonymous Contributors . . . . . . . . . . . . . . 535--540
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 541--554
Anonymous Abstracts of Current Computer Literature 555--571
Anonymous Subject Index . . . . . . . . . . . . . 571--574
Anonymous Author Index . . . . . . . . . . . . . . 574--574
Anonymous PGEC News . . . . . . . . . . . . . . . 575--578
Anonymous Notices . . . . . . . . . . . . . . . . 579--584
Anonymous Information for Authors . . . . . . . . 585--585
M. Yoeli The Cascade Decomposition of Sequential
Machines . . . . . . . . . . . . . . . . 587--592
R. E. Stearns and
J. Hartmanis On the State Assignment Problem for
Sequential Machines II . . . . . . . . . 593--603
Sheldon B. Akers A Truth Table Method for the Synthesis
of Combinational Logic . . . . . . . . . 604--615
Sidney N. Einhorn The Use of the Simplex Algorithm in the
Mechanization of Boolean Switching
Functions by Means of Magnetic Cores . . 615--622
E. H. Sussenguth An Algorithm for Automatic Design of
Logical Cryogenic Circuits . . . . . . . 623--630
M. E. Arthur Geometric Mapping of Switching Functions 631--637
Per A. Holst Bibliography on Switching Circuits and
Logical Algebra . . . . . . . . . . . . 638--661
J. B. Wilson and
R. S. Ledley An Algorithm for Rapid Binary Division 662--670
S. B. Geller and
P. A. Mantek and
D. R. Boyle A General Junction-Transistor Equivalent
Circuit for Use in Large-Signal
Switching Analysis . . . . . . . . . . . 670--679
A. L. Leiner and
A. Weinberger and
C. Coleman and
H. Loberman Using Digital Computers in the Design
and Maintenance of New Computers . . . . 680--690
M. Lehman and
N. Burla Skip Techniques for High-Speed
Carry-Propagation in Binary Arithmetic
Units . . . . . . . . . . . . . . . . . 691--698
Robert C. Brigham Some Properties of Binary Counters with
Feedback . . . . . . . . . . . . . . . . 699--701
Lee E. Hargrave A Magnetostrictive Delay-Line Shift
Register . . . . . . . . . . . . . . . . 702--708
Donald O. Smith Proposal for Magnetic Domain-Wall
Storage and Logic . . . . . . . . . . . 708--711
R. C. Johnston Cryosar Memory Design . . . . . . . . . 712--717
E. H. Frei and
J. Goldberg A Method for Resolving Multiple
Responses in a Parallel Search File . . 718--722
Gerhard L. Hollander Drum Organization for Strobe Addressing 722--729
Bert F. Green Computer Languages for Symbol
Manipulation . . . . . . . . . . . . . . 729--735
D. N. Freeman Computer Synthesis of
Character-Recognition Systems . . . . . 735--747
C. S. Deering and
C. B. Shelman An Incremental Computer Technique for
Solving Coordinate-Rotation Equations 748--751
C. L. Becker and
J. V. Wait Two-Level Correlation on an Analog
Computer . . . . . . . . . . . . . . . . 752--758
Edward A. Feigenbaum Soviet Cybernetics and Computer Sciences
--- 1960 . . . . . . . . . . . . . . . . 759--776
John E. Croy Rapid Technique of Manual or Machine
Binary-to-Decimal Integer Conversion
Using Decimal Radix Arithmetic . . . . . 777--777
W. H. Highleyman A Note on Linear Separation . . . . . . 777--778
Harold F. Klock Functional Notation for NOR and NAND
Networks . . . . . . . . . . . . . . . . 778--778
Sheldon B. Akers On the Algebraic Manipulation of
Majority Logic . . . . . . . . . . . . . 779--779
Louis B. Wadel Conversion from Conventional to
Negative-Base Number Representation . . 779--779
Jovan Petric A New Method of Examining the Stability
of Linear Systems Using a Repetitive
Differential Analyzer . . . . . . . . . 779--781
Karl S. Menger Correction to ``A Modulo Two Adder for
Three Inputs Using a Single Tunnel
Diode'' . . . . . . . . . . . . . . . . 781--781
E. L. Lawler Minimization of Switching Circuits
Subject to Reliability Conditions . . . 781--782
David L. Zackon Variable Time Delay by Padé Approximation 783--783
Anonymous Contributors . . . . . . . . . . . . . . 784--788
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 789--796
Anonymous Abstracts of Current Computer Literature 797--843
Anonymous PGEC News . . . . . . . . . . . . . . . 845--846
Anonymous Notices . . . . . . . . . . . . . . . . 847--848
Anonymous Index to IRE Transactions on Electronic
Computers . . . . . . . . . . . . . . . 849--859
Anonymous Special Analog-Hybrid Computer Issue . . 1--1
John McLeod Ten Years of Computer Simulation . . . . 2--6
P. M. Chirlian and
V. A. Marsocci Operational Amplifiers Using Controlled
Superconductors . . . . . . . . . . . . 6--9
Donald T. Greenwood A Comparison of Higher-Order Difference
Methods in the Solution of
Beam-Vibration Problems . . . . . . . . 9--17
E. C. Deland Simulation of a Biological System on an
Analog Computer . . . . . . . . . . . . 17--25
P. H. Wendland and
P. M. Hanlet An Infinite-Resolution Function
Generator . . . . . . . . . . . . . . . 26--30
Mark E. Connelly Real-Time Analog-Digital Computation . . 31--41
Arthur Hausner Parametric Techniques for Eliminating
Division and Treating Singularities in
Computer Solutions of Ordinary
Differential Equations . . . . . . . . . 42--45
T. D. Truitt An Analog-Digital Real-Time Computer . . 46--52
P. J. Hermann Simulation of Steam Generation in a Heat
Exchanger . . . . . . . . . . . . . . . 53--57
Richard M. Terasaki Analog Computation of Green's Function
for Integrating Two-Point Boundary Value
Problems . . . . . . . . . . . . . . . . 57--63
N. Parezanovic and
M. Dujmovic Accuracy Improvements of the
Tapped-Potentiometer Function Generators 63--66
Anonymous Proposed IRE Standards for Analog
Computers . . . . . . . . . . . . . . . 67--79
Eugene W. Henry Analog-Computer Simulation of a
Frequency Detector . . . . . . . . . . . 80--80
F. W. Kasischke Analog-Computer Technique for Simulation
of Dynamic Pressure in Re-Entry Studies 80--82
Granino A. Korn Network Approximations of Variable Time
Delays Require Caution . . . . . . . . . 82--82
R. W. Williams and
G. M. Parker Synchro Circuit with Output Proportional
to Input Angle . . . . . . . . . . . . . 82--82
Granino A. Korn Exact Design Equations for Operational
Amplifiers with Four-Terminal Computing
Networks . . . . . . . . . . . . . . . . 82--83
Juris Hartmanis Maximal Autonomous Clocks of Sequential
Machines . . . . . . . . . . . . . . . . 83--86
G. S. Glinski Magnetostrictive Delay Lines . . . . . . 86--86
E. L. Lawer Electrical Assemblies with a Minimum
Number of Interconnections . . . . . . . 86--88
E. M. Partridge A Linear Vector Recognition Function . . 88--88
H. S. Miller and
R. O. Winder Majority-Logic Synthesis by Geometric
Methods . . . . . . . . . . . . . . . . 89--90
Anonymous Contributors . . . . . . . . . . . . . . 90--92
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 93--104
Anonymous Abstracts of Current Computer Literature 105--115
Anonymous Subject Index . . . . . . . . . . . . . 116--117
Anonymous Author Index . . . . . . . . . . . . . . 118--118
Anonymous PGEC News . . . . . . . . . . . . . . . 119--119
Anonymous IFIP News . . . . . . . . . . . . . . . 120--120
Anonymous Notices . . . . . . . . . . . . . . . . 120--122
William Kilmer Iterative Switching Networks Composed of
Combinational Cells . . . . . . . . . . 123--131
Seymour Ginsburg Examples of Abstract Machines . . . . . 132--135
K. K. Maitra Cascaded Switching Networks of Two-Input
Flexible Cells . . . . . . . . . . . . . 136--143
Theodore M. Booth The Vertex-Frame Method for Obtaining
Minimal Proposition-Letter Formulas . . 144--154
D. Cantor and
G. Estrin and
R. Turn Logarithmic and Exponential Function
Evaluation in a Variable Structure
Digital Computer . . . . . . . . . . . . 155--164
Ronald M. Guffin A Computer for Solving Linear
Simultaneous Equations Using the Residue
Number System . . . . . . . . . . . . . 164--173
Thomas Marill Computational Chains and the
Simplification of Computer Programs . . 173--180
J. Atkin and
N. B. Marple Information Processing by Data
Interrogation . . . . . . . . . . . . . 181--187
E. J. Galli The Stenowriter --- A System for the
Lexical Processing of Stenotypy . . . . 187--199
Harold Sobol Time Average Thermal Properties of a
Computer Utilizing Thin-Film
Superconducting Elements . . . . . . . . 200--212
C. A. Renton and
B. Rabinovici Tunnel-Diode Full Binary Adder . . . . . 213--217
J. A. Baldwin Circuits Employing Toroidal Magnetic
Cores as Analogs of Multipath Cores . . 218--223
T. Kilburn and
D. B. G. Edwards and
M. J. Lanigan and
F. H. Sumner One-Level Storage System . . . . . . . . 223--235
G. H. Goldstick and
E. F. Klein Design of Memory Sense Amplifiers . . . 236--253
Bohdan Kostyshyn A Harmonic Analysis of Saturation
Recording in a Magnetic Medium . . . . . 253--263
H. J. Kump The Magnetic Configuration of Stylus
Recording . . . . . . . . . . . . . . . 263--273
G. P. Steck Stochastic Model for the
Browning--Bledsoe Pattern Recognition
Scheme . . . . . . . . . . . . . . . . . 274--282
Iwao Toda On the Number of Types of Self-Dual
Logical Functions . . . . . . . . . . . 282--284
G. M. Dillard and
R. E. Simmons An Electronic Generator of Random
Numbers . . . . . . . . . . . . . . . . 284--284
Martin Cohn Inconsistent Canonical Forms of
Switching Functions . . . . . . . . . . 284--285
P. R. Bryant and
F. G. Heath and
R. D. Killick Counting with Feedback Shift Registers
by Means of a Jump Technique . . . . . . 285--286
R. A. Kaenel Hysteresis-Free Tunnel-Diode Amplitude
Comparator . . . . . . . . . . . . . . . 286--287
M. A. Fischler and
E. A. Poe Threshold Realization of Arithmetic
Circuits . . . . . . . . . . . . . . . . 287--288
E. L. Lawler Correction to ``Minimization of
Switching Circuits Subject to
Reliability Conditions'' . . . . . . . . 289--289
Roger Hockney An Intersection Algorithm Giving All
Irredundant Normal Forms from a Prime
Implicant List . . . . . . . . . . . . . 289--290
Anonymous Contributors . . . . . . . . . . . . . . 291--294
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 295--303
Anonymous Abstracts of Current Computer Literature 305--316
Anonymous Subject Index . . . . . . . . . . . . . 316--318
Anonymous Author Index . . . . . . . . . . . . . . 318--318
Anonymous PGEC News . . . . . . . . . . . . . . . 319--319
Anonymous Obituary . . . . . . . . . . . . . . . . 320--320
Anonymous Notices . . . . . . . . . . . . . . . . 321--322
Anonymous Walter L. Anderson, Chairman, 1962--1963 323--323
Janusz A. Brzozowski A Survey of Regular Expressions and
Their Applications . . . . . . . . . . . 324--335
A. Grasselli The Design of Program-Modifiable
Micro-Programmed Control Units . . . . . 336--339
O. J. Bedrij Carry-select adder . . . . . . . . . . . 340--346
Richard C. Singleton Load-Sharing Core Switches Based on
Block Designs . . . . . . . . . . . . . 346--351
R. C. Allinnick and
J. L. Haynes Magnetic Core Access Switches . . . . . 352--368
Peter G. Neumann On the Logical Design of Noiseless
Load-Sharing Matrix Switches . . . . . . 369--373
W. J. Wray, Jr. Worst Case Design of Variable-Threshold
TRL Circuits . . . . . . . . . . . . . . 382--389
J. D. R. McQuillan The Design Problems of a Megabit Storage
Matrix for Use in a High-Speed Computer 390--404
E. C. Leaycraft and
E. H. Metan Characteristics of a High-Speed
Multipath Core for a Coincident-Current
Memory . . . . . . . . . . . . . . . . . 405--409
W. P. Horton and
L. E. Hargrave, Jr. Comment on ``A Magnetostrictive
Register'' . . . . . . . . . . . . . . . 410--410
P. R. Bryant and
R. D. Killick Nonlinear Feedback Shift Registers . . . 410--411
Joel M. Winett An Alpha-State Finite Automaton for
Multiplication by Alpha . . . . . . . . 412--413
W. W. Bledsoe and
C. L. Bisson Memory Matrices for the $n$-Tuple
Pattern Recognition Method . . . . . . . 414--414
D. S. Williams and
J. T. Beckett Teaching Aid for ``Games that Teach the
Fundamentals of Computer Operation'' . . 415--415
G. W. Taylor A Method of Increasing the Number of
Orders in a Digital Computer . . . . . . 416--418
D. B. Armstrong Review: \booktitleOn the State
Assignment Problem for Sequential
Machines II, by R. E.Stearns and J.
Hartmanis . . . . . . . . . . . . . . . 419--419
W. H. Kautz Review: \booktitleSome Properties of
Binary Counters With Feedback, by R. C.
Brigham . . . . . . . . . . . . . . . . 419--419
D. D. Aufenkamp Review: \booktitleOn Methods for
Realizing a Finite Automaton Whose
Cyclical Nature is Determined by the
Variation of the Input State, by M. A.
Aizerman, L. A. Gusev, L. I. Rozonoer,
I. M. Smirnova and A. A. Tal' . . . . . 419--419
Petar Madic Review: \booktitleAn Incremental
Computer Technique for Solving
Coordinate-Rotation Equations, by C. S.
Deering and C. B. Shelman . . . . . . . 420--420
O. L. MacSorley Review: \booktitleAn Algorithm for Rapid
Binary Division, by J. B. Wilson and R.
S. Ledley . . . . . . . . . . . . . . . 420--420
M. S. Shumate Review: \booktitleUse of a Combined
Analog-Digital System for Re-Entry
Vehicle Flight Simulation, by A. N.
Wilson . . . . . . . . . . . . . . . . . 420--420
A. I. Rubin Review: \booktitleTwo-Level Correlation
on an Analog Computer, by C. L. Becker
and J. V. Wait . . . . . . . . . . . . . 421--421
R. L. Alonso Review: \booktitleTunnel Diode Storage
Using Current Sensing, by E. R. Beck, D.
A. Savitt, and A. E. Whiteside . . . . . 422--422
E. N. Mitchell Review: \booktitleCryosar Memory Design,
by R. C. Johnston . . . . . . . . . . . 422--422
A. S. Hoagland Review: \booktitleCard Random Access
Memory (CRAM): Functions and Use, by L.
Bloom, I. Pardo, W. Keating, and E.
Mayne . . . . . . . . . . . . . . . . . 422--422
P. R. Low Review: \booktitleTesting of Micrologic
Elements, by R. H. Norman and R. C.
Anderson . . . . . . . . . . . . . . . . 422--422
E. E. Bittmann Review: \booktitleProposal for
Demonstration of Domain Wall Storage and
Logic, by D. O. Smith . . . . . . . . . 423--423
A. Rosenfeld Review: \booktitleDesign Factors in the
Development of an Optical Character
Recognition Machine, by J. J. Leimer . .
L. Uhr Review: \booktitleStatistical
Recognition Functions and the Design of
Pattern Recognizers, by T. Marill and D.
M. Green . . . . . . . . . . . . . . . . 423--423
I. Flores Review: \booktitleComputer Synthesis of
Character Recognition Systems, by D. N.
Freeman . . . . . . . . . . . . . . . . 424--424
E. E. David, Jr. Review: \booktitleDigital-to-Voice
Conversion, by E. L. Ragland . . . . . . 424--424
E. N. Gilbert Review: \booktitleTransmission of
Information, by R. M. Fano . . . . . . . 424--424
W. R. Adey Review: \booktitleSensory Communication:
Contributions to the Symposium on
Principles of Sensory Communication, by
W. A. Rosenblith . . . . . . . . . . . . 425--425
J. F. Nolan Review: \booktitleMulti-Level
Programming for a Real-Time System, by
A. B. Shafritz, A. E. Miller, and K.
Rose . . . . . . . . . . . . . . . . . . 426--426
M. Taube Review: \booktitleInformation Retrieval:
State of the Art, by D. R. Swanson . . . 426--426
Anonymous Abstracts of Current Computer Literature 427
C. L. Coates and
R. B. Kirchner and
P. M. Lewis, II A Simplified Procedure for the
Realization of Linearly-Separable
Switching Functions . . . . . . . . . . 447--458
S. Seshu and
D. N. Freeman The Diagnosis of Asynchronous Sequential
Switching Systems . . . . . . . . . . . 459--465
D. B. Armstrong A Programmed Algorithm for Assigning
Internal Codes to Sequential Machines 466--472
I. B. Pyne and
E. J. McCluskey The Reduction of Redundancy in Solving
Prime Implicant Tables . . . . . . . . . 473--482
Antonio Grasselli Control Units for Sequencing Complex
Asynchronous Operations . . . . . . . . 483--493
Nicholas Szabó Sign Detection in Nonredundant Residue
Systems . . . . . . . . . . . . . . . . 494--500
Y. A. Keir and
P. W. Cheney and
M. Tannenbaum Division and overflow detection in
residue number systems . . . . . . . . . 501--507
Peter G. Neumann Encoding and Decoding for Cyclic
Permutation Codes . . . . . . . . . . . 507--511
John N. Mitchell Computer Multiplication and Division
Using Binary Logarithms . . . . . . . . 512--517
G. H. Goldstick and
D. G. MacKie Design of Computer Circuits Using Linear
Programming Techniques . . . . . . . . . 518--530
James L. Farrell Pulse Generator with Logarithmic Spacing 531--534
P. L. Simmons and
R. F. Simmons The Simulation of Cognitive Processes,
II: An Annotated Bibliography . . . . . 535--552
T. C. Anderson A Method for Evaluating Stieltjes
Integrals on the Analog Computer . . . . 552--555
L. E. Fogarty and
R. M. Howe Flight Simulation of Orbital and
Re-Entry Vehicles . . . . . . . . . . . 555--563
Robert E. Keller An Analog Computer Realization of the
Euclidean Tools . . . . . . . . . . . . 564--570
Arthur Hausner Correction: ``Parametric Techniques for
Eliminating Division and Treating
Singularities in Computer Solutions of
Ordinary Differential'' . . . . . . . . 570--570
Howard Handler A Technique for Measuring the Phase
Margin of an Operational Amplifier . . . 571--571
Yves J. M. Blache Automatic Time-Mark Generation for
Analog Computer Phase-Plane Trajectories 571--572
C. Y. Lee A Note on the $n$th Shortest Path
Problem . . . . . . . . . . . . . . . . 572--573
R. C. Minnick Comments on ``The Use of the Simplex
Algorithm in the Mechanization of
Boolean Switching Functions by Means of
Magnetic Cores'' . . . . . . . . . . . . 573--573
S. N. Einhorn Author's Reply [to comments on ``The Use
of the Simplex Algorithm in the
Mechanization of Boolean Switching
Functions by Means of Magnetic Cores''] 574--574
Hugo Ghiron Rules to Manipulate Regular Expressions
of Finite Automata . . . . . . . . . . . 574--575
M. Y. Hsiao A Decoder Scheme Using Magnetic-Core
Matrices for Systematic Codes . . . . . 575--576
V. A. Marsocci and
P. M. Chirlian On the Accuracy of Operational
Amplifiers Utilizing Controlled
Superconductors . . . . . . . . . . . . 577--577
R. J. Slobodin On Statistical Analysis of a DTL Gate 577--577
C. L. Becker and
J. V. Wait Correction to ``Two-Level Correlation of
an Analog Computer'' . . . . . . . . . . 578--579
Anonymous Contributors . . . . . . . . . . . . . . 580--582
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 583--590
Anonymous Abstracts of Current Computer Literature 591--603
Anonymous Subject Index . . . . . . . . . . . . . 604--605
Anonymous Author Index . . . . . . . . . . . . . . 606--606
Anonymous PGEC News . . . . . . . . . . . . . . . 607--607
Anonymous Notices . . . . . . . . . . . . . . . . 607--609
D. B. Armstrong On the Efficient Assignment of Internal
Codes to Sequential Machines . . . . . . 611--622
Hisao Yamada Disjunctively Linear Logic Nets . . . . 623--639
Irving J. Gabelman The Synthesis of Boolean Functions Using
a Single Threshold Element . . . . . . . 639--642
Rein Teoste Design of a Repairable Redundant
Computer . . . . . . . . . . . . . . . . 643--649
Fred Lee An Automatic Self-Checking and
Fault-Locating Method . . . . . . . . . 649--654
C. H. Wolff Coding for Multiple Asymmetric Errors in
One Channel of a Multichannel System . . 655--658
W. R. Smith and
A. V. Pohm A New Approach to
Resistor-Transistor-Tunnel-Diode
Nanosecond Logic . . . . . . . . . . . . 658--664
J. A. Baldwin Flux Reversal in Three-Rung Laddics . . 664--676
Frank F. Tsui Improving the Performance of the
Sense-Amplifier Circuit Through
Pre-Amplification Strobing and
Noise-Matched Clipping . . . . . . . . . 677--683
C. K. Chow A Recognition Method Using Neighbor
Dependence . . . . . . . . . . . . . . . 683--690
A. I. Rubin Continuous Regression Techniques Using
Analog Computers . . . . . . . . . . . . 691--699
C. Green and
H. D'Hoop and
A. Debroux APACHE-A Breakthrough in Analog
Computing . . . . . . . . . . . . . . . 699--706
A. L. Vivatson and
W. C. Slemmer Comments on ``Real-Time Analog-Digital
Computation'' . . . . . . . . . . . . . 707--707
A. L. Vivatson and
W. C. Slemmer Comments on ``Real-Time Analog-Digital
Computation'' . . . . . . . . . . . . . 707--708
Charles P. Rozier Decimal-to-Binary Conversion Using Octal
Radix Arithmetic . . . . . . . . . . . . 708--709
Harry R. Eckes New Analog-Computer Setup for a Bistable
Element Permitting Symmetrical
Triggering . . . . . . . . . . . . . . . 709--709
Sidney B. Geller Obtaining the Internal Junction
Characteristics of a Transistor for Use
in Analog Simulation . . . . . . . . . . 709--710
Jon S. Squire An 11-Cryotron Full Adder . . . . . . . 710--711
L. Calabi and
J. A. Riley Inessentiality in Minimal Networks and
Formulas . . . . . . . . . . . . . . . . 711--713
A. K. Choudhury and
M. S. Basu A Mechanized Chart for Simplification of
Switching Functions . . . . . . . . . . 713--714
Anonymous Correction . . . . . . . . . . . . . . . 714--714
P. R. Bryant and
R. D. Killick Correction to ``Nonlinear Feedback Shift
Registers'' . . . . . . . . . . . . . . 714--714
Anonymous Contributors . . . . . . . . . . . . . . 715--716
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 717--726
Anonymous Abstracts of Current Computer Literature 727--737
Anonymous Subject Index . . . . . . . . . . . . . 737--739
Anonymous Author Index . . . . . . . . . . . . . . 739--739
Anonymous PGEC News . . . . . . . . . . . . . . . 740--740
Anonymous AFIPS News . . . . . . . . . . . . . . . 740--741
Anonymous Notices . . . . . . . . . . . . . . . . 741--742
Robert A. Short The Design of Complementary-Output
Networks . . . . . . . . . . . . . . . . 743--753
Hisao Yamada Real-Time Computation and Recursive
Functions Not Real-Time Computable . . . 753--760
Gernot Metze A Class of Binary Divisions Yielding
Minimally Represented Quotients . . . . 761--764
Lester F. Shew High-Density Magnetic Head Design for
Noncontact Recording . . . . . . . . . . 764--773
W. N. Carr and
A. G. Milnes Bias-Controlled Tunnel-Pair Logic
Circuits . . . . . . . . . . . . . . . . 773--779
Hermann Schmid Linear-Segment Function Generator . . . 780--788
R. F. Elfant Approximations for the Demagnetizing
Factors of Hollow Cylinders Represented
by Confocal Hollow Prolate Spheroids . . 789--789
B. Rabinovici and
C. A. Renton A Transistor Flip-Flop Full Binary Adder 789--791
T. Kiyono and
K. Ikeda and
H. Ichiki Analog-To-Digital Converter Utilizing an
Esaki Diode Stack . . . . . . . . . . . 791--792
R. W. Thorpe Constant Current Source for Analog
Computer Use . . . . . . . . . . . . . . 792--793
Vasil Uzunoglu Circuits Using Tunnel Diode Flip-Flops
and PNPN Diodes . . . . . . . . . . . . 793--796
Anonymous Contributors . . . . . . . . . . . . . . 797--797
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 798--807
Anonymous Abstracts of Current Computer Literature 809--832
Anonymous IFIP News . . . . . . . . . . . . . . . 833--833
Anonymous PGEC News . . . . . . . . . . . . . . . 833--833
Anonymous Notices . . . . . . . . . . . . . . . . 834--835
Anonymous Index to IRE Transactions on Electronic
Computers . . . . . . . . . . . . . . . 836--845
Anonymous Call for Papers . . . . . . . . . . . . 1--1
G. Fan and
E. Donath and
E. S. Barrekette and
A. Wirgin Analysis of a Magneto-Optic Readout
System . . . . . . . . . . . . . . . . . 3--9
T. R. Bashkow and
J. Friets and
A. Karson A Programming System for Detection and
Diagnosis of Machine Malfunctions . . . 10--17
Paul W. Cooper The Multiple-Category Bayes Decision
Procedure . . . . . . . . . . . . . . . 18--18
Shimon Even Snake in the Box Codes . . . . . . . . . 18--18
Juris Hartmanis The Equivalence of Sequential Machine
Models . . . . . . . . . . . . . . . . . 18--19
S. C. Gupta and
J. J. O'Donnell Manipulation of State Transition
Matrices of Finite Markov Chains . . . . 19--20
Donald L. Dietmeyer Conversion from Positive to Negative and
Imaginary Radix . . . . . . . . . . . . 20--22
George H. Barnes Comment on ``An Electronic Generator of
Random Numbers'' . . . . . . . . . . . . 22--22
A. Thiney Rise and Fall Times of Transistors in
Switching Operation Regardless of the
Driving Source Impedance . . . . . . . . 23--23
J. T. Wallmark and
A. G. Revesz Redundancy in Unipolar Field-Effect
Transistor Circuits . . . . . . . . . . 23--25
C. K. Chow An Experimental Result on Character
Recognition . . . . . . . . . . . . . . 25--25
John A. Bradshaw Letter Recognition Using a Captive Scan 26--26
Yngvar Lundh A Digital Integrator for On-Line Signal
Processing . . . . . . . . . . . . . . . 26--28
S. H. Unger Contributors . . . . . . . . . . . . . . 28--29
A. Avizienis Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 30--38
R. S. Ledley R63-16 The Storage and Retrieval of
Physiological and Medical Data in a
Modern Hospital . . . . . . . . . . . . 36--36
D. H. Lehmer R63--17 Division and Overflow Detection
in Residue Number Systems . . . . . . . 36--37
W. Semon R63-18 Sign Detection in Nonredundant
Residue Systems . . . . . . . . . . . . 37--37
J. S. Wholey R63-19 An Approach to General Patteme
Recognition . . . . . . . . . . . . . . 37--37
P. J. Stone R63-20 Adaptive Mechanisms in Digital
``Concept'' Processing . . . . . . . . . 37--38
G. Salton R63-21 The Stenowriter --- A System for
the Lexical Processing of Stenotypy . . 38--38
S. H. Unger Abstracts of Current Computer Literature 39--51
Anonymous Abstracts of Current Computer Literature 39--54
B. J. Flehinger Subject Index . . . . . . . . . . . . . 51--54
K. K. Maitra Author Index . . . . . . . . . . . . . . 54--54
B. J. Flehinger PTGEC News . . . . . . . . . . . . . . . 55--55
Anonymous PTGEC News . . . . . . . . . . . . . . . 55--56
S. H. Unger AFIPS News . . . . . . . . . . . . . . . 55--56
Anonymous IFIP News . . . . . . . . . . . . . . . 56--56
G. S. Sebestyen IFIP News . . . . . . . . . . . . . . . 56--56
Anonymous Notices . . . . . . . . . . . . . . . . 57--59
C. T. Leondes Notices . . . . . . . . . . . . . . . . 57--59
Anonymous PTGEC People . . . . . . . . . . . . . . 59--59--a
B. Elspas PTGEC People . . . . . . . . . . . . . . 59--59
Anonymous Information for Authors . . . . . . . . 59--b
J. Hartmanis Membership in the Professional Technical
Group on Electronic Computers . . . . . 60--60
R. H. Urbano Boolean Matrices and the Stability of
Neural Nets . . . . . . . . . . . . . . 61--66
J. A. Brzozowski and
E. J. McCluskey Signal Flow Graph Techniques for
Sequential Circuit State Diagrams . . . 67--76
Irving Stein Generalized Pulse Recording . . . . . . 77--92
M. F. Barkouki and
I. Stein Theoretical and Experimental Evaluation
of RZ and NRZ Recording Characteristics 92--100
Marvin L. Stein Automatic Digital Programming of Analog
Computers . . . . . . . . . . . . . . . 100--111
R. H. Wilkinson A Method of Generating Functions of
Several Variables Using Analog Diode
Logic . . . . . . . . . . . . . . . . . 112--129
Robert J. Lechner Transformations Among Switching Function
Canonical Forms . . . . . . . . . . . . 129--130
R. C. Minnick and
B. Elspas and
R. A. Short Symmetric Latin Squares . . . . . . . . 130--131
Otakar A. Horna Majority-Logic Synthesis . . . . . . . . 131--132
James L. Costanza The Identification of Combinational
Logic Switching Structure . . . . . . . 132--133
Frank M. Brown A Node-Elimination Theorem for Boolean
Matrices . . . . . . . . . . . . . . . . 133--134
C. A. Gaston A Simple Test for Linear Separability 134--135
W. H. Highleyman Data for Character Recognition Studies 135--136
Louis Fein Renaming the PTGEC . . . . . . . . . . . 136--136
W. A. Beyer Uniqueness of Weighted Code
Representations, II . . . . . . . . . . 137--137
P. M. Chirlian and
V. A. Marsocci Note on a Review of ``Operational
Amplifiers Using Controlled
Superconductors'' . . . . . . . . . . . 137--137
O. Firschein and
M. Fischler Automatic Subclass Determination for
pattern-Recognition Applications . . . . 137--141
Louis Fein Scientific and Technical Conventions . . 141--142
J. Sklansky Ultimate-Speed Adders . . . . . . . . . 142--148
P. M. Chirlian The Fabrication of Low Resistances at
Liquid Helium Temperatures . . . . . . . 148--148
Anonymous Contributors . . . . . . . . . . . . . . 149--149
R. E. Levien Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 150--158
M. A. Fischler R63-31 A ``Logical Pattern'' Recognition
Program . . . . . . . . . . . . . . . . 154--155
R. M. Karp R63-32 Computational Chains and the
Simplification of Computer Programs . . 155--155
P. M. Lewis R63-33 Introduction to the Theory of
Finite State Machines . . . . . . . . . 155--156
A. Gill R63-34 Some Dangers in State Reduction
of Sequential Machines . . . . . . . . . 156--156
S. Levy R63-35 A Study of Some Self-Correcting
Sequential Networks . . . . . . . . . . 156--157
C. Green R63-38 Experience with Hybrid
Computation . . . . . . . . . . . . . . 157--157
R. J. Press R63-37 A Logic Design Translator . . . . 157--157
T. D. Truitt R63-36 An Analog Input and Output System
for a Real-Time Process Control Computer
System . . . . . . . . . . . . . . . . . 157--157
R. Fitzhugh R63-40 An Active Pulse Transmission Line
Simulating Nerve Axon . . . . . . . . . 158--158
H. J. Heijn R63-39 The Solomon Computer . . . . . . 158--158
C. T. Leondes R63-41 A Nonlinear Digital Optimizing
Program for Process Control Systems . . 158--158
M. A. Harrison Abstracts of Current Computer Literature 159--172
Anonymous Abstracts of Current Computer Literature 159--175
R. J. Lechner Subject Index . . . . . . . . . . . . . 172--174
W. R. Cowell Author Index . . . . . . . . . . . . . . 175--175
Anonymous PTGEC News . . . . . . . . . . . . . . . 176--176
E. N. Gilbert PTGEC News . . . . . . . . . . . . . . . 176--176
B. Rabinovici AFIPS News . . . . . . . . . . . . . . . 176--176
Anonymous Notices . . . . . . . . . . . . . . . . 177--179
A. A. Mullin Notices . . . . . . . . . . . . . . . . 177--179
Anonymous Information for Authors . . . . . . . . 179--b
Anonymous Call for Papers . . . . . . . . . . . . 182--182
Fusachika Miyata Realization of Arbitrary Logical
Functions Using Majority Elements . . . 183--191
W. H. Hanson Ternary Threshold Logic . . . . . . . . 191--197
Leo Hellerman A Catalog of Three-Variable Or-Invert
and And-Invert Logical Circuits . . . . 198--223
J. Hartmanis and
R. E. Stearns A Study of Feedback and Errors in
Sequential Machines . . . . . . . . . . 223--232
Anonymous Correction . . . . . . . . . . . . . . . 232--232
M. Perles and
M. O. Rabin and
E. Shamir The Theory of Definite Automata . . . . 233--243
R. F. Arnold and
M. A. Harrison Algebraic Properties of Symmetric and
Partially Symmetric Boolean Functions 244--251
J. K. Hawkins and
C. J. Munsey A Parallel Computer Organization and
Mechanizations . . . . . . . . . . . . . 251--262
V. O. Muth and
A. K. Scidmore A Memory Organization for an Elementary
List-Processing Computer . . . . . . . . 262--265
M. Y. Hsiao and
F. F. Sellers The Carry-Dependent Sum Adder . . . . . 265--268
R. Brayton and
R. Willoughby An Analysis of the Effect of Component
Tolerances on the Amplification of the
Balanced-Pair Tunnel-Diode Circuit . . . 269--274
G. F. Songster Negative-Base Number-Representation
Systems . . . . . . . . . . . . . . . . 274--277
William H. Pierce Predicting Signal Degeneration and Gate
Compatibility in Logic Circuits . . . . 277--281
B. A. Kaufman and
J. S. Hammond A High-Speed Direct-Coupled Magnetic
Memory Sense Amplifier Employing
Tunnel-Diode Discriminators . . . . . . 282--295
Eduardo T. Ulzurrun Tunnel-Diode Threshold Discriminator
Tolerance Analysis . . . . . . . . . . . 296--299
R. L. Mattson and
O. Firschein and
M. Fischler An Experimental Investigation of a Class
of Pattern Recognition Synthesis
Algorithms . . . . . . . . . . . . . . . 300--306
S. G. Margolis and
J. J. O'Donnell Rigorous Treatments of Variable Time
Delays . . . . . . . . . . . . . . . . . 307--309
G. A. Korn Performance of Operational Amplifiers
With Electronic Mode Switching . . . . . 310--312
Per Asbjorn Holst Dynamic Accuracy and Error in Analog
Computations . . . . . . . . . . . . . . 313--316
Gerhard L. Hollander Effect of Fan-In and Fan-Out Limitations
on the Value of Computer Circuits . . . 317--318
T. Fukinuki and
M. Fujinaka A Stable Basic Logic Circuit . . . . . . 318--319
D. W. Davies An 11-Cryotron Full Adder . . . . . . . 319--319
E. V. Krishnamurthy On Computer Multiplication and Division
Using Binary Logarithms . . . . . . . . 319--320
John F. Randolph A Polynomial Counter . . . . . . . . . . 320--320
P. M. Lewis and
C. L. Coates Is Switching Theory Mathematics or
Engineering? . . . . . . . . . . . . . . 320--321
Ernest J. Schubert The Relative Merits of Minimization
Techniques for Switching Circuits . . . 321--322
Michael Yoeli Cascade-Parallel Decompositions of
Sequential Machines . . . . . . . . . . 322--324
Daniel H. Sheingold Constant Current Source for Analog
Computer Use . . . . . . . . . . . . . . 324--324
G. W. Swift Analog Computer Simulation of a Curved
Hysteresis Loop . . . . . . . . . . . . 324--324
Howard Handler Measurement of Phase Shift . . . . . . . 324--325
D. A. Meier Contributors . . . . . . . . . . . . . . 325--329
M. S. Axelrod Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 330--336
D. N. Arden R63-55 States of Sequential Machines
Whose Logical Elements Involve Delay . . 335--335
C. L. Coates R63-56 Disjunctively Linear Logic Nets 335--336
W. S. Humphrey R63-57 On the Efficient Assignment of
Internal Codes to Sequential Machines 336--336
W. L. Shevel Abstracts of Current Computer Literature 337--349
Anonymous Abstracts of Current Computer Literature 337--351
W. M. Overn Subject Index . . . . . . . . . . . . . 349--351
C. W. Gear Author Index . . . . . . . . . . . . . . 351--351
Anonymous PGEC News . . . . . . . . . . . . . . . 352--352
Yu. L. Sagalovitch PGEC News . . . . . . . . . . . . . . . 352--352
Anonymous Notices . . . . . . . . . . . . . . . . 353--353
B. S. Tsybakov Notices . . . . . . . . . . . . . . . . 353--353
Anonymous Membership in the Professional Technical
Group on Electronic Computers . . . . . 354--354
E. E. David Membership in the Professional Technical
Group on Electronic Computers . . . . . 354--354
Anonymous Information for Authors . . . . . . . . 354--c
Anonymous Call for Papers . . . . . . . . . . . . 355--355
Michael Yoeli Counting with Nonlinear Binary Feedback
Shift Registers . . . . . . . . . . . . 357--361
Mitchell P. Marcus Cascaded Binary Counters with Feedback 361--364
A. Holick Analysis of Noncatastrophic Failures in
Digital Guidance Systems . . . . . . . . 365--371
F. C. Yao Analysis of Signal Transmission in Ultra
High Speed Transistorized Digital
Computers . . . . . . . . . . . . . . . 372--382
Lester F. Shew Discrete Tracks for Saturation Magnetic
Recording . . . . . . . . . . . . . . . 383--387
George Nagy A Survey of Analog Memory Devices . . . 388--393
Robert H. Kohr A Method for the Determination of a
Differential Equation Model for Simple
Nonlinear Systems . . . . . . . . . . . 394--400
Anonymous Correction . . . . . . . . . . . . . . . 400--400
W. H. Hanson Threshold-Logic Synthesis by Algebraic
Methods . . . . . . . . . . . . . . . . 401--402
J. A. Brzozowski and
J. F. Poage On the Construction of Sequential
Machines from Regular Expressions . . . 402--403
Paul E. Wood A Note on Threshold Device Error
Analysis . . . . . . . . . . . . . . . . 403--405
Donald Liss A Test for Unate Truth Functions . . . . 405--405
Mitchell P. Marcus Relay Essential Hazards . . . . . . . . 405--407
A. J. Nichols Comments on Armstrong's State Assignment
Techniques . . . . . . . . . . . . . . . 407--409
M. Lehman The Minimization of Assimilations in
Binary Carry-Storage Arithmetic Units 409--410
D. L. Slotnick and
W. C. Borck and
R. C. McReynolds Comments on H. J. Heijn's Review of
``The SOLOMON Computer'' . . . . . . . . 410--410
H. Weinstein A High-Speed ``Compare'' Circuit . . . . 410--411
Granino A. Korn Analog/Hybrid Storage and Pulse
Modulation . . . . . . . . . . . . . . . 411--412
R. Hampton and
G. A. Korn and
B. Mitchell Hybrid Analog-Digital Random-Noise
Generation . . . . . . . . . . . . . . . 412--413
N. Seshagiri Analog-Computer Technique for Impulsive
Atmospheric Radio-Noise Analysis . . . . 413--414
Anonymous Contributors . . . . . . . . . . . . . . 415--415
J. Goldberg Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 416--423
H. Witsenhausen R63-68 APACHE --- A Breakthrough in
Analog Computing . . . . . . . . . . . . 419--420
C. A. Isberg R63-69 Multiple Input-Output Link in
Computer Systems . . . . . . . . . . . . 420--420
O. Firschein R63-70 Experiments on Machine Learning
to Recognize . . . . . . . . . . . . . . 420--421
S. R. Petrick R63-71 Some Experiments in the
Generation of Word and Document
Associations . . . . . . . . . . . . . . 421--421
S. Ginsburg R63-73 Signal Flow Graph Techniques for
Sequential Circuit State Diagrams . . . 422--422
P. Ihm R63-72 Cluster Formation and Diagnostic
Significance in Psychiatric Symptom
Evaluation . . . . . . . . . . . . . . . 422--422
B. Elspas R63-74 Coding for Logical Operations . . 422--423
W. C. Mann R63-75 Design of a Repairable Redundant
Computer . . . . . . . . . . . . . . . . 423--423
Anonymous Abstracts of Current Computer Literature 425--436
Anonymous Abstracts of Current Computer Literature 425--439
E. U. Cohler Subject Index . . . . . . . . . . . . . 437--438
J. F. Kruy Author Index . . . . . . . . . . . . . . 439--439
Anonymous PTGEC News . . . . . . . . . . . . . . . 440--440
A. W. Lo AFIPS News . . . . . . . . . . . . . . . 440--440
J. J. Suran PTGEC News . . . . . . . . . . . . . . . 440--440
Anonymous Notices . . . . . . . . . . . . . . . . 441--441
E. O. Johnson Notices . . . . . . . . . . . . . . . . 441--441
Anonymous Membership in the Professional Technical
Group on Electronic Computers . . . . . 442--442
W. J. Karplus Membership in the Professional Technical
Group on Electronic Computers . . . . . 442--442
Anonymous Information for Authors . . . . . . . . 442--a
P. M. Lewis and
C. L. Coates Realization of Logical Functions by a
Network of Threshold Components with
Specified Sensitivity . . . . . . . . . 443--454
C. L. Coates and
P. M. Lewis A Realization Procedure for Threshold
Gate Networks . . . . . . . . . . . . . 454--461
Carl D. Todd An Annotated Bibliography on NOR and
NAND Logic . . . . . . . . . . . . . . . 462--464
J. Sklansky General Synthesis of Tributary Switching
Networks . . . . . . . . . . . . . . . . 464--469
C. L. Liu $k$th-Order Finite Automaton . . . . . . 470--475
D. B. Jarvis The Effects of Interconnections on
High-Speed Logic Circuits . . . . . . . 476--487
Donald A. Pierre Optimization of Pulse and Digital
Circuits by Use of the Lagrange
Multiplier Technique . . . . . . . . . . 488--492
Yohan Cho A Method of Theoretical Analysis of
High-Speed Junction Diode Logic Circuits 492--502
W. G. Daly and
J. F. Kruy A High-Speed Arithmetic Unit Using
Tunnel Diodes . . . . . . . . . . . . . 503--511
M. J. Flynn and
D. S. Henderson Variable Field-Length Data Manipulation
in a Fixed Word-Length Memory . . . . . 512--516
Alvin A. Read A Dynamic Large Signal Model for a
Single-Domain Thin Magnetic Film
Inductor . . . . . . . . . . . . . . . . 517--521
Pier Giorgio Perotto A New Method for Automatic Character
Recognition . . . . . . . . . . . . . . 521--526
Amos Nathan Linear and Nonlinear Interpolators . . . 526--532
M. G. Isaac and
V. T. DeBuono Deterministic and Stochastic Response of
Linear Time Variable Systems . . . . . . 532--540
Don J. Nelson A Fundamental Error Theory for Analog
Computers . . . . . . . . . . . . . . . 541--550
Anonymous Correction . . . . . . . . . . . . . . . 550--550
David Mandelbaum Optimal Scheduling of Disk File Data
Transfers . . . . . . . . . . . . . . . 551--551
R. T. Chien and
R. J. Barbetta A Class of Simple Decoding Networks for
Marcus Matrix Switches . . . . . . . . . 551--553
Amarendra Mukhopadhyay Detection of Total or Partial Symmetry
of a Switching Function with the Use of
Decomposition Charts . . . . . . . . . . 553--557
Antonin Svoboda An Algorithm for Solving Boolean
Equations . . . . . . . . . . . . . . . 557--559
Michael A. Harrison The Number of Equivalence Classes of
Boolean Functions Under Groups
Containing Negation . . . . . . . . . . 559--561
Robert O. Winder Bounds on Threshold Gate Realizability 561--564
Hillel Weinstein Proposals for Ordered Sequential
Detection of Simultaneous Multiple
Responses . . . . . . . . . . . . . . . 564--567
S. B. Geller and
P. A. Mantek A 100 Megapulse per Second Binary
Counter with Impedance Steering . . . . 568--568
M. G. Harman A New Form of Cryotron Logical Circuitry 568--570
D. A. Pierre Terminal Properties of Toroidal Cores
with Circular Cross Sections . . . . . . 570--572
Paul W. Cooper Multivariate Extension of Univariate
Distributions . . . . . . . . . . . . . 572--573
Sanford M. Levy A Counter Example to an Assertion of
Jackson . . . . . . . . . . . . . . . . 573--573
D. D. Mccracken Contributors . . . . . . . . . . . . . . 574--576
R. C. Minnick Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 577--583
R. G. Brown R63-88 Equitable Distribution . . . . . 581--581
J. Feldman R63-89 On the Solution of an Information
Retrieval Problem . . . . . . . . . . . 581--581
R. E. Stearns R63-90 Sequence Generators, Graphs, and
Formal Languages . . . . . . . . . . . . 581--581
W. H. Highleyman R63-91 Automatic Reading Machine for
Telegraph Service . . . . . . . . . . . 581--582
T. C. Anderson R63-93 Multiple Integrals on a
Non-Repetitive Analog Computer . . . . . 582--582
Anonymous R63-92 On the Effectiveness of Receptors
in Recognition Systems . . . . . . . . . 582--582
R. E. Keller R63-94 Application of Hybrid Analog and
Digital Techniques in the Automatic Map
Compilation System . . . . . . . . . . . 582--583
L. L. Burns Abstracts of Current Computer Literature 585--596
Anonymous Abstracts of Current Computer Literature 585--599
C. J. Koester Subject Index . . . . . . . . . . . . . 597--599
T. Lentz Author Index . . . . . . . . . . . . . . 599--599
R. B. Banerji PTGEC News . . . . . . . . . . . . . . . 600--600
Anonymous PTGEC News . . . . . . . . . . . . . . . 600--601
J. B. Dennis AFIPS News . . . . . . . . . . . . . . . 600--601
Anonymous Notices . . . . . . . . . . . . . . . . 601--606
W. T. Lenno Notices . . . . . . . . . . . . . . . . 601--606
Anonymous Information for Authors . . . . . . . . 606--a
D. L. Slotnick The Computer System Issue . . . . . . . 607--608
L. Lukaszewicz Outline of the Logical Design of the
ZAM-41 Computer . . . . . . . . . . . . 609--612
Egbert Ulbrich Struktur und Arbeitsweise der
Telefunken-Digitalrechenanlage TR 4 . . 613--618
M. Lehman and
R. Eshed and
Z. Netter Sabrac --- A New Generation Serial
Computer . . . . . . . . . . . . . . . . 618--628
C. Gram and
O. Hestvik and
H. Isaksson and
P. T. Jacobsen and
J. Jensen and
P. Naur and
B. S. Petersen and
B. Svejgaard GIER --- A Danish Computer of Medium
Size . . . . . . . . . . . . . . . . . . 629--650
B. Langefors The D21 Data Processing System by
Svenska Aeroplan Aktiebolaget, Sweden 650--662
M. W. Allen and
T. Pearcey and
J. P. Penny and
G. A. Rose and
J. G. Sanderson CIRRUS, An Economical Multiprogram
Computer with Microprogram Control . . . 663--671
W. F. Miller and
R. Aschenbrenner The GUS Multicomputer System . . . . . . 671--676
Thomas B. Lewis Primary Processor and Data Storage
Equipment for the Orbiting Astronomical
Observatory . . . . . . . . . . . . . . 677--687
R. L. Alonso and
H. Blair-Smith and
A. L. Hopkins Some Aspects of the Logical Design of a
Control Computer: A Case Study . . . . . 687--697
H. Schorr and
N. E. Wiseman System Design of a Small, Fast Digital
Computer . . . . . . . . . . . . . . . . 698--706
Ronald L. Wigington A Machine Organization for a General
Purpose List Processor . . . . . . . . . 707--714
Hermann Schmid An Operational Hybrid Computing System
Provides Analog-Type Computation with
Digital Elements . . . . . . . . . . . . 715--732
G. B. Gerace Microprogrammed Control for Computing
Systems . . . . . . . . . . . . . . . . 733--747
G. Estrin and
B. Bussell and
R. Turn and
J. Bibb Parallel Processing in a Restructurable
Computer System . . . . . . . . . . . . 747--755
G. Estrin and
R. Turn Automatic Assignment of Computations in
a Variable Structure Computer System . . 755--773
J. Gregory and
R. McReynolds The SOLOMON Computer . . . . . . . . . . 774--781
Rodolfo Gonzalez A Multilayer Iterative Circuit Computer 781--790
Bruce H. McCormick The Illinois Pattern Recognition
Computer --- ILLIAC III . . . . . . . . 791--813
Morton Nadler An Analog-Digital Character Recognition
System . . . . . . . . . . . . . . . . . 814--821
H. Kazmierczak and
K. Steinbuch Adaptive Systems in Pattern Recognition 822--835
T. Sakai and
S. Doshita The Automatic Speech Recognition System
for Conversational Sound . . . . . . . . 835--846
K. Steinbuch and
U. A. W. Piske Learning Matrices and Their Applications 846--862
Walter I. Landauer The Balanced Tree and Its Utilization in
Information Retrieval . . . . . . . . . 863--871
P. A. Lord and
C. J. Tunis and
H. L. Witter A Delay-Line Push-Down List . . . . . . 872--874
W. T. Weeks Computer Simulation of the Electrical
Properties of Memory Arrays . . . . . . 874--887
K. Maling and
E. L. Allen A Computer Organization and Programming
System for Automated Maintenance . . . . 887--895
N. Metropolis and
R. L. Ashenhurst Basic Operations in an Unnormalized
Arithmetic System . . . . . . . . . . . 896--904
Antonin Svoboda Synthesis of Logical Systems of Given
Activity . . . . . . . . . . . . . . . . 904--910
Arthur Bridgman Comments on ``Analog Computer Simulation
of a Frequency Detector'' . . . . . . . 911--911
D. J. Anderson and
D. L. Dietmeyer A Magnetic Ternary Device . . . . . . . 911--914
Philip Kaszerman A Nonlinear-Summation Threshold Device 914--915
T. A. Kriz and
K. Ishii Directional Couplers as Microwave Logic 915--916
A. James Lincoln A Sequential Magnetic-Core Storage
System . . . . . . . . . . . . . . . . . 917--918
C. L. Liu Determination of the Final State of an
Automaton Whose Initial State Is Unknown 918--921
J. Sklansky and
K. R. Kaplan Transients in Markov Chains . . . . . . 921--922
T. R. Bashkow Contributors . . . . . . . . . . . . . . 923--930
M. Tainiter Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 931--936
C. M. Melas R63-104 Error Detection, Correction and
Control . . . . . . . . . . . . . . . . 935--935
S. S. Shaffer R63-105 Time Sharing on the
Ferranti-Packard FP6000 Computer System 935--935
T. R. Bashkow R63-106 The D 825 Automatic Operating
and Scheduling Program . . . . . . . . . 935--936
P. E. Wood R63-107 Ternary Threshold Logic . . . . 936--936
Anonymous Abstracts of Current Computer Literature 937--961
J. A. Brzozowski Abstracts of Current Computer Literature 937--961
Anonymous PTGEC News . . . . . . . . . . . . . . . 962--962
D. L. Epley PTGEC News . . . . . . . . . . . . . . . 962--962
Anonymous Notices . . . . . . . . . . . . . . . . 963--963
C. K. Chow Notices . . . . . . . . . . . . . . . . 963--963
Anonymous Membership in the Professional Technical
Group on Electronic Computers . . . . . 964--964
O. Firschein Membership in the Professional Technical
Group on Electronic Computers . . . . . 964--964
Anonymous IEEE Transactions on Electronic
Computers . . . . . . . . . . . . . . . 965--965--i
G. Kovatch Contents . . . . . . . . . . . . . . . . 965--974
Anonymous Information for Authors . . . . . . . . 965--j
B. Elspas and
R. A. Short A Bound on the Run Measure of Switching
Functions . . . . . . . . . . . . . . . 1--4
S. Amarel and
G. Cooke and
R. O. Winder Majority Gate Networks . . . . . . . . . 4--13
C. S. Wallace A Suggestion for a Fast Multiplier . . . 14--17
Michael Cooperman 300-Mc Tunnel-Diode Logic Circuits . . . 18--26
G. G. Pick and
S. B. Gray and
D. B. Brick The Solenoid Array --- A New Computer
Element . . . . . . . . . . . . . . . . 27--35
R. F. M. Thornley and
A. V. Brown and
A. J. Speth Electron Beam Recording of Digital
Information . . . . . . . . . . . . . . 36--40
Christopher J. Sheehan An Analog Computer Simulation of the
Restricted Three-Body Problem by
Automatic Scale-Changing Techniques . . 41--50
Keith W. Henderson Some Notes on the Walsh Functions . . . 50--52
Martin Cohn A Theorem on Linear Automata . . . . . . 52--53
Daniel C. Fielder On Shannon's Almost Uniform Distribution 53--54
Roger C. Lamson A Division Algorithm for a Digital
Differential Analyzer . . . . . . . . . 54--55
E. V. Krishnamurthy A Simple Algorithm for Evaluating
Positive Values of the Function $x^y$ 55--55
Amos Nathan Comments on ``A Method of Generating
Functions of Several Variables'' . . . . 55--56
Sigmund N. Porter A New Configuration for Faster Cryotron
Circuits . . . . . . . . . . . . . . . . 56--57
Donald B. Brick and
George G. Pick Microsecond Word-Recognition System . . 57--59
A. W. Lo Contributors . . . . . . . . . . . . . . 60--61
O. Firschein Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 62--65
A. S. Hoagland Abstracts of Current Computer Literature 67--78
Anonymous Abstracts of Current Computer Literature 67--80
K. H. Konkle Subject Index . . . . . . . . . . . . . 78--80
C. A. Renton Author Index . . . . . . . . . . . . . . 80--80
S. Amarel PTGEC News . . . . . . . . . . . . . . . 81--81
Anonymous PTGEC News . . . . . . . . . . . . . . . 81--81
Anonymous Notices . . . . . . . . . . . . . . . . 82--82
W. W. Peterson Notices . . . . . . . . . . . . . . . . 82--82
Anonymous Information for Authors . . . . . . . . 82--c
William M. Waite The Production of Completion Signals by
Asynchronous, Iterative Networks . . . . 83--86
F. Mileto and
G. Putzolu Average Values of Quantities Appearing
in Boolean Function Minimization . . . . 87--92
Roy D. Merrill Improving Digital Computer Performance
Using Residue Number Theory . . . . . . 93--101
Theodore R. Bashkow A Sequential Circuit for Algebraic
Statement Translation . . . . . . . . . 102--105
I. R. Butcher A Prewired Storage Unit . . . . . . . . 106--111
John E. Gillis A Technique for Achieving High Bit
Packing Density on Magnetic Tape . . . . 112--117
H. Freeman and
L. Garder Apictorial Jigsaw Puzzles: The Computer
Solution of a Problem in Pattern
Recognition . . . . . . . . . . . . . . 118--127
L. K. Wadhwa Simulation of Third Order Systems by a
Single Operational Amplifier . . . . . . 128--147
Fusachika Miyata Comment on ``Realization of Arbitrary
Logical Functions Using Majority
Elements'' . . . . . . . . . . . . . . . 148--148
S. Y. Levy and
R. O. Winder and
T. H. Mott A Note on Tributary Switching Networks 148--151
Paul E. Wood Hazards in Pulse Sequential Circuits . . 151--153
W. A. Beyer Uniqueness of Weighted Code
Representations, III . . . . . . . . . . 153--154
J. A. Brzozowski and
E. J. McCluskey About Signal Flow Graph Techniques for
Sequential Circuits . . . . . . . . . . 154--154
Orville Goering Radix Conversion in a Hexadecimal
Machine . . . . . . . . . . . . . . . . 154--155
Forrest Salter A Ternary Memory Element Using a Tunnel
Diode . . . . . . . . . . . . . . . . . 155--156
Harry J. Gray and
Henry Ruston On Techniques for Coping with the
Information Explosion . . . . . . . . . 156--156
D. Cowgill Logic Equations for a Built-In Square
Root Method . . . . . . . . . . . . . . 156--157
Joseph Otterman Comment on ``A Fundamental Error Theory
for Analog Computers'' . . . . . . . . . 157--157
Anonymous Contributors . . . . . . . . . . . . . . 158--159
G. Songster Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 160--164
S. A. Greibach R64-17 The Computer-Stored Thesaurus and
Its Use in Concept Processing . . . . . 163--163
H. J. Gray R64-18 Predicting Signal Degeneration
and Gate Compatibility in Logic Circuits 163--164
S. D. Bedrosian R64-19 (1) The Role of Checkout-Status
Control of Weapon Systems . . . . . . . 164--164
R. J. Preiss Abstracts of Current Computer Literature 165--176
Anonymous Abstracts of Current Computer Literature 165--179
H. Schmid Subject Index . . . . . . . . . . . . . 177--178
J. J. O'Donnell Author Index . . . . . . . . . . . . . . 179--179
Anonymous PTGEC News . . . . . . . . . . . . . . . 180--181
J. A. Brzozowski PTGEC News . . . . . . . . . . . . . . . 180--181
Anonymous Notices . . . . . . . . . . . . . . . . 181--182
F. H. Young Notices . . . . . . . . . . . . . . . . 181--182
Anonymous Information for Authors . . . . . . . . 182--a
Anonymous Keith W. Uncapher New Chairman of the
IEEE Computer Group . . . . . . . . . . 183--183
Keith W. Uncapher Message from the New Chairman . . . . . 184--184
Z. Kohavi New Officers and Members of the Board 185--192
Zvi Kohavi Secondary State Assignment for
Sequential Machines . . . . . . . . . . 193--203
R. H. Urbano On the Convergence and Ultimate
Reliability of Iterated Neural Nets . . 204--225
Arthur Gill Analysis of Linear Sequential Circuits
by Confluence Sets . . . . . . . . . . . 226--231
C. L. Sheng A Method for Testing and Realization of
Threshold Functions . . . . . . . . . . 232--239
C. L. Coates and
P. M. Lewis DONUT: A Threshold Gate Computer . . . . 240--247
R. M. Brown and
R. D. Jenks and
J. E. Stifle and
R. L. Trogdon The CSX-1 Computer . . . . . . . . . . . 247--250
J. R. Cox and
D. H. Glaeser A Quantising Encoder . . . . . . . . . . 250--254
Emil Hopner High-Density Binary Recording Using
Nonsaturation Techniques . . . . . . . . 255--261
C. J. Townsend and
P. E. Fox Cylindrical Film Memory Device
Characteristics . . . . . . . . . . . . 261--268
H. H. Harris and
W. D. Pricer Tunnel Diode Delay-Line Memory . . . . . 269--272
David Nitzan Flux Divison in a Saturable Multipath
Core . . . . . . . . . . . . . . . . . . 272--277
E. E. Newhall and
J. R. Perucca Exploitation of Initial Conditions to
Achieve Flux Gain and Nondestructive
Readout in Balanced Magnetic Circuits 278--284
P. E. Harris and
B. E. Simmons DC Accuracy in a Fast Boxcar Circuit Via
a Comparator . . . . . . . . . . . . . . 285--288
P. Kundu and
S. Banerji Transistorized Multiplier and Divider
and Its Applications . . . . . . . . . . 288--295
Alan E. Negrin Synthesis of Practical Three-Input
Majority Logic Networks . . . . . . . . 296--299
S. H. Cameron The Generation of Minimal Threshold Nets
by an Integer Program . . . . . . . . . 299--302
David Jacobsohn A Self-Organizing Drum . . . . . . . . . 302--302
Giorgio Coraluppi On Signal Deterioration in Digital
Computers . . . . . . . . . . . . . . . 303--303
Herbert D. Goldman Protecting Core Memory Circuits with
Error Correcting Cyclic Codes . . . . . 303--304
B. Lippel Negative-Bit-Weight Codes and Excess
Codes . . . . . . . . . . . . . . . . . 304--306
David B. Cooper Adaptive Pattern Recognition and Signal
Detection Using Stochastic Approximation 306--307
E. G. Homer and
W. Palmer Comparison of Computational Speeds of
Digital Differential Analyzers and
General Purpose Computers . . . . . . . 307--308
M. P. Beddoes and
C. A. T. Salama Series Connected Tunnel-Diode Multilevel
Register . . . . . . . . . . . . . . . . 308--309
L. P. Goodstein Tunnel-Diode Amplitude Comparator . . . 309--310
Keinosuke Fukunaga A Theory of Nonlinear Autonomous
Sequential Nets Using $z$ Transforms . . 310--312
J. V. Gaudiosi Proposed Magnetic Variation Analog
Computer for Use in Flight Simulators 312--312
T. A. Dolotta Contributors . . . . . . . . . . . . . . 313--315
A. Rosenfeld Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 316--322
R. L. Alonso R64-30 The Rope Memory --- A Permanent
Storage Device . . . . . . . . . . . . . 319--319
T. S. Crowther R64-31 A Dynamic Large Signal Model for
a Single-Domain Thin Magnetic Film
Inductor . . . . . . . . . . . . . . . . 319--319
J. F. Nolan R64-32 Generalized Multiprocessing and
Multiprogramming Systems . . . . . . . . 319--320
H. J. Kirshner R64-33 A Computer Driven Simulation
Environment for Air Traffic Control
Studies . . . . . . . . . . . . . . . . 320--320
L. Kleinrock R64-34 Analysis of Computing-Load
Assignment in a MultiProcessor Computer 320--320
B. Elspas R64-35 An Application of Coding Theory
to a File Address Problem . . . . . . . 321--321
S. Frankel R64-36 The Logical Organization of the
PB 440 Microprogrammable Computer . . . 321--321
M. L. Cramer R64-37 Some Principles and Circuit
Techniques for Controlling Machine Tools
from a Central Digital Computer . . . . 322--322
H. F. Lesh R64-38 The DES-1 --- A Real-Time Digital
Simulation Computer . . . . . . . . . . 322--322
O. Firschein Abstracts of Current Computer Literature 323--336
Anonymous Abstracts of Current Computer Literature 323--340
A. D. Wyner Subject Index . . . . . . . . . . . . . 337--339
D. Braverman Author Index . . . . . . . . . . . . . . 340--340
M. H. Lewin Computer Group News . . . . . . . . . . 341--341
Anonymous Computer Group News . . . . . . . . . . 341--342
J. I. Raffel Notices . . . . . . . . . . . . . . . . 341--342
Anonymous Information for Authors . . . . . . . . 342--a
Anonymous The Special Issue on Computer Languages
Editorial . . . . . . . . . . . . . . . 343--344
R. W. Floyd Summary of the Issue . . . . . . . . . . 345--345
Robert W. Floyd The Syntax of Programming Languages ---
A Survey . . . . . . . . . . . . . . . . 346--353
Peter S. Landweber Decision Problems of Phrase-Structure
Grammars . . . . . . . . . . . . . . . . 354--362
Russell A. Kirsch Computer Interpretation of English Text
and Picture Patterns . . . . . . . . . . 363--376
Michael Woodger Algol . . . . . . . . . . . . . . . . . 377--381
J. W. Backus and
W. P. Heising Fortran . . . . . . . . . . . . . . . . 382--385
J. E. Sammet and
E. R. Bond Introduction to FORMAC . . . . . . . . . 386--394
Daniel G. Bobrow and
Joseph Weizenbaum List Processing and Extension of
Language Facility by Embedding . . . . . 395--400
D. E. Knuth and
J. L. McNeley SOL --- A Symbolic Language for General
Purpose Systems Simulation . . . . . . . 401--408
Donald E. Knuth and
J. L. McNeley A Formal Definition of SOL . . . . . . . 409--414
Roger A. Gaskill A Versatile Problem-Oriented Language
for Engineers . . . . . . . . . . . . . 415--421
Roy M. Proctor A Logic Design Translator Experiment
Demonstrating Relationships of Language
to Systems and Logic Design . . . . . . 422--430
Mark B. Wells Aspects of Language Design for
Combinatorial Computing . . . . . . . . 431--438
H. P. Schlaeppi A Formal Language for Describing Machine
Logic, Timing, and Sequencing (LOTIS) 439--448
A. P. Mullery A Procedure-Oriented Machine Language 449--455
J. T. Carleton and
P. E. Lego and
R. M. Suarez A FORTRAN Extension to Facilitate
Proposal Preparation . . . . . . . . . . 456--462
R. E. Miller and
S. Winograd On the Number of Transitions Entering
the States of a Finite Automaton . . . . 463--464
C. Hugh Mays Effects of Adaptation Parameters on
Convergence Time and Tolerance for
Adaptive Threshold Elements . . . . . . 465--468
Barrett Hazeltine Construction of Irredundant Multilevel
Switching Functions . . . . . . . . . . 468--470
H. Mott and
C. C. Carroll Numerical Procedures for Boolean
Function Minimization . . . . . . . . . 470--470
T. C. Verster A Method to Increase the Accuracy of
Fast-Serial-Parallel Analog-to-Digital
Converters . . . . . . . . . . . . . . . 471--473
Wendell B. Sander ``Ratchet'' Circuits for Electronic
Analog Storage . . . . . . . . . . . . . 474--475
Granino A. Korn Enforcing Pontryagin's Maximum Principle
by Continuous Steepest Descent . . . . . 475--476
U. G. Gianola Contributors . . . . . . . . . . . . . . 477--479
E. D. Jones Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 480--486
F. C. Hennie R64-48 Reduction of Feedback Loops in
Sequential Circuits and Carry Leads in
Iterative Networks . . . . . . . . . . . 484--484
T. L. Booth R64-49 Computation with Finite Fields 484--485
S. Amarel R64-50 On the Analysis of Functional
Symmetry . . . . . . . . . . . . . . . . 485--485
R. A. Short R64-51 Determining the Best Ordering of
Variables in Cascade Switching Circuits 485--486
R. J. Lechner R64-52 On the Number of Classes of $[n,
k]$ Switching Networks . . . . . . . . . 486--486
B. A. Kaufman Abstracts of Current Computer Literature 487--498
Anonymous Abstracts of Current Computer Literature 487--501
B. Widrow Subject Index . . . . . . . . . . . . . 498--500
Yohan Cho Author Index . . . . . . . . . . . . . . 501--501
A. V. Pohm Computer Group News . . . . . . . . . . 502--502
Anonymous Computer Group News . . . . . . . . . . 502--503
A. Ralston Notices . . . . . . . . . . . . . . . . 502--503
Anonymous Information for Authors . . . . . . . . 503--d
Anonymous New Associate Editor for Logic and
Switching Theory . . . . . . . . . . . . 505--505
Richard M. Karp Some Techniques of State Assignment for
Synchronous Sequential Machines . . . . 507--518
Michael L. Dertouzos An Approach to Single-Threshold-Element
Synthesis . . . . . . . . . . . . . . . 519--528
C. S. Lorens Invertible Boolean Functions . . . . . . 529--541
Franco P. Preparata State-Logic Relations for Autonomous
Sequential Networks . . . . . . . . . . 542--548
T. A. Dolotta and
E. J. McCluskey The Coding of Internal States of
Sequential Circuits . . . . . . . . . . 549--562
J. J. Amodei High-Speed Adders and Comparators Using
Transistors and Tunnel Dioes . . . . . . 563--575
Harry J. Gray Fields in Strip-Lines for Film Memory
Application . . . . . . . . . . . . . . 576--580
O. Landsverk A Fast Coincident Current Magnetic Core
Memory . . . . . . . . . . . . . . . . . 580--585
C. N. Liu A Programmed Algorithm for Designing
Multifont Character Recognition Logics 586--593
Albert I. Talkin A Systematic Approach to Programming an
Analog Computer to Generate a Large
Class of Trajectories . . . . . . . . . 594--597
Walter J. Karplus A Hybrid Computer Technique for Treating
Nonlinear Partial Differential Equations 597--605
Eiichi Goto A Note on Logical Gain . . . . . . . . . 606--608
J. Santos and
H. Arango Base $3$ vs Base $2$ Synchronous
Arithmetic Units . . . . . . . . . . . . 608--609
P. W. Woo A Proposal for Input of Hand-Drawn
Information to a Digital System . . . . 609--611
J. I. Raffel and
T. S. Crowther A Proposal for an Associative Memory
Using Magnetic Films . . . . . . . . . . 611--611
Vijay K. Randery Study of a Parametron on an Analog
Computer . . . . . . . . . . . . . . . . 612--614
H. S. Miiller Resolving Multiple Responses in an
Associative Memory . . . . . . . . . . . 614--616
A. Thiney Rise and Fall Times of Transistors in
Switching Operation Regardless of the
Driving Source Impedance . . . . . . . . 616--620
M. Morris Mano Multilevel Diode Logic Circuits . . . . 620--623
J. Chernak and
C. F. Simone Simple Equivalent Circuits for a Step
Recovery Diode and a Switching
Transistor . . . . . . . . . . . . . . . 623--625
Fusachika Miyata An Extension of the Method of Cohn and
Lindaman . . . . . . . . . . . . . . . . 625--629
David Mandelbaum A Measure of Efficiency of Diagnostic
Tests Upon Sequential Logic . . . . . . 630--630
Michael A. Harrison A Remark on Uniform Distribution . . . . 630--631
Hikosaburo Ataka A Basic Theorem on Threshold Devices . . 631--631
K. K. Nambiar A Note on the Walsh Functions . . . . . 631--632
Roy Merrill Some Properties of Ternary Threshold
Logic . . . . . . . . . . . . . . . . . 632--635
Yates A. Keir Algebraic Properties of $3$-Valued
Compositions . . . . . . . . . . . . . . 635--639
John E. Frank The Role of Operational Simulation to
Communications System Design . . . . . . 640--640
Sergio T. Ribeiro Comments on Pulsed-Data Hybrid Computers 640--642
C. L. Liu $k$th-Order Finite Automaton . . . . . . 642--642
Anonymous Contributors . . . . . . . . . . . . . . 643--644
A. K. Scidmore Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 645--649
W. W. Bledsoe R64-61 The Automatic Speech Recognition
System for Conversational Sound . . . . 648--648
P. J. Stone R64-62 Computer Simulation of Human
Interaction in Small Groups . . . . . . 648--648
A. A. Grau R64-63 Application of Pushdown-Store
Machines . . . . . . . . . . . . . . . . 649--649
R. A. Kudlich R64-65 The GUS Multicomputer System . . 649--649
O. L. Macsorley R64-64 The Solomon Computer . . . . . . 649--649
E. G. Newman R64-66 Parallel Processing in a
Restructurable Computer System . . . . . 649--649
R. A. Gange Abstracts of Current Computer Literature 651--663
Anonymous Abstracts of Current Computer Literature 651--668
A. V. Pohm Subject Index . . . . . . . . . . . . . 663--667
J. V. Wait Author Index . . . . . . . . . . . . . . 668--668
Anonymous Computer Group News . . . . . . . . . . 669--669
W. F. Bauer Computer Group News . . . . . . . . . . 669--669
Anonymous Notices . . . . . . . . . . . . . . . . 670--672
G. Kovatch Notices . . . . . . . . . . . . . . . . 670--672
Anonymous Information for Authors . . . . . . . . 672--a
J. A. Brzozowski and
W. A. Davis On the Linearity of Autonomous
Sequential Machines . . . . . . . . . . 673--679
Irving J. Gabelman Properties and Transformations of Single
Threshold Element Functions . . . . . . 680--684
R. C. Minnick Cutpoint Cellular Logic . . . . . . . . 685--698
Y. Tohma Decompositions of Logical Functions
Using Majority Decision Elements . . . . 698--705
J. B. Tommerdahl and
A. C. Nelson and
K. K. Mazuy Mathematical Models for Predicting Pulse
Characteristics in Digital Logic Systems 705--710
J. B. Earnshaw Design for a Tunnel Diode-Transistor
Store with Nondestructive Read-Out of
Information . . . . . . . . . . . . . . 710--722
D. Seitzer Amplifier and Driver Circuits for Thin
Film Memories with $15$ Nanoseconds Read
Cycle Time . . . . . . . . . . . . . . . 722--729
Herbert Schorr Computer-Aided Digital System Design and
Analysis Using a Register Transfer
Language . . . . . . . . . . . . . . . . 730--737
M. Y. Hsiao and
K. Y. Sih Serial-to-Parallel Transformation of
Linear-Feedback Shift-Register Circuits 738--740
Shimon Even Rational Numbers and Regular Events . . 740--741
J. A. Brzozowski Regular Expressions from Sequential
Circuits . . . . . . . . . . . . . . . . 741--744
E. E. Nelson and
H. F. Wolf A Sampled-Data Analog of Neuron
Properties . . . . . . . . . . . . . . . 744--745
R. Y. Chao A Digital Decoding Technique . . . . . . 745--746
B. Wald and
F. A. Polknghorn Simple Instructions Which Enhance the
Error Control Capabilities of a
Programmed Communications Processor . . 747--748
R. Narasimhan and
J. P. Fornango Some Further Experiments in the Parallel
Processing of Pictures . . . . . . . . . 748--750
Richard M. Brown On-Line Computer Recognition of
Handprinted Characters . . . . . . . . . 750--752
G. K. Aggarwal Simulation of Third-Order Systems by a
Single Operational Amplifier . . . . . . 752--752
Nicholas B. Kurek Transistor Equivalent Circuit in
Operational Amplifier Configuration . . 752--753
D. Loev ``Uniform-Access'' Time --- A Needed
Concept . . . . . . . . . . . . . . . . 753--753
R. H. Wilkinson On the Number of Regions in Input Domain
of a Free Distributive Lattice . . . . . 753--754
D. Jacobsohn A Suggestion for a Fast Multiplier . . . 754--754
S. Winograd Contributors . . . . . . . . . . . . . . 755--756
C. V. Srinivasan Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 757--762
M. A. Fischler R64-77 Apictorial Jigsaw Puzzles: The
Computer Solution of a Problem in Pattem
Recognition . . . . . . . . . . . . . . 760--760
D. J. Nelson R64-76 A Hybrid Analog-Digital Parameter
Optimizer for Astrac II . . . . . . . . 760--760
C. V. Srinivasan R64-78 Interwoven Redundant Logic . . . 760--761
J. F. Kruy R64-79 Tunnel Diode Storage System with
Non-Destructive Read-Out . . . . . . . . 761--761
A. Gabor R64-80 Signal-Processing for Increased
Bit Densities in Digital Magnetic
Recording . . . . . . . . . . . . . . . 761--762
W. N. Carr R64-81 300-Mc Tunnel-Diode Logic
Circuits . . . . . . . . . . . . . . . . 762--762
Anonymous Abstracts of Current Computer Literature 763--791
C. L. Coates Abstracts of Current Computer Literature 763--791
J. P. Anderson Computer Group News . . . . . . . . . . 792--792
Anonymous Computer Group News . . . . . . . . . . 792--792
S. A. Greibach Notices . . . . . . . . . . . . . . . . 792--792
Anonymous Index Author . . . . . . . . . . . . . . 793--794--j
E. H. Bareiss IEEE Transactions on Electronic
Computers . . . . . . . . . . . . . . . 793--803
Anonymous Information for Authors . . . . . . . . 794--k
Anonymous IEEE Computer Group Constitution and
Bylaws Preface . . . . . . . . . . . . . 1--1
C. L. Sheng Computer Group of The Institute of
Electrical and Electronics Engineers,
Inc. . . . . . . . . . . . . . . . . . . 2--6
M. Yoeli and
G. Rosenfeld A New Reader Service --- Publication of
Informational Retrieval Catalog Cards 7--8
C. L. Sheng A Graphical Interpretation of
Realization of Symmetric Boolean
Functions with Threshold Logic Elements 8--18
M. Yoeli and
G. Rosenfeld Logical Design of Ternary Switching
Circuits . . . . . . . . . . . . . . . . 19--29
R. H. S. Riordan and
R. R. A. Morton The Use of Analog Techniques in Binary
Arithmetic Units . . . . . . . . . . . . 29--35
Charles P. Womack Schmoo Plot Analysis of
Coincident-Current Memory Systems . . . 36--44
K. Fukunaga and
T. Ito A Design Theory of Recognition Functions
in Self-Organizing Systems . . . . . . . 44--52
Arthur Hausner The Solution of Lagrange's Equations by
Analog Computation . . . . . . . . . . . 53--61
R. E. Burke and
J. G. Van Bosse Correction . . . . . . . . . . . . . . . 61--61
C. Hugh Mays The Relationship of Algorithms Used with
Adjustable Threshold Elements to
Differential Equations . . . . . . . . . 62--63
R. E. Burke and
J. G. van Bosse NAND--AND Circuits . . . . . . . . . . . 63--65
C. Hugh Mays The Boundary Matrix of Threshold
Functions . . . . . . . . . . . . . . . 65--66
C. K. Chow Statistical Independence and Threshold
Functions . . . . . . . . . . . . . . . 66--68
J. E. Olivares Synthesis of Nonconstant Weight Binary
Codes for Minimum Diode Counters . . . . 69--72
R. S. Gaines and
C. V. Lee An Improved Cell Memory . . . . . . . . 72--75
T. A. Kriz and
K. Ishii Microwave Readout of Ferrite Memory
Storage . . . . . . . . . . . . . . . . 75--76
Sundaram Seshu On an Improved Diagnosis Program . . . . 76--79
R. A. Smith Minimal Three-Variable NOR and NAND
Logic Circuits . . . . . . . . . . . . . 79--81
Richard M. Brown An Experimental Study of an On-Line
Man-Computer System . . . . . . . . . . 82--85
W. H. Specker A Class of Algorithms for $\ln x$, $\exp
x$, $\sin x$, $\cos x$, $\tan^{-1} x$,
and $\cot^{-1} x$ . . . . . . . . . . . 85--86
S. Winograd Contributors . . . . . . . . . . . . . . 87--88
S. Seshu Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 89--94
G. A. Bekey R65-11 Methods for Solving Engineering
Problems Using Analog Computers . . . . 92--93
B. W. Arden R65-12 Bounded Context Translation . . . 93--93
G. Salton R65-13 Natural Language and the Computer 93--94
D. B. Armstrong R65-14 Interwoven Redundant Logic . . . 94--94
J. J. Donegan R65-15 The 4102-S Space Track Program 94--94
A. J. Nichols Abstracts of Current Computer Literature 95--106
Anonymous Abstracts of Current Computer Literature 95--109
W. H. Pierce Subject Index . . . . . . . . . . . . . 106--109
R. L. Mattson Author Index . . . . . . . . . . . . . . 109--109
Anonymous Computer Group News . . . . . . . . . . 110--117
D. M. Ward Computer Group News . . . . . . . . . . 110--117
D. Stover Information about the Society . . . . . 118--119
Anonymous Information about the Society . . . . . 119--119--b
Anonymous Information for Authors . . . . . . . . 119--f
Anonymous New Associate Editor for Analog and
Hybrid Computers . . . . . . . . . . . . 123--123
Saburo Muroga Generation and Asymmetry of Self-Dual
Threshold Functions . . . . . . . . . . 125--136
Saburo Muroga Lower Bounds of the Number of Threshold
Functions and a Maximum Weight . . . . . 136--148
J. A. Brzozowski Regular Expressions for Linear
Sequential Circuits . . . . . . . . . . 148--156
H. H. Loomis Completeness of Sets of Delayed-Logic
Devices . . . . . . . . . . . . . . . . 157--172
H. H. Loomis and
R. H. Wyman On Complete Sets of Logic Primitives . . 173--174
Sheldon B. Akers A Diagrammatic Approach to Multilevel
Logic Synthesis . . . . . . . . . . . . 174--181
Gernot Metze Minimal Square Rooting . . . . . . . . . 181--185
B. A. Crane and
J. A. Githens Bulk Processing in Distributed Logic
Memory . . . . . . . . . . . . . . . . . 186--196
Charles J. Peters A Magnetically Scanned Magnetic Tape
Transducer . . . . . . . . . . . . . . . 196--203
Hugh M. Sierra Linear, Passive, Matched Filter for
Digital Magnetic Recording . . . . . . . 204--209
Frank N. Marzocco Computer Recognition of Handwritten
First Names . . . . . . . . . . . . . . 210--217
C. P. Gilbert and
B. J. J. McHugh Economical Circuits for the Analog
Solution of Algebraic Equations . . . . 217--229
J. J. Vidal and
S. M. Bawin Frequency Analysis of Truncation Errors
in RC Networks . . . . . . . . . . . . . 229--233
S. K. Chan and
E. F. Kurtz On Using an Analog Computer to Study
Hydrodynamic Stability . . . . . . . . . 233--238
Charles F. Hepner Improved Methods of Simulating Time
Delays . . . . . . . . . . . . . . . . . 239--243
Amos Nathan The Cascade Multiplier . . . . . . . . . 243--247
S. K. Chan and
E. F. Kurtz Correction . . . . . . . . . . . . . . . 247--247
J. Santos and
H. Arango and
M. Pascual A Ternary Storage Element Using a
Conventional Ferrite Core . . . . . . . 248--248
B. Scheff Using a Decision-Table Structure as the
Input Language Format for Programming
Automatic Test Equipment Systems . . . . 248--250
K. R. Kaplan and
R. O. Winder Chebyshev Approximation and Threshold
Functions . . . . . . . . . . . . . . . 250--252
R. O. Winder Properties of Threshold Functions . . . 252--254
Earl E. Gose A Synthesis Technique for Networks
Consisting of Logical Functions Feeding
a Linear Summation Element . . . . . . . 254--256
J. E. Price Counting with Majority-Logic Networks 256--260
R. W. Hamming and
W. L. Mammel A Note on the Location of the Binary
Point in a Computing Machine . . . . . . 260--261
D. W. Davies Longest ``Separated'' Paths and Loops in
an $N$ Cube . . . . . . . . . . . . . . 261--261
I. S. Reed Some Remarks on State Reduction of
Asynchronous Circuits by the
Paull--Unger Method . . . . . . . . . . 262--265
Stuart B. Lerner Hazard Correction in Asynchronous
Sequential Circuits . . . . . . . . . . 265--267
R. W. Ahrons Calculations of Speed of Ladder Network
for Superconductive Associative Memories 267--270
M. V. Wilkes Slave Memories and Dynamic Storage
Allocation . . . . . . . . . . . . . . . 270--271
S. B. Lerner Contributors . . . . . . . . . . . . . . 272--274
R. W. Ahrons Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 275--280
C. J. Frank and
A. F. Kaupe R65-21 GIER --- A Danish Computer of
Medium Size . . . . . . . . . . . . . . 277--277
H. L. Garner R65-22 Improving Digital Computer
Performance Using Residue Number Theory 277--277
J. E. Sammet R65-23 Aspects of Language Design for
Combinatorial Computing . . . . . . . . 277--278
D. G. Bobrow R65-25 Training a Computer to Assign
Descriptors to Documents: Experiments in
Automatic Indexing . . . . . . . . . . . 278--278
J. G. Herriot R65-26 ALGOL . . . . . . . . . . . . . . 278--278
N. Wirth R65-24 Introduction to FORMAC . . . . . 278--278
J. E. Murphy R65-27 The Data Processing System
Simulator (DPSS) (SP-1299/000/01) . . . 278--279
P. Mermelstein R65-27 Real Time Recognition of
Hand-Drawn Characters . . . . . . . . . 279--279
O. Firschein R65-29 A Computer Program Which
'Understands' . . . . . . . . . . . . . 279--280
P. M. Lewis R65-30 Comments on Learning and Adaptive
Machines for Pattern Recognition . . . . 280--280
M. V. Wilkes Abstracts of Current Computer Literature 281--293
Anonymous Abstracts of Current Computer Literature 281--298
Anonymous Author Index . . . . . . . . . . . . . . 294--294
R. O. Winder Subject Index . . . . . . . . . . . . . 294--298
Anonymous Computer Group News . . . . . . . . . . 299--306
W. D. Frazer Computer Group News . . . . . . . . . . 299--306
Anonymous Information about the Society . . . . . 307--307--f
R. E. Stearns Information about the Society . . . . . 307--313
Anonymous Information for Authors . . . . . . . . 307--h
R. O. Winder Enumeration of Seven-Argument Threshold
Functions . . . . . . . . . . . . . . . 315--325
Thomas M. Cover Geometrical and Statistical Properties
of Systems of Linear Inequalities with
Applications in Pattern Recognition . . 326--334
D. M. Y. Chang and
T. H. Mott Computing Irredundant Normal Forms from
Abbreviated Presence Functions . . . . . 335--342
A. J. Nichols and
A. J. Bernstein State Assignments in Combinational
Networks . . . . . . . . . . . . . . . . 343--349
A. Grasselli and
F. Luccio A Method for Minimizing the Number of
Internal States in Incompletely
Specified Sequential Networks . . . . . 350--359
Roy L. Russo Synthesis of Error-Tolerant Counters
Using Minimum Distance Three State
Assignments . . . . . . . . . . . . . . 359--366
M. Cohn and
S. Even Identification and Minimization of
Linear Machines . . . . . . . . . . . . 367--376
James H. Pugsley Sequential Functions and Linear
Sequential Machines . . . . . . . . . . 376--382
J. Goldberg and
R. A. Short Antiparallel Control Logic . . . . . . . 383--393
A. J. Atrubin A One-Dimensional Real-Time Iterative
Multiplier . . . . . . . . . . . . . . . 394--399
H. C. Brearley ILLIAC II --- A Short Description and
Annotated Bibliography . . . . . . . . . 399--403
M. S. Zucker LOCS: An EDP Machine Logic and Control
Simulator . . . . . . . . . . . . . . . 403--416
Yaohan Chu Direct Execution of Programs in Floating
Code by Address Interpretation . . . . . 417--422
H. Mott and
C. C. Carroll A Versatile Comparator for Encoding
Devices . . . . . . . . . . . . . . . . 423--427
M. H. Lewin and
H. R. Beelitz and
J. Guarracini Fixed Resistor-Card Memory . . . . . . . 428--434
Herbert A. Glucksman A Parapropagation Pattern Classifier . . 434--443
A. I. Rubin and
G. F. Graber Acoustic Ray Tracing on the
General-Purpose Electronic-Analog
Computer . . . . . . . . . . . . . . . . 443--455
Robert M. Deiters Optimum Design of a Diode Squarer by
Applying the Criterion of Square Root of
the Integral of Per Cent Error Squared 456--463
Arthur Gill On the Bound to the Memory of a
Sequential Machine . . . . . . . . . . . 464--466
Gregory J. Chaitin An Improvement on a Theorem of E. F.
Moore . . . . . . . . . . . . . . . . . 466--467
S. S. Yau Autonomous Clocks in Sequential Machines 467--472
Stephen H. Unger Flow Table Simplification-Some Useful
Aids . . . . . . . . . . . . . . . . . . 472--475
Otakar A. Horna A Geometric Synthesis Method of
Three-Input Majority Logic Networks . . 475--481
H. Ishida and
R. M. Stewart A Learning Network Using Adaptive
Threshold Elements . . . . . . . . . . . 481--485
James F. Gimpel A Method of Producing a Boolean Function
Having an Arbitrarily Prescribed Prime
Implicant Table . . . . . . . . . . . . 485--488
Sheldon B. Akers On the Construction of $(d, k)$ Graphs 488--488
Robert F. Rosin A Special Purpose Computer for Solution
of Partial Differential Equations and
Other Iterative Algorithms . . . . . . . 488--490
G. K. Aggarwal Effect of Finite Gain on One-Amplifier
Circuits . . . . . . . . . . . . . . . . 491--492
Walter Del Picchia New Type of Transistorized Digital
Analog Converter . . . . . . . . . . . . 492--492
C. L. Sheng Contributors . . . . . . . . . . . . . . 493--496
A. Gill Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 497--502
N. Metropolis Review: \em R65-35 Binary-Compatible
Signed-Digit Arithmetic by Algirdas
Avisienis . . . . . . . . . . . . . . . 499--499
G. A. Korn R65-41 Progress of Hybrid Computation at
United Aircraft Research Laboratories 501--501
A. I. Rubin R65-42 A Hybrid Computer for Adaptive
Nonlinear Process Identification . . . . 501--501
T. Lentz R65-43 A Semi-Permanent Memory Utilizing
Correlation Addressing . . . . . . . . . 501--502
R. A. Gaskill R65-44 PACTOLUS --- A Digital Analog
Simulator Program for the IBM 1620 . . . 502--502
D. A. Meier R65-45 A 105-Bit High-Speed Ferrite
Memory System-Design and Operation . . . 502--502
S. S. Shaffer Abstracts of Current Computer Literature 503--516
Anonymous Abstracts of Current Computer Literature 503--521
S. W. Miller Author Index . . . . . . . . . . . . . . 517--517
N. Metropolis Subject Index . . . . . . . . . . . . . 517--521
Anonymous Computer Group News . . . . . . . . . . 522--522
E. R. Byrne Notices . . . . . . . . . . . . . . . . 522--522
J. B. Dennis Computer Group News . . . . . . . . . . 522--522
Anonymous Information about the Society . . . . . 523--531
R. B. Banerji Information about the Society . . . . . 523--531
Anonymous Information for Authors . . . . . . . . 531--d
Anonymous New Editor-in-Chief . . . . . . . . . . 533--533
James F. Gimpel A Reduction Technique for Prime
Implicant Tables . . . . . . . . . . . . 535--541
F. Mileto and
G. Putzolu Average Values of Quantities Appearing
in Multiple Output Boolean Minimization 542--552
J. E. Hopcroft and
R. L. Mattson Synthesis of Minimal Threshold Logic
Networks . . . . . . . . . . . . . . . . 552--560
Shimon Even On Information Lossless Automata of
Finite Order . . . . . . . . . . . . . . 561--569
T. C. Bartee and
D. J. Chapman Design of an Accumulator for a General
Purpose Computer . . . . . . . . . . . . 570--574
D. W. Fife and
J. L. Smith Transmission Capacity of Disk Storage
Systems with Concurrent Arm Positioning 575--582
Harold K. Knudsen The Scaling of Digital Differential
Analyzers . . . . . . . . . . . . . . . 583--590
W. Bongenaar and
N. C. de Troye Worst-Case Considerations in Designing
Logical Circuits . . . . . . . . . . . . 590--599
Yaohan Chu A Destructive-Readout Associative Memory 600--605
Guillermo Gonzalez Delay Approximations for Correlation
Measurements Using Analog Computers . . 606--617
Walter W. Wierwille Experimental Study of a New Method of
Time Delay for Analog Computers . . . . 617--623
Irving J. Gabelman An Algorithm for Threshold Element
Analysis . . . . . . . . . . . . . . . . 623--625
Ming-Tsan Liu On the Dual-Monotonicity of Threshold
Functions . . . . . . . . . . . . . . . 625--627
Rocco H. Urbano Matrix Criteria for Arbitrary
Reliability in Iterated Neural Nets . . 627--629
J. A. Brzozowski Some Problems in Relay Circuit Design 630--634
Shimon Even Comments on the Minimization of
Stochastic Machines . . . . . . . . . . 634--637
Gordon A. Rose ``Light-Pen'' Facilities for Direct View
Storage Tubes --- An Economical Solution
for Multiple Man-Machine Communication 637--639
A. R. Martin and
A. B. Rosenstein A Shiftrix for High-Speed Multiplication 639--643
Otakar A. Horna Figure of Merit of Electronic Switching
Devices . . . . . . . . . . . . . . . . 643--646
H. Mott and
C. C. Carroll A Functional Counter . . . . . . . . . . 646--647
George L. Powers Comment on NOR--NAND Synthesis . . . . . 648--648
Anonymous Contributors . . . . . . . . . . . . . . 648--650
Anonymous Abstracts of Current Computer Literature 651--662
Z. Kohavi Author Index . . . . . . . . . . . . . . 663--663
D. R. Haring Subject Index . . . . . . . . . . . . . 663--666
S. B. Akers Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 667--671
C. D. Olson R65-53 Associative Memory System
Implementation and Characteristics . . . 669--670
D. Hammel R65-54 The Logic of Computer Arithmetic 670--670
W. C. Mcgee R65-55 UNISIM --- A Simulation Program
for Communications Networks . . . . . . 670--670
C. W. Gear R65-56 IBM System 360 Engineering . . . 670--671
W. H. Highleyman R65-58 A System for Automatic
Recognition of Handwritten Words . . . . 671--671
E. S. Schwartz R65-57 CPSS --- A Common Programming
Support System . . . . . . . . . . . . . 671--671
Anonymous Computer Group News . . . . . . . . . . 672--675
M. L. Dertouzos Computer Group News . . . . . . . . . . 672--675
Anonymous Information about the Society . . . . . 677--677--d
W. M. Waite Information about the Society . . . . . 677--681
Anonymous Information for Authors . . . . . . . . 677--h
Richard I. Tanaka In Appreciation . . . . . . . . . . . . 682--682
Y-C. Ho and
R. L. Kashyap An Algorithm for Linear Inequalities and
its Applications . . . . . . . . . . . . 683--688
A. J. Nichols Minimal Shift-Register Realizations of
Sequential Machines . . . . . . . . . . 688--700
D. T. Ellis A Synthesis of Combinational Logic with
NAND or NOR Elements . . . . . . . . . . 701--705
Herbert Y. Chang An Algorithm for Selecting an Optimum
Set of Diagnostic Tests . . . . . . . . 706--711
Karyl J. Gurzi Estimates for Best Placement of Voters
in a Triplicated Logic Network . . . . . 711--717
Robert H. Whigham A Fast Analog Comparison for Hybrid
Computation . . . . . . . . . . . . . . 717--719
Karl S. Menger Characterization and Cardinality of
Universal Functions . . . . . . . . . . 720--721
L. M. Maxwell and
E. E. Olander A Method of Determining the Number of
Vertices Contained in the SC Network
Corresponding to a Given SC Transmission
Function . . . . . . . . . . . . . . . . 721--723
C. V. Ramamoorthy Connectivity Considerations of Graphs
Representing Discrete Sequential Systems 724--727
Barrett Hazeltine Encoding of Asynchronous Sequential
Circuits . . . . . . . . . . . . . . . . 727--729
F. R. Frola A Note on the Problem of Classifying
Vertices of the $n$ Cube into $m$
Categories . . . . . . . . . . . . . . . 729--730
V. Varshavsky and
B. Ovsievich Networks Composed of Ternary Majority
Elements . . . . . . . . . . . . . . . . 730--733
I. Brcic ``Ideally Fast'' Decimal Counters with
Bistables . . . . . . . . . . . . . . . 733--737
K. Steinbuch and
B. Widrow A Critical Comparison of Two Kinds of
Adaptive Classification Networks . . . . 737--740
Peter Fellgett Logical Design of Analog-to-Digital
Converters . . . . . . . . . . . . . . . 740--741
Arthur Hausner Letter to the Editor . . . . . . . . . . 741--741
R. W. Hamming Contributors . . . . . . . . . . . . . . 742--742
L. N. Carling Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 743--746
W. J. Dunnet R65-69 Mathematical Models for
Predicting Pulse Characteristics in
Digital Logic Systems . . . . . . . . . 745--746
M. Nadler R65-70 The Computer Recognition of
Handwritten First Names . . . . . . . . 746--746
A. I. Kaz'Min Abstracts of Current Computer Literature 747--757
Anonymous Abstracts of Current Computer Literature 747--761
N. N. Mikhailov Subject Index . . . . . . . . . . . . . 758--761
N. N. Mikhailov Author Index . . . . . . . . . . . . . . 761--761
Anonymous Computer Group News . . . . . . . . . . 762--762
G. S. Glinski Notices . . . . . . . . . . . . . . . . 762--762
R. Tarjan Computer Group News . . . . . . . . . . 762--762
Anonymous Information about the Society . . . . . 763--763--b
M. Lovin-Roceric Information about the Society . . . . . 763--764
Anonymous Information for Authors . . . . . . . . 763--f
Anonymous Call for Papers . . . . . . . . . . . . 767--767
Rocco H. Urbano Some New Results on the Convergence,
Oscillation, and Reliability of
Polyfunctional Nets . . . . . . . . . . 769--781
Juris Hartmanis Two Tests for the Linearity of
Sequential Machines . . . . . . . . . . 781--786
Florin S. Stanciulescu Sequential Logic and its Application to
the Synthesis of Finite Automata . . . . 786--791
Franco P. Preparata On the Realizability of Special Classes
of Autonomous Sequential Networks . . . 791--797
Anonymous Correction . . . . . . . . . . . . . . . 797--797
C. L. Sheng Compound Synthesis of Threshold-Logic
Network for the Realization of General
Boolean Functions . . . . . . . . . . . 798--814
Michael Yoeli A Group-Theoretical Approach to Two-Rail
Cascades . . . . . . . . . . . . . . . . 815--822
Frank M. Brown Code Transformation in Sequential
Machines . . . . . . . . . . . . . . . . 822--829
Angelo R. Meo On the Determination of the ps Maximal
Implicants of a Switching Function . . . 830--840
Ronald E. Prather On Tree Circuits . . . . . . . . . . . . 841--851
H. S. Stone and
A. J. Korenjak Canonical Form and Synthesis of Cellular
Cascades . . . . . . . . . . . . . . . . 852--862
M. Combet and
H. Van Zonneveld and
L. Verbeek Computation of the Base Two Logarithm of
Binary Numbers . . . . . . . . . . . . . 863--867
D. L. Dietmeyer and
P. R. Schneider A Computer-Oriented Factoring Algorithm
for NOR Logic Design . . . . . . . . . . 868--874
Frank C. Yao Interconnection and Noise Immunity of
Circuitry in Digital Computers . . . . . 875--880
George W. Taylor Utilization of the $t*$ Partial
Switching Properties of Ferroelectrics
in Memory Devices . . . . . . . . . . . 881--886
S. P. Bingulac and
E. A. Humo Analog Computer Generation of Bessel
Functions of Arbitrary Order . . . . . . 886--889
R. Tomovic and
N. S. Parezanovic and
M. J. Merritt Sensitivity of Dynamic Systems to
Parameters Which Increase the Order of
Mathematical Models . . . . . . . . . . 890--897
Arthur Hausner Analog Computer Techniques for Problems
in Complex Variables . . . . . . . . . . 898--908
Walter W. Wierwille A Theory and Method for Correlation
Analysis of Nonstationary Signals . . . 909--919
S. R. Das and
A. K. Choudhury Maxterm Type Expressions of Switching
Functions and Their Prime Implicants . . 920--923
C. L. Sheng Detection of Totally Symmetric Boolean
Functions . . . . . . . . . . . . . . . 924--926
S. Yajima and
T. Ibaraki A Lower Bound of the Number of Threshold
Functions . . . . . . . . . . . . . . . 926--929
Sergiu Rudeanu On Tohma's Decompositions of Logical
Functions . . . . . . . . . . . . . . . 929--931
Kenneth E. Batcher On the Number of Stable States in a NOR
Network . . . . . . . . . . . . . . . . 931--932
Zvi Kohavi Reduction of Output Dependency in
Sequential Machines . . . . . . . . . . 932--934
C. E. Kiessling and
C. J. Tunis Linearly Separable Codes for Adaptive
Threshold Networks . . . . . . . . . . . 935--936
Paul E. Wood Digital Differential Analyzers with
Arbitrary Stored Interconnections . . . 936--941
Fred W. Smith Coding Analog Variables for Threshold
Logic Discrimination . . . . . . . . . . 941--943
P. Spiegel and
R. L. Luce A Nanosecond Monolithic TTL Gate . . . . 944--946
H. R. Eckes A Fast Mode-Control Switch for Iterative
Differential Analyzers . . . . . . . . . 946--950
Melvin A. Breuer Implementation of Threshold Nets by
Integer Linear Programming . . . . . . . 950--952
F. L. Wang An Isomorphic Notation of Switching
Circuits . . . . . . . . . . . . . . . . 952--954
Iwao Toda The Tree Set of a Linear Machine . . . . 954--957
Pierre Lavallee Nonstable Cycle and Level Sets for
Linear Sequential Machines . . . . . . . 957--959
Pierre Lavallee Some New Group Theoretic Properties of
Singular Linear Sequential Machines . . 959--961
J. Sklansky and
A. J. Korenjak and
H. S. Stone Canonical Tributary Networks . . . . . . 961--963
Lucio Tavernini The Automatic Sequencing of
Block-Operators in the Digital
Simulation of Analog and Analog-Hybrid
Computers . . . . . . . . . . . . . . . 963--965
Anonymous Contributors . . . . . . . . . . . . . . 966--968
Anonymous Abstracts of Current Computer Literature 969--980
A. Bernstein and
J. Hopcroft Annual Cumulative Subject Index . . . . 981--1000
A. K. Choudhury Annual Cumulative Author Index . . . . . 1000--1002
J. R. Ashley Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 1003--1007
H. K. Knudsen R65-80 Application of State Variable
Techniques in Analog Computer
Programming . . . . . . . . . . . . . . 1005--1006
J. B. Lewis R65-81 The Philosophy and the Result:
Comcor's Ci-5000 Hybrid Computing System 1006--1006
A. B. Clymer R65-82 The SIOUX System and Hybrid Block
Diagrams . . . . . . . . . . . . . . . . 1006--1007
R. Marczynski R65-83 A Magnetically Scanned Magnetic
Tape Transducer . . . . . . . . . . . . 1007--1007
Anonymous Computer Group News . . . . . . . . . . 1008--1008
N. L. Daggett Computer Group News . . . . . . . . . . 1008--1008
R. C. Daley Notices . . . . . . . . . . . . . . . . 1008--1008
Anonymous Information about the Society . . . . . 1009--1017
J. J. Donegan Information about the Society . . . . . 1009--1017
Anonymous Information for Authors . . . . . . . . 1017--n
Anonymous IEEE Transactions on Electronic
Computers Annual Index 1965 Volume EC-14 1017--b-1017--m
H. Sackman Annual Index 1965 . . . . . . . . . . . 1019--1030
Anonymous Editorial . . . . . . . . . . . . . . . 1--1
R. E. Prather New Associate Editors and Reviews Editor 2--2
R. E. Prather Three Variable Multiple Output Tree
Circuits . . . . . . . . . . . . . . . . 3--13
H. C. Torng An Approach for the Realization of
Linearly-Separable Switching Functions 14--20
W. A. Davis and
J. A. Brzozowski On the Linearity of Sequential Machines 21--29
P. E. Danielsson Boolean Memories . . . . . . . . . . . . 29--35
F. C. Hennie On-Line Turing Machine Computations . . 35--44
Donald R. Haring Multi-Threshold Threshold Elements . . . 45--65
D. B. Armstrong On Finding a Nearly Minimal Set of Fault
Detection Tests for Combinational Logic
Nets . . . . . . . . . . . . . . . . . . 66--73
R. M. Janoski and
R. L. Schaefer and
J. J. Skiles COBLOC --- A Program for All-Digital
Simulation of a Hybrid Computer . . . . 74--82
H. Hellerman Parallel Processing of Algebraic
Expressions . . . . . . . . . . . . . . 82--91
R. Casey and
G. Nagy Recognition of Printed Chinese
Characters . . . . . . . . . . . . . . . 91--101
A. Friedes Corrections . . . . . . . . . . . . . . 101--101
Albert Friedes Critical Pairs and Set Systems . . . . . 102--104
Daniel J. Rosenkrantz Synchronizing Sequences for Incompletely
Specified Flow Tables . . . . . . . . . 104--105
J. Santos and
H. Arango and
F. Lorenzo Threshold Synthesis of Ternary Digital
Systems . . . . . . . . . . . . . . . . 105--107
Arthur Gill On the Series-to-Parallel Transformation
of Linear Sequential Circuits . . . . . 107--108
Ivor Catt Time Loss Through Gating of Asynchronous
Logic Signal Pulses . . . . . . . . . . 108--111
H. Frank and
S. S. Yau Improving Reliability of a Sequential
Machine by Error-Correcting State
Assignments . . . . . . . . . . . . . . 111--113
Charles R. Kime An Organization for Checking Experiments
on Sequential Circuits . . . . . . . . . 113--115
George Sethares Closed Sets of Boolean Functions and the
Reliability Problem for Polyfunctional
Nets . . . . . . . . . . . . . . . . . . 115--117
Wolfgang Hilberg Simultaneous Multiple Response in
Associative Memories and Readout of the
Detector Matrix . . . . . . . . . . . . 117--118
M. W. Allen and
R. J. Potter A Hardware Device for Generalized
Mapping Functions . . . . . . . . . . . 118--120
R. E. King A Dual Amplifier Differentiator . . . . 120--121
Mildred Chaplin and
W. Penney Two-Dimensional Binary Arrays . . . . . 121--121
Aram Budak An Improved Time Delay Simulation . . . 122--122
D. O. Smith and
K. J. Harte Content-Addressed Memory Using Magneto-
or Electro-Optical Interrogation . . . . 123--123
G. H. Stearman Is Switching Theory Mathematics or
Engineering? . . . . . . . . . . . . . . 124--124
G. P. Weeg Contributors . . . . . . . . . . . . . . 125--126
J. N. Warfield Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 127--131
J. V. Wait R66-12 Experimental Study of a New
Method of Time Delay for Analog
Computers . . . . . . . . . . . . . . . 130--131
Anonymous Summary Report of a Workshop on
Programming Languages for Command and
Control . . . . . . . . . . . . . . . . 131--132
J. A. Brzozowski Workshop Reports . . . . . . . . . . . . 131--132
J. P. Robinson Abstracts of Current Computer Literature 133--144
Anonymous Abstracts of Current Computer Literature 133--148
E. Manning Subject Index . . . . . . . . . . . . . 145--147
S. Even Author Index . . . . . . . . . . . . . . 148--148
C. R. Kime Computer Group News . . . . . . . . . . 149--149
Anonymous Computer Group News . . . . . . . . . . 149--150
G. E. Mellen Notices . . . . . . . . . . . . . . . . 149--150
Anonymous Information about the Society . . . . . 151--155
W. H. Davidow Information about the Society . . . . . 151--155
Anonymous Information for Authors . . . . . . . . 155--b
M. E. White An Analog Computer Technique for Solving
a Class of Nonlinear Ordinary
Differential Equations . . . . . . . . . 157--163
William H. Kautz A Survey and Assessment of Progress in
Switching Theory and Logical Design in
the Soviet Union . . . . . . . . . . . . 164--204
F. Luccio A Method for the Selection of Prime
Implicants . . . . . . . . . . . . . . . 205--212
C. L. Sheng and
H. R. Hwa Testing and Realization of Threshold
Functions by Successive Higher Ordering
of Incremental Weights . . . . . . . . . 212--220
R. O. Duda and
H. Fossum Pattern Classification by Iteratively
Determined Linear and Piecewise Linear
Discriminant Functions . . . . . . . . . 220--232
Walter Del Picchia A Transistorized Digital Analog
Converter with AC Amplification . . . . 233--235
A. Nathan and
I. Korn Optimal Design of NLI Squarers and Sine
Generators . . . . . . . . . . . . . . . 235--239
H. C. Josephs The Effect of Spatial Variations in
Voltage and Temperature in Emitter
Coupled Logic Systems . . . . . . . . . 239--242
K. K. Roy and
A. K. Choudhury A Note on Testing and Realization of
Threshold Functions . . . . . . . . . . 242--244
D. C. Plisch and
A. K. Scidmore The Number of Equivalence Classes of
Functions Realizable by Generalized
Tributary Networks . . . . . . . . . . . 244--245
A. Grasselli Minimal Closed Partitions for
Incompletely Specified Flow Tables . . . 245--249
Torben U. Zahle On Coding the States of Sequential
Machines with the Use of Partition Pairs 249--253
Henry D. Friedman A Design for $(d, k)$ Graphs . . . . . . 253--254
H. Arango and
J. Santos A Fast Carry-Propagation Circuit for
Base $3$ Signed Non redundant Arithmetic 254--255
Robert T. Gregory On the Design of the Arithmetic Unit of
a Fixed-Word-Length Computer from the
Standpoint of Computational Accuracy . . 255--257
A. N. Mucciardi and
E. E. Gose Evolutionary Pattern Recognition in
Incomplete Nonlinear Multithreshold
Networks . . . . . . . . . . . . . . . . 257--261
Piotr Misiurewicz Comment on ``Counting with
Majority-Logic Networks'' . . . . . . . 262--262
Joao A. Zuffo and
Walter Del Picchia New Transistorized Dc-Ac Amplitude
Converter . . . . . . . . . . . . . . . 262--262
Anonymous Contributors . . . . . . . . . . . . . . 263--264
R. E. Miller Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 265--271
E. E. Newhall R66-25 Magnetically Controlled Variable
Logic . . . . . . . . . . . . . . . . . 270--270
R. F. Rosin R66-26 A Destructive-Readout Associative
Memory . . . . . . . . . . . . . . . . . 270--270
V. C. Rideout R66-27 Delay Approximations for
Correlation Measurements Using Analog
Computers . . . . . . . . . . . . . . . 271--271
Anonymous Implementation of Communications-Based
EDP Information Systems . . . . . . . . 271--272
E. Shamir Implementation of Communications-Based
EDP Information Systems . . . . . . . . 271--272
Anonymous The Role of ``Reliability'' in Total
Systems Design . . . . . . . . . . . . . 272--273
D. M. Y. Chang The Role of ``Reliability'' in Total
Systems Design . . . . . . . . . . . . . 272--273
Anonymous Sixth Annual Symposium on Switching
Circuit Theory And Logical Design . . . 274--274
D. R. Haring Sixth Annual Symposium on Switching
Circuit Theory and Logical Design . . . 274--274
A. Gill Abstracts of Current Computer Literature 275--288
Anonymous Abstracts of Current Computer Literature 275--294
C. L. Liu Subject Index . . . . . . . . . . . . . 288--293
M. L. Dertouzos Author Index . . . . . . . . . . . . . . 294--294
R. O. Winder Computer Group News . . . . . . . . . . 295--295
Anonymous Computer Group News . . . . . . . . . . 295--296
E. K. Bowdon Notices . . . . . . . . . . . . . . . . 295--296
Anonymous Information about the Society . . . . . 297--299
R. L. Sharma Information about the Society . . . . . 297--299
Anonymous Information for Authors . . . . . . . . 299--d
Anonymous Special Computer Issue . . . . . . . . . 301--301
Anonymous Editor's Notice . . . . . . . . . . . . 303--303
E. E. L. Mitchell and
J. B. Mawson and
J. Bulger Computer Group News Editor . . . . . . . 303--303
E. E. L. Mitchell and
J. B. Mawson and
J. Bulger A Generalized Hybrid Simulation for an
Aerospace Vehicle . . . . . . . . . . . 304--313
A. Hausner and
Cita M. Furlani Chebyshev All-Pass Approximants for
Time-Delay Simulation . . . . . . . . . 314--321
R. H. Baker and
D. H. Galvin and
R. W. Rasche Pulse Powered Circuits . . . . . . . . . 321--323
John B. Connolly Cross Coupling in High Speed Digital
Systems . . . . . . . . . . . . . . . . 323--327
W. W. Chu Correction . . . . . . . . . . . . . . . 327--327
W. W. Chu Computer Simulation of Waveform
Distortions in Digital Magnetic
Recordings . . . . . . . . . . . . . . . 328--336
S. S. Yau and
K. C. Wang Linearity of Sequential Machines . . . . 337--354
Arthur D. Friedman Feedback in Synchronous Sequential
Switching Circuits . . . . . . . . . . . 354--367
David R. Smith Bounds on the Number of Threshold
Functions . . . . . . . . . . . . . . . 368--369
T. Krishnan On the Threshold Order of a Boolean
Function . . . . . . . . . . . . . . . . 369--372
J. D. Bargainer and
C. L. Coates Decimal Numbers for Checking Summability 372--372
S. Even and
A. R. Meyer Test for Planarity of a Circuit Given by
an Expression . . . . . . . . . . . . . 372--375
Frederic J. Mowle Relations Between $P^n$ Cycles and
Stable Feedback Shift Registers . . . . 375--378
W. H. Wattenburg Design Automation for Computer Software 378--380
H. d'Hoop and
R. Monterosso SAHYB --- A Program for Simulation of
Analog and Hybrid Computers . . . . . . 381--382
Paul H. Giroux Estimates for Best Placement of Voters
in a Triplicated Logic Network . . . . . 382--382
Walter Del Picchia A Multi-Purpose Function Generator . . . 382--383
Frank Amoroso Timing Extraction at High Bit Densities 383--385
O. Herrmann About Transfer Functions with
Approximately Constant Time-Delay . . . 385--385
Carl Barus An Easily Mechanized Scheme for an
Adaptive Pattern Recognizer . . . . . . 385--387
A. K. Choudhury and
S. R. Das Computing Irredundant Normal Forms from
Abbreviated Presence Functions . . . . . 387--387
J. Kateley Contributors . . . . . . . . . . . . . . 388--389
S. S. Yau Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 390--394
A. E. Rogers R66-39 A Demonstration Hybrid Computer
for Real-Time Flight Simulation . . . . 394--394
W. H. Kautz Abstracts of Current Computer Literature 395--406
Anonymous Abstracts of Current Computer Literature 395--410
J. Hopcroft Subject Index . . . . . . . . . . . . . 406--409
L. M. Spandorfer Author Index . . . . . . . . . . . . . . 410--410
Anonymous On The Organization of Reliable Automata 411--411
D. W. Fife Workshop Reports . . . . . . . . . . . . 411--411
Anonymous Computer Group News . . . . . . . . . . 412--412
C. N. Liu Computer Group News . . . . . . . . . . 412--412
Anonymous Notices . . . . . . . . . . . . . . . . 413--413
R. W. Embley Notices . . . . . . . . . . . . . . . . 413--413
Anonymous Information about the Society . . . . . 415--417
E. G. Gilbert Information about the Society . . . . . 415--417
Anonymous Information for Authors . . . . . . . . 417--d
Anonymous IEEE Proceedings Computer Issue . . . . 419--419
Bruce A. Kaufman The Special Issue on High-Speed Memories 420--422
P. Pleshko and
L. M. Terman An Investigation of the Potential of MOS
Transistor Memories . . . . . . . . . . 423--427
T. A. Kriz and
T. K. Ishii An Experimental Nondestructive Microwave
Ferrite Core Readout Using Stripline . . 428--435
R. Matick Fast Nondestructive Read, Slow Write
Memory Device Using Thick Magnetic Films 435--441
H. Maeda and
A. Matsushita and
M. Takashima Woven Wire Memory for NDRO System . . . 442--451
A. V. Pohm Magnetic Film Scratch-Pad Memories . . . 452--458
Paul Higashi A Thin-Film Rod Memory for the NCR 315
RMC Computer . . . . . . . . . . . . . . 459--467
Frank C. Yao Propagation of Sense Signals in
Large-Scale Magnetic Thin Film Memories 468--474
T. J. Gilligan $2 1/2$D High Speed Memory Systems ---
Past, Present, and Future . . . . . . . 475--485
J. Reese Brown First-and Second-Order Ferrite Memory
Core Characteristics and Their
Relationship to System Performance . . . 485--501
W. H. Aldrich and
R. L. Alonso The ``Braid'' Transformer Memory . . . . 502--508
A. G. Hanlon Content-Addressable and Associative
Memory Systems a Survey . . . . . . . . 509--521
C. C. Yang and
S. S. Yau A Cutpoint Cellular Associative Memory 522--528
W. A. Crofut and
M. R. Sottile Design Techniques of a Delay-Line
Content-Addressed Memory . . . . . . . . 529--534
L. C. Hobbs Present and Future State-of-the-Art in
Computer Memories . . . . . . . . . . . 534--550
James H. Tracey Internal State Assignments for
Asynchronous Sequential Machines . . . . 551--560
L. Hellerman and
W. L. Duda and
S. Winograd Continuity and Realizability of Sequence
Transformations . . . . . . . . . . . . 560--569
William F. King Analysis of Iterative NOR Autonomous
Sequential Machines . . . . . . . . . . 569--577
Roy D. Merrill A Tabular Minimization Procedure for
Ternary Switching Functions . . . . . . 578--585
B. Reiffen and
H. L. Yudkin On Nonlinear Binary Sequential Circuits
and Their Inverses . . . . . . . . . . . 586--596
Richard C. Singleton Generalized Snake-in-the-Box Codes . . . 596--602
Konrad R. Fialkowski The $2$'s Complement and Other
Semi-Systematic Binary Codes . . . . . . 603--605
Angelo Raffaele Meo Majority Gate Networks . . . . . . . . . 606--618
R. L. Kashyap Synthesis of Switching Functions by
Threshold Elements . . . . . . . . . . . 619--628
H. H. Loomis The Maximum Rate Accumulator . . . . . . 628--639
N. Fuschillo and
J. Kroboth Multifunction Monolithic Thin-Film
Compatible DTL Logic Circuits for Data
Processing . . . . . . . . . . . . . . . 640--646
Eduardo Tomas Ulzurrun Stress Effects on Thin-Film Parametrons 647--657
James L. Massey Note on Finite-Memory Sequential
Machines . . . . . . . . . . . . . . . . 658--659
Michael C. Wang An Algorithm for Gray-to-Binary
Conversion . . . . . . . . . . . . . . . 659--660
H. Arango and
M. Pascual and
M. E. Valentinuzzi and
J. Santos Threshold Implementation of Ternary
Systems . . . . . . . . . . . . . . . . 661--662
Donald R. Haring Multi-Threshold Building Blocks . . . . 662--663
C. A. Renton and
B. M. Rabinovici Light Amplifiers and Inverters for
Digital Application Employing Negative
Conductance Devices . . . . . . . . . . 664--665
C. A. Rosen and
D. J. Hall A Pattern Recognition Experiment with
Near-Optimum Results . . . . . . . . . . 666--667
Arthur Bridgman Comments on ``Experimental Study of a
New Method of Time Delay for Analog
Computers'' . . . . . . . . . . . . . . 667--669
H. Hellerman On the Average Speed of a
Multiple-Module Storage System . . . . . 670--670
J. Klir Contributors . . . . . . . . . . . . . . 670--675
D. L. Epley Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 676--682
H. S. Stone R66-50 An Algorithm for the Machine
Calculation of Complex Fourier Series 680--681
H. S. Stone R66-51 Programming Semantics for
Multiprogrammed Computations . . . . . . 681--681
B. Raphael R66-52 A Programmer's Description of
LLLLLL, Bell Telephone Laboratories Low
Level Linked List Language . . . . . . . 681--682
Anonymous Computer Group News . . . . . . . . . . 682--682
A. J. Bernstein Computer Group News . . . . . . . . . . 682--682
R. A. Short Abstracts of Current Computer Literature 683--695
Anonymous Abstracts of Current Computer Literature 683--700
R. B. Mcghee and
I. S. Reed Subject Index . . . . . . . . . . . . . 696--700
J. P. Anderson Author Index . . . . . . . . . . . . . . 700--700
Anonymous Information about the Society . . . . . 701--713
A. J. Bernstein and
P. M. Lewis Information about the Society . . . . . 701--713
Anonymous Information for Authors . . . . . . . . 713--b
A. Marzollo Editor's Notice . . . . . . . . . . . . 715--715
Angelo Marzollo Nonobservable or Noncontrollable Analog
Schemes for the Solution of a Special
Class of Differential Equations . . . . 716--719
L. Light and
J. Badger and
D. Barnes An Automatic Acoustic Ray Tracing
Computer . . . . . . . . . . . . . . . . 719--725
Vernon L. Larrowe Band-Pass Quadrature Filters . . . . . . 726--731
A. Mukhopadhyay Symmetric Ternary Switching Functions 731--739
Arthur D. Friedman Feedback in Asynchronous Sequential
Circuits . . . . . . . . . . . . . . . . 740--749
N. A. Ball and
H. Q. Foster and
W. H. Long and
I. E. Sutherland and
R. L. Wigington Correction . . . . . . . . . . . . . . . 749--749
N. A. Ball and
H. Q. Foster and
W. H. Long and
I. E. Sutherland and
R. L. Wigington A Shared Memory Computer Display System 750--756
A. J. Bernstein Analysis of Programs for Parallel
Processing . . . . . . . . . . . . . . . 757--763
Harvey L. Garner Error Codes for Arithmetic Operations 763--770
R. E. Bonner Pattern Recognition with Three Added
Requirements . . . . . . . . . . . . . . 770--781
J. R. Morrison and
D. E. Speliotis Cobalt-Substituted $\gamma$-Fe$_2$O$_3$
as a High-Density Recording Tape . . . . 782--793
Frederick W. Dauer Impact Printing . . . . . . . . . . . . 794--798
Narsingh Deo The Self-Diagnosability of a Computer 799--799
Huei Ling High Speed Binary Parallel Adder . . . . 799--802
Allen H. Brady The Conjectured Highest Scoring Machines
for Rado's ${\Sigma}(k)$ for the Value
$k = 4$ . . . . . . . . . . . . . . . . 802--803
F. Luccio Reduction of the Number of Columns in
Flow Table Minimization . . . . . . . . 803--805
S. Muroga and
I. Toda Lower Bound of the Number of Threshold
Functions . . . . . . . . . . . . . . . 805--806
A. Ginzburg About Some Properties of Definite,
Reverse-Definite and Related Automata 806--810
G. C. Sethares On the Limit Sets of the $2 \times 1$
Homogeneous Nets . . . . . . . . . . . . 810--812
A. K. Choudhury and
S. R. Das Comment on ``Detection of Totally
Symmetric Boolean Functions'' . . . . . 813--813
Anonymous Contributors . . . . . . . . . . . . . . 814--816
Anonymous Abstracts of Current Computer Literature 817--827
D. R. Haring Subject Index . . . . . . . . . . . . . 828--831
G. S. Glinski Author Index . . . . . . . . . . . . . . 832--832
R. H. Urbano Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 833--841
R. A. Gaskill R66-60 Digital Simulation Languages: A
Critique and A Guide . . . . . . . . . . 836--836
D. J. Kuck R66-59 Computer Software: Programming
Systems for Digital Computers . . . . . 836--836
A. P. Sage R66-61 Digital Simulation of Large Scale
Systems . . . . . . . . . . . . . . . . 836--837
E. G. Newman R66-62 A Design for A Multiple User
Multiprocessing System . . . . . . . . . 837--837
A. F. Kaupe and
C. J. Frank R66-63 Parallel Processing of Algebraic
Expressions . . . . . . . . . . . . . . 837--839
W. W. Bledsoe R66-64 Pattern Recognition Studies in
the Biomedical Sciences . . . . . . . . 839--839
H. F. Meissinger R66-66 Sensitivity of Dynamic Systems to
Parameters Which Increase the Order of
Mathematical Models . . . . . . . . . . 839--840
L. D. Kovach R66-67 Analog Computer Techniques for
Problems in Complex Variables . . . . . 840--840
J. C. Strauss R66-68 An Analysis of Continuous
Parameter Identification Methods . . . . 840--840
Anonymous R66-15 A Reduction Technique for Prime
Implicant Tables . . . . . . . . . . . . 841--841
V. L. Larrowe R66-69 A Theory and Method for
Correlation Analysis of Nonstationary
Signals . . . . . . . . . . . . . . . . 841--841
Anonymous Information about the Society . . . . . 843--847
M. A. Arbib Information about the Society . . . . . 843--847
Anonymous Information for Authors . . . . . . . . 847--d
M. C. Gilliland A Spectral Stability Analysis of Finite
Difference Operators . . . . . . . . . . 849--854
J. E. Shemer and
G. A. Shippey Statistical Analysis of Paged and
Segmented Computer Systems . . . . . . . 855--863
Eric G. Wagner On Connecting Modules Together Uniformly
to Form a Modular Computer . . . . . . . 864--873
Eric Manning On Computer Self-Diagnosis. Part I ---
Experimental Study of a Processor . . . 873--881
Eric Manning On Computer Self-Diagnosis. Part II ---
Generalizations and Design Principles 882--890
B. B. Gordon and
R. W. House and
A. P. Lechler and
L. D. Nelson and
T. Rado Simplification of the Covering Problem
for Multiple Output Logical Networks . . 891--897
Franco P. Preparata Convolutional Transformations of Binary
Sequences: Boolean Functions and Their
Resynchronizing Properties . . . . . . . 898--908
G. Sebestyen and
J. Edie An Algorithm for Non-Parametric Pattern
Recognition . . . . . . . . . . . . . . 908--915
C. N. Liu and
G. L. Shelton An Experimental Investigation of a
Mixed-Font Print Recognition System . . 916--925
R. P. Gilson Correction . . . . . . . . . . . . . . . 925--925
Rodman P. Gilson Some Results of Amplitude Distribution
Experiments on Shift Register Generated
Pseudo-Random Noise . . . . . . . . . . 926--927
K. Y. Sih and
M. Y. Hsiao Cyclic Codes in Multiple Channel
Parallel Systems . . . . . . . . . . . . 927--930
V. Kudielka and
P. Oliva Complete Sets of Functions of Two and
Three Binary Variables . . . . . . . . . 930--931
J. Hartmanis Minimal Feedback Realizations of
Sequential Machines . . . . . . . . . . 931--933
P. M. Lewis A Lower Bound on the Number of
Corrections Required for Convergence of
the Single Threshold Gate Adaptive
Procedure . . . . . . . . . . . . . . . 933--935
Victor H. Sandoval On the Hyperplanes of the
Taylor-Steinbuch Linear Separator . . . 935--935
C. L. Liu Some Algebraic Properties of
Multi-Threshold Functions . . . . . . . 935--938
S. S. Yau and
C. C. Yang A Nonbulk Addition Technique for
Associative Processors . . . . . . . . . 938--941
H. Glucksman On the Improvement of a Linear
Separation by Extending the Adaptive
Process with a Stricter Criterion . . . 941--944
S. S. Yau and
C. C. Yang Pattern Recognition by Using an
Associative Memory . . . . . . . . . . . 944--947
Paul W. Cooper A Note on an Adaptive Hypersphere
Decision Boundary . . . . . . . . . . . 948--949
R. O. Winder Contributors . . . . . . . . . . . . . . 950--952
S. B. Akers Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 953--962
C. W. Hastings R66-78 Computation of the Base Two
Logarithm of Binary Number . . . . . . . 956--957
A. K. Scidmore R66-79 On Measures of Logic Performance:
Logic Quantum, Factor and Figure of
Merit . . . . . . . . . . . . . . . . . 957--958
D. T. Greenwood R66-80 Transient Neutron Distribution
Solutions by Compressed and Real-Time
Computer Complexes . . . . . . . . . . . 958--958
H. K. Skramstad R66-81 A Hybrid-Code Differential
Analyzer . . . . . . . . . . . . . . . . 958--959
J. B. Lewis R66-83 A Time-Shared Hybrid Simulation
Facility . . . . . . . . . . . . . . . . 959--959
T. Miura R66-82 Error Analysis of Hybrid Computer
Systems . . . . . . . . . . . . . . . . 959--959
G. S. Glinski R66-84 The Use of an Analogue Computer
in Some Operational Research Problems 959--960
W. E. Vander Velde R66-85 Hybrid Computer Monte Carlo
Techniques . . . . . . . . . . . . . . . 960--961
B. P. Bittner R66-87 Computer Programming . . . . . . 961--961
M. A. Fischer R66-86 A Chess Mating Combinations
Program . . . . . . . . . . . . . . . . 961--961
R. H. Canaday R66-88 Computer Graphics-Ten Unsolved
Problems . . . . . . . . . . . . . . . . 961--962
A. K. Choudhury Abstracts of Current Computer Literature 963--975
Anonymous Abstracts of Current Computer Literature 963--999
C. L. Sheng Annual Cumulative Subject Index . . . . 976--996
R. J. Preiss Annual Cumulative Author Index . . . . . 997--999
Anonymous Information for Authors . . . . . . . . 999--r
Anonymous IEEE Transactions on Electronic
Computers Annual Index 1966 Volume EC-15 999--b-999--q
R. L. Ashenhurst Annual Index 1966 . . . . . . . . . . . 1001--1016
L. A. O'Neill Editor's Notice . . . . . . . . . . . . 1--1
Lawrence A. O'Neill Iterative Analog Computation and the
Representation of Signals . . . . . . . 2--8
D. E. Dick and
H. J. Wertz Analog and Digital Computation of
Fourier Series and Integrals . . . . . . 8--13
Jakob F. Rossing and
Joachim E. Walther Calculation of Cross-Coupled Noise in
Digital Systems . . . . . . . . . . . . 14--17
James F. Gimpel The Minimization of TANT Networks . . . 18--38
M. Eugenio Valentinuzzi Three-Valued Propositional Calculus of
Lukasiewicz. and Three-Position Double
Switches . . . . . . . . . . . . . . . . 39--44
Stanislaw Majerski On Determination of Optimal
Distributions of Carry Skips in Adders 45--58
David F. Martin and
Gerald Estrin Experiments on Models of Computations
and Systems . . . . . . . . . . . . . . 59--69
David E. Martin and
Gerald Estrin Models of Computational Systems-Cyclic
to Acyclic Graph Transformations . . . . 70--79
A. A. Hauser Vector Integrators . . . . . . . . . . . 80--82
J. B. Connolly and
W. G. Schmidt Failure-Erasure Circuitry: A Duplicative
Technique of Failure-Masking Systems . . 82--85
Alvin B. Kaufman Ferromagnetic Wire Memory . . . . . . . 86--88
Oscar H. Ibarra On the Equivalence of Finite-State
Sequential Machine Models . . . . . . . 88--90
A. C. Fleck On the Strong Connectedness of the
Direct Product . . . . . . . . . . . . . 90--90
Israel Korn On $(d, k)$ Graphs . . . . . . . . . . . 90--90
Stanislaw Majerski and
Michal Wiweger NOR-Gate Binary Adder with Carry
Completion Detection . . . . . . . . . . 90--92
G. C. Sethares On the Complete Convergence of Bordered
Nets . . . . . . . . . . . . . . . . . . 92--93
M. C. Paull and
G. Waldbaum A Note on State Minimization of
Asynchronous Sequential Functions . . . 94--97
Sheldon B. Akers A Modification of Lee's Path Connection
Algorithm . . . . . . . . . . . . . . . 97--98
A. D. Friedman Fault Detection in Redundant Circuits 99--100
A. Svoboda Ordering of Implicants . . . . . . . . . 100--105
T. L. Booth Contributors . . . . . . . . . . . . . . 106--107
Shu-Park Chan Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 107--114
E. K. Bowdon R67-9 PERT as an Aid to Logic Design . . 110--110
E. L. Lawler R67-8 An Algorithm for Linear
Inequalities and Its Applications . . . 110--110
S. Dreyfus R67-10 Introduction and Overview of the
Multics System . . . . . . . . . . . . . 110--111
J. B. Dennis R67-11 Index Register Allocation . . . . 111--111
J. J. Donegan R67-12 Digital Training Devices . . . . 111--111
G. A. Paquette R67-13 Hybrid Simulation of a Helicopter 111--112
D. G. Watts R67-14 Random-Process Simulation and
Measurements . . . . . . . . . . . . . . 112--112
D. G. Watts and
H. S. Stone R67-15 A Contribution to the Development
of ALGOL . . . . . . . . . . . . . . . . 112--113
H. Bremerman R67-16 Computers and Thought . . . . . . 113--114
J. Hartmanis Abstracts of Current Computer Literature 115--128
Anonymous Abstracts of Current Computer Literature 115--132
C. V. Page Subject Index . . . . . . . . . . . . . 128--131
J. A. Brzozowski Author Index . . . . . . . . . . . . . . 132--132
Anonymous Information for Authors . . . . . . . . 132--a
Jaroslav H. Lukes Oscillographic Examination of the
Operation of Function Generators . . . . 133--139
Emmett P. O'Grady Correlation Method for Computing
Sensitivity Functions on a High-Speed
Iterative Analog Computer . . . . . . . 140--146
Richard Y. Kain Synthesis of UP--DOWN Counters . . . . . 146--151
David Mandelbaum A Comparison of Linear Sequential
Circuits and Arithmetic Sequences . . . 151--157
Akio Sasaki Addition and Subtraction in the Residue
Number System . . . . . . . . . . . . . 157--164
Jesse T. Quatse and
Roy A. Keir A Parallel Accumulator for a
General-Purpose Computer . . . . . . . . 165--171
Dieter Seitzer An Experimental Word Decode and Drive
System for a Magnetic Film Memory with
20-ns READ-Cycle Time . . . . . . . . . 172--179
G. D. Bergland and
H. W. Hale Digital Real-Time Spectral Analysis . . 180--185
H. R. Kaupp Characteristics of Microstrip
Transmission Lines . . . . . . . . . . . 185--193
Gustav N. Wassel Multiple Reflections on Pulse Signal
Transmission Lines-Model for Computer
Solution . . . . . . . . . . . . . . . . 193--202
Michael L. Dertouzos PHASEPLOT: An On-Line Graphical Display
Technique . . . . . . . . . . . . . . . 203--209
Velio A. Marsocci Dynamic Errors in Electronic Analog
Computers . . . . . . . . . . . . . . . 210--212
Michael L. Dertouzos and
Zachary Fluhr Minimization and Convexity in Threshold
Logic . . . . . . . . . . . . . . . . . 212--215
Donald R. Haring and
Dennis Ohori A Tabular Method for the Synthesis of
Multithreshold Threshold Elements . . . 216--220
Peter Weiner and
Edward J. Smith On the Number of Distinct State
Assignments for Synchronous Sequential
Machines . . . . . . . . . . . . . . . . 220--221
Arthur D. Friedman Comment on ``A Method for the Selection
of Prime Implicants'' . . . . . . . . . 221--222
Jiri Klir A Note on the Basic Block Diagrams of
Finite Automata from the Engineering
Point of View . . . . . . . . . . . . . 223--224
Domenico Ferrari A Division Method Using a Parallel
Multiplier . . . . . . . . . . . . . . . 224--226
I. Aleksander Array Networks for a Parallel Adder and
Its Control . . . . . . . . . . . . . . 226--229
J. Kella and
A. Shani A Note on the Accuracy of Digital
Differential Analyzers . . . . . . . . . 230--230
O. Firschein and
M. A. Fischler Comment on ``A Pattern Recognition
Experiment with Near-Optimum Results'' 231--231
R. K. Richards ``Datum Processing,'' ``Digital Datum
Transmission,'' and ``Automaton Theory'' 231--231
C. A. Rosen and
D. J. Hall Authors' Reply . . . . . . . . . . . . . 231--231
R. O. Winder Correction to ``Enumeration of
Seven-Argument Threshold Functions'' . . 231--231
T. C. Bartee Contributors . . . . . . . . . . . . . . 232--233
J. H. Tracey Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 234--242
J. E. Hopcroft R67-24 Formal Properties of Grammars . . 238--239
R. M. Mcclure R67-25 A Syntax-Oriented Translator . . 239--239
R. H. Canaday R67-26 The Lincoln Wand . . . . . . . . 240--240
A. I. Rubin R67-27 An Automatic Acoustic Ray Tracing
Computer . . . . . . . . . . . . . . . . 240--241
L. E. Fogarty R67-28 A General-Purpose Analog
Translational Trajectory Program for
Orbiting and Reentry Vehicles . . . . . 241--241
G. A. Korn R67-29 Hybrid Computer Solutions of
Partial-Differential Equations by Monte
Carlo Methods . . . . . . . . . . . . . 241--242
G. A. Bekey R67-30 Analog Computer Methods for
Parameter Optimization . . . . . . . . . 242--242
R. Vichnevetsky R67-31 Transfer Functions and the Matric
Computor . . . . . . . . . . . . . . . . 242--242
P. Naslin Abstracts of Current Computer Literature 243--256
Anonymous Abstracts of Current Computer Literature 243--260
M. H. Lewin Subject Index . . . . . . . . . . . . . 257--259
V. L. Wallace Author Index . . . . . . . . . . . . . . 260--260
Anonymous Information for Authors . . . . . . . . 260--a
Sergio T. Ribeiro Random-Pulse Machines . . . . . . . . . 261--276
M. R. Aaron and
S. K. Mitra Synthesis of Resistive Digital-to-Analog
Conversion Ladders for Arbitrary Codes
with Fixed Positive Weights . . . . . . 277--281
Hisashi Mine and
Yoshiaki Koga Basic Properties and a Construction
Method for Fail-Safe Logical Systems . . 282--289
Dennis John Clague New Classes of Synchronous Codes . . . . 290--298
Shunichi Amari A Theory of Adaptive Pattern Classifiers 299--307
Donald F. Specht Generation of Polynomial Discriminant
Functions for Pattern Recognition . . . 308--319
John Roder and
A. Frederick Rosene Memory Protection in Multiprocessing
Systems . . . . . . . . . . . . . . . . 320--326
Wesley W. Chu A Mathematical Model for Diagnosing
System Failures . . . . . . . . . . . . 327--331
Morton H. Lewin Portable Electronic Keyboard for
Computer Input by Telephone . . . . . . 332--334
Sigurd Waaben High-Speed Plated-Wire Memory System . . 335--343
Yukun Hsia Solenoid-Coupled READ-ONLY Memory . . . 344--350
J. V. Wait State-Space Methods for Designing
Digital Simulations of Continuous Fixed
Linear Systems . . . . . . . . . . . . . 351--355
R. C. White Experiments with Digital Computer
Simulations of Pseudo-Random Noise
Generators . . . . . . . . . . . . . . . 355--357
L. E. Colley Computation of Time-Phase Displacements
of Binary Linear Sequence Generators . . 357--359
P. K. Sinha Roy Synthesis of Symmetric Switching
Functions Using Threshold Logic Elements 359--364
Henrik Eriksson and
Per E. Danielsson Two Problems on Boolean Memories . . . . 364--365
Gabriele Saucier Encoding of Asynchronous Sequential
Networks . . . . . . . . . . . . . . . . 365--369
Lawrence G. Roberts Conic Display Generator Using
Multiplying Digital-Analog Converters 369--370
F. Filippazzi A New Approach to Permanent Memory . . . 370--371
Arthur W. Keen and
Jacqueline L. Peters Operational Differentiators Employing
Positive Feedback . . . . . . . . . . . 371--372
D. O. Smith and
K. J. Harte Comment on ``Content-Addressed Memory
Using Magneto-or Electro-Optical
Interrogation'' . . . . . . . . . . . . 372--372
P. Mermelstein Contributors . . . . . . . . . . . . . . 373--375
J. P. Anderson Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 375--380
W. E. Wagner R67-39 Trajectory Optimization Using
Fast-Time Repetitive Computation . . . . 379--379
G. R. Bolton R67-40 Satellite Lifetime Program . . . 379--380
E. Massell R67-41 An Analog Photoresistive
Multiplier . . . . . . . . . . . . . . . 380--380
G. Szentirmai R67-42 Band-Pass Quadrature Filters . . 380--380
H. S. Witsenhausen R67-43 Nonobservable or Noncontrollable
Analog Schemes for the Solution of a
Special Class of Differential Equations 380--380
B. Herzog Abstracts of Current Computer Literature 381--392
Anonymous Abstracts of Current Computer Literature 381--396
K. Loce Subject Index . . . . . . . . . . . . . 393--396
R. Tabory Author Index . . . . . . . . . . . . . . 396--396
Anonymous Information for Authors . . . . . . . . 396--a
Alexander Shani and
Doron J. Cohen Optimum Time Sharing of a Digital
Communication Channel . . . . . . . . . 397--402
Robert Vichnevetsky Error Analysis in the Computer
Simulation of Dynamic Systems:
Variational Aspects of the Problem . . . 403--411
Fred H. Hardie and
Robert J. Suhocki Design and Use of Fault Simulation for
Saturn Computer Design . . . . . . . . . 412--429
Wesley W. Chu A Computer Simulation of Electrical Loss
and Loading Effect in Magnetic Recording 430--434
Wayne A. Davis An Approach to the Assignment of Input
Codes . . . . . . . . . . . . . . . . . 435--442
Peter J. Graham and
Raymond J. Distler RST Flip-Flop Input Equations . . . . . 443--445
Pierre Tison Generalization of Consensus Theory and
Application to the Minimization of
Boolean Functions . . . . . . . . . . . 446--456
Edward M. Riseman A Realization Algorithm Using
Three-Input Majority Elements . . . . . 456--462
Gordon F. Hughes Feed-Forward Threshold Logic Nets for
Digital Switching and Pattern
Recognition . . . . . . . . . . . . . . 463--472
Zvi Kohavi and
Pierre Lavallee Design of Sequential Machines with
Fault-Detection Capabilities . . . . . . 473--484
Theodore R. Bashkow and
Azra Sasson and
Arnold Kronfeld System Design of a FORTRAN Machine . . . 485--499
Stephen W. Leibholz System Effectiveness as a Generalization
of System Availability . . . . . . . . . 500--505
A. E. Krause Tunnel Diode-Charge Storage Diode Shift
Register . . . . . . . . . . . . . . . . 506--507
J. K. Hawkins and
C. J. Munsey Parallel Logic with Charge Storage
Techniques . . . . . . . . . . . . . . . 507--508
W. S. Meisel A Note on Internal State Minimization in
Incompletely Specified Sequential
Networks . . . . . . . . . . . . . . . . 508--509
Stanley U. Robinson and
Robert W. House Gimpel's Reduction Technique Extended to
the Covering Problem with Costs . . . . 509--514
Monroe Newborn Note on Binary Input-Binary Output
Finite-Memory Sequential Machines . . . 514--514
Alfred G. Ratz Analog Computation of Fourier Series and
Integrals . . . . . . . . . . . . . . . 515--515
Lee C. Thomas An Application of the Analog Computer to
Electronic Circuit Simulation . . . . . 515--516
L. G. Birta Comment on ``Nonobservable or
Noncontrollable Analog Schemes for the
Solution of a Special Class of
Differential Equations'' . . . . . . . . 516--517
Angelo Marzollo Author's Reply . . . . . . . . . . . . . 517--517
C. S. Wallace and
O. Longe Reading Gapless Tape . . . . . . . . . . 517--518
Edgar H. Bristol Compensation for Truncation Errors in
Accumulative Addition Using Random
Methods . . . . . . . . . . . . . . . . 518--518
Arnold L. Knoll Comments on``A Pattern Recognition
Experiment with Near-Optimum Results''
and ``Pattern Classification by
Iteratively Determined Linear and
Piecewise Linear Discriminant
Functions'' . . . . . . . . . . . . . . 519--519
Harold E. Maurer A Design Procedure for Radiation
Hardening Certain NOR Gate Logic
Circuits . . . . . . . . . . . . . . . . 519--522
E. J. Mccluskey Contributors . . . . . . . . . . . . . . 523--525
E. Manning Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 526--530
C. R. Kime Abstracts of Current Computer Literature 531--543
J. K. Munson Subject Index . . . . . . . . . . . . . 544--547
H. K. Knudsen Author Index . . . . . . . . . . . . . . 547--547
Anonymous Information for Authors . . . . . . . . 547--b
J. Andrews Editor's Notice . . . . . . . . . . . . 549--549
R. Pasqualini Foreword to Special Issue on Aerospace
Computers . . . . . . . . . . . . . . . 550--550
Ronald Pasqualini Design Considerations for a Parallel
Bit-Organized MOS Memory . . . . . . . . 551--557
Earl C. Joseph Impact of Large Scale Integration on
Aerospace Computers . . . . . . . . . . 558--561
Saul Y. Levy and
Robert J. Linhardt and
Henry S. Miller and
Robert D. Sidnam System Utilization of Large-Scale
Integration . . . . . . . . . . . . . . 562--566
J. Paul Roth and
Willard G. Bouricius and
Peter R. Schneider Programmed Algorithms to Compute Tests
to Detect and Distinguish Between
Failures in Logic Circuits . . . . . . . 567--580
Donald L. Peeler and
Paul H. Meredith and
Louis M. Richards and
Christian O. Clark Automatic Checkout Systems for Titan III
and Apollo Guidance Computer Programs 580--590
Joseph M. Hannigan and
Charles G. Masters Redundant System Test Point Allocation
and Mission Reliability Estimation
Procedures . . . . . . . . . . . . . . . 591--596
Edwin H. Miller Reliability Aspects of the Variable
Instruction Computer . . . . . . . . . . 596--602
Howard Handler Monte Carlo Solution of Partial
Differential Equations Using a Hybrid
Computer . . . . . . . . . . . . . . . . 603--610
Eugenio Morreale Partitioned List Algorithms for Prime
Implicant Determination from Canonical
Forms . . . . . . . . . . . . . . . . . 611--620
Robert J. Lechner A Correspondence Between Equivalence
Classes of Switching Functions and Group
Codes . . . . . . . . . . . . . . . . . 621--624
Roy D. Merrill Symmetric Ternary Switching Functions:
Their Detection and Realization with
Threshold Logic . . . . . . . . . . . . 624--637
Larry Joel Goldstein and
Stephen W. Leibholz On the Synthesis of Signal Switching
Networks with Transient Blocking . . . . 637--641
Woo F. Chow Plated Wire Content-Addressable Memories
with Bit-Steering Technique . . . . . . 642--652
Igor T. Hawryszkiewycz Microprogrammed Control in
Problem-Oriented Languages . . . . . . . 652--658
A. Frederick Rosene Memory Allocation for Multiprocessors 659--665
Takeo Miura and
Junji Tsuda and
Junzo Iwata Hybrid Computer Solution of Optimal
Control Problems by the Maximum
Principle . . . . . . . . . . . . . . . 666--670
K. C. Wang Graphs of Linear Forms on Modules over
Boolean Rings . . . . . . . . . . . . . 670--671
S. Even and
I. Kohavi and
A. Paz On Minimal Modulo $2$ Sums of Products
for Switching Functions . . . . . . . . 671--674
Frank Hadlock On Finding a Minimal Set of Diagnostic
Tests . . . . . . . . . . . . . . . . . 674--675
V. Amar and
N. Condulmari Diagnosis of Large Combinational
Networks . . . . . . . . . . . . . . . . 675--680
William H. Kautz A Cellular Threshold Array . . . . . . . 680--682
W. M. McKeeman Representation Error for Real Numbers in
Binary Computer Arithmetic . . . . . . . 682--683
Neville M. Dor Guide to the Length of Buffer Storage
Required for Random (Poisson) Input and
Constant Output Rates . . . . . . . . . 683--684
M. R. Aaron and
S. K. Mitra A Note on the Design of
Digital-to-Analog Converters . . . . . . 685--686
Donald R. Haring and
Alfred K. Susskind On Realizations of Synchronous
Sequential Machines . . . . . . . . . . 686--687
N. N. Necula A Numerical Procedure for Determination
of the Prime Implicants of a Boolean
Function . . . . . . . . . . . . . . . . 687--689
Michael A. Harrison A Remark on Determining the Number of
States of a Sequential Machine . . . . . 689--690
Anonymous Contributors . . . . . . . . . . . . . . 690--694
C. V. Freiman Abstracts of Current Computer Literature 695--705
B. Widrow Subject Index . . . . . . . . . . . . . 706--709
H. S. Stone Author Index . . . . . . . . . . . . . . 709--709
J. E. Hopcroft Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 710--716
M. E. Connelly R67-57 Circle Test Evaluation of a
Method of Compensating Hybrid Computing
Error by Predicted Integral . . . . . . 713--714
R. J. A. Paul R67-58 Hybrid Computers in the Analysis
of Feedback Control Systems . . . . . . 714--714
E. Tammaru R67-59 The Analogue Computer Simulation
of an Alloy Junction Transistor Wide
Band Equivalent Circuit . . . . . . . . 714--715
B. E. Howard R67-61 APE II --- A Modem Analog/Hybrid
Computer for Laboratory Instruction . . 715--715
J. Vidal R67-60 ADAC-A Programmed Direct Analog
Computer . . . . . . . . . . . . . . . . 715--715
T. W. Connolly R67-62 Analog and Digital Computation of
Fourier Series and Integrals . . . . . . 715--716
G. A. Korn R67-63 Stochastic Computing . . . . . . 716--716
Anonymous Information for Authors . . . . . . . . 716--a
J. W. Golten and
David Rees The Use of Hybrid Computing in the
Analysis of Steel Rolling . . . . . . . 717--722
Thomas F. Dwyer and
Rabah Shahbender Device Applications of Charge Rectifiers 723--731
Arnold L. Knoll Spectrum Analysis of Digital Magnetic
Recording Waveforms . . . . . . . . . . 732--743
Ivor Catt Crosstalk (Noise) in Digital Systems . . 743--763
Wilhelm Anacker and
Chu Ping Wang Performance Evaluation of Computing
Systems with Memory Hierarchies . . . . 764--773
Gordon A. Rose ``Intergraphic,'' A Microprogrammed
Graphical-Interface Computer . . . . . . 773--784
Herbert Freeman and
Philippe P. Loutrel An Algorithm for the Solution of the
Two-Dimensional ``Hidden-Line'' Problem 784--790
King-Sun Fu and
Y. T. Chien and
Gerald P. Cardillo A Dynamic Programming Approach to
Sequential Pattern Recognition . . . . . 790--803
Donald L. Dietmeyer and
Peter R. Schneider Identification of Symmetry, Redundancy
and Equivalence of Boolean Functions . . 804--817
James K. Brousil and
David R. Smith A Threshold Logic Network for Shape
Invariance . . . . . . . . . . . . . . . 818--828
Donald R. Haring and
Richard J. Diephuis A Realization Procedure for
Multithreshold Threshold Elements . . . 828--835
Peter Weiner and
Edward J. Smith Optimization of Reduced Dependencies for
Synchronous Sequential Machines . . . . 835--847
Franco P. Preparata and
Gernot Metze and
Robert T. Chien On the Connection Assignment Problem of
Diagnosable Systems . . . . . . . . . . 848--854
Herbert C. Ratz and
J. V. Hildebrand Modified Pseudorandom Number Generators 854--856
Gabriel F. Groner and
J. F. Heafner and
T. W. Robinson On-Line Computer Classification of
Handprinted Chinese Characters as a
Translation Aid . . . . . . . . . . . . 856--860
E. R. Ide and
Cyril J. Tunis An Experimental Investigation of a
Nonsupervised Adaptive Algorithm . . . . 860--864
Herbert Freeman Calculation of Mean Shift for a Binary
Multiplier Using $2$, $3$, or $4$ Bits
at a Time . . . . . . . . . . . . . . . 864--866
Andrew Gabor Adaptive Coding for Self-Clocking
Recording . . . . . . . . . . . . . . . 866--868
C. L. Sheng and
H. R. Hwa Testing and Realization of Threshold
Functions with Don't Cares . . . . . . . 868--870
Charles L. Jackson and
Robert A. Ankerlin A Rapid Method for the Identification of
the Type of a Four-Variable Boolean
Function . . . . . . . . . . . . . . . . 870--871
R. F. Henry Random Noise Generation by Hybrid
Computer . . . . . . . . . . . . . . . . 872--873
B. Raphael Contributors . . . . . . . . . . . . . . 873--876
R. H. Canaday Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 877--880
W. S. Topham Abstracts of Current Computer Literature 881--893
Anonymous Abstracts of Current Computer Literature 881--912
R. C. Wingrove Annual Cumulative Subject Index . . . . 893--910
H. F. Meissinger Annual Cumulative Author Index . . . . . 910--912
Anonymous Information for Authors . . . . . . . . 912--u
Anonymous 1967 Index IEEE Transactions on
Electronic Computers Vol. EC-16 . . . . 912--a-912--t
W. J. Karplus 1967 Index IEEE Transactions on
Electronic Computers Vol. EC-16 . . . . 913--932
Anonymous Editor's Notice . . . . . . . . . . . . 1--1
Joel N. Sturman An Iteratively Structured
General-Purpose Digital Computer . . . . 2--9
Joel N. Sturman Asynchronous Operation of an Iteratively
Structured General-Purpose Digital
Computer . . . . . . . . . . . . . . . . 10--17
Janusz A. Brzozowski and
Shanker Singh Definite Asynchronous Sequential
Circuits . . . . . . . . . . . . . . . . 18--26
Florin Stuanciulescu and
Mihai Francisc Anton Oprescu A Mathematical Model of Finite Random
Sequential Automata . . . . . . . . . . 27--31
Chao-Wei Mow and
King-Sun Fu An Approach for the Realization of
Multithreshold Threshold Elements . . . 32--46
Chao-Wei Mow and
King-Sun Fu Input Tolerance Considerations for
Multithreshold Threshold Elements . . . 46--54
K. H. Konkle An Analog Comparator as a Pseudo-Light
Pen for Computer Displays . . . . . . . 54--55
Michael A. Harrison On Equivalence of State Assignments . . 55--57
Chao-Wei Mow and
King-Sun Fu Generation of Self-Dual and
Self-Complementary Dual Functions . . . 57--66
Michael Yoeli Ternary Cellular Cascades . . . . . . . 66--67
Monroe M. Newborn Maximal Memory Binary Input-Binary
Output Finite-Memory Sequential Machines 67--71
David R. Smith A Partitioning Method for Combinational
Synthesis . . . . . . . . . . . . . . . 72--75
Robert O. Winder Symmetry Types in Threshold Logic . . . 75--78
John R. Smith and
Cyrus O. Harbourt An Adaptive Threshold Logic Gate Using
Capacitive Analog Weights . . . . . . . 78--81
R. J. Leake and
H. L. Althaus DDA Scaling Graph . . . . . . . . . . . 81--84
K. C. Knowlton A Combination Hardware-Software
Debugging System . . . . . . . . . . . . 84--86
E. G. Coffman A Simple Probability Model Yielding
Performance Bounds for Modular Memory
Systems . . . . . . . . . . . . . . . . 86--89
J. P. Seddon and
R. A. Johnson The Simulation of Variable Delay . . . . 89--94
W. F. Cutlip On the Cascade Decomposition of Prefix
Automata . . . . . . . . . . . . . . . . 94--95
Suresh Chander On Dolotta--McCluskey Technique . . . . 95--95
Anonymous Contributors . . . . . . . . . . . . . . 95--96
Anonymous Reviews of Books and Papers in the
Computer Field . . . . . . . . . . . . . 97--98
Anonymous Abstracts of Current Computer Literature 99--108
Anonymous Subject Index . . . . . . . . . . . . . 108--112
Anonymous Author Index . . . . . . . . . . . . . . 112--112
E. J. Angelo, Jr. and
J. Logan and
K. W. Sussman The Separation Technique: A Method for
Simulating Transistors to Aid Integrated
Circuit Design . . . . . . . . . . . . . 113--116
P. R. Schneider and
D. L. Dietmeyer An Algorithm for Synthesis of
Multiple-Output Combinational Logic . . 117--128
D. B. Armstrong and
A. D. Friedman and
P. R. Menon Realization of Asynchronous Sequential
Circuits Without Inserted Delay Elements 129--134
S. B. Akers, Jr. On Maximum Inversion with Minimum
Inverters . . . . . . . . . . . . . . . 134--135
D. Ferrari Fast Carry-Propagation Iterative
Networks . . . . . . . . . . . . . . . . 136--145
S. H. Unger A Row Assignment for Delay-Free
Realizations of Flow Tables Without
Essential Hazards . . . . . . . . . . . 146--151
R. H. Urbano Structure and Function in Polyfunctional
Nets . . . . . . . . . . . . . . . . . . 152--173
T. J. McAvoy Least-Square Dead-Time Approximations 174--178
W. G. Wee and
K. S. Fu An Adaptive Procedure for Multiclass
Pattern Classification . . . . . . . . . 178--182
C. M. Allen and
D. D. Givone A Minimization Technique for
Multiple-Valued Logic Systems . . . . . 182--184
P. Weiner and
T. F. Dwyer Discussion of Some Flaws in the
Classical Theory of Two-Level
Minimization of Multiple-Output
Switching Networks . . . . . . . . . . . 184--186
Anonymous SAHYB-2: A Continuous System Simulation
Language Compatible with FORTRAN-IV . . 187--188
V. Azgapetian Comment on ``An Analog Photoresistive
Multiplier'' . . . . . . . . . . . . . . 188--188
M. E. Connelly Author's Reply . . . . . . . . . . . . . 188--188
Anonymous Contributors . . . . . . . . . . . . . . 189--190
D. L. Epley R68-5 Models of Computational
Systems-Cyclic to Acyclic Graph
Transformations . . . . . . . . . . . . 191--192
B. C. Biega R68-7 Analog Simulation of Ferroresonant
System Including Analysis of Hysteresis
Loop . . . . . . . . . . . . . . . . . . 192--192
J. C. Strauss R68-6 Regression Analysis and Parameter
Identification . . . . . . . . . . . . . 192--192
Anonymous Abstracts of Current Computer Literature 193--204
Anonymous Information For Authors . . . . . . . . 204--a
C. H. Thomas Transport Time-Delay Simulation for
Transmission Line Representation . . . . 205--214
S. Yajima and
T. Ibaraki A Theory of Completely Monotonic
Functions and its Applications to
Threshold Logic . . . . . . . . . . . . 214--229
A. Paz and
B. Peleg On Concatenative Decompositions of
Regular Events . . . . . . . . . . . . . 229--237
A. B. Howe and
C. L. Coates Logic Hazards in Threshold Networks . . 238--251
H. A. Curtis Polylinear Sequential Circuit
Realizations of Finite Automata . . . . 251--259
B. M. Epstein A $48$-Channel PCM Tape Data-Acquisition
System . . . . . . . . . . . . . . . . . 259--267
W. T. Marquitz and
Y. Tokad On Improving the Analog Computer
Solutions of Linear Systems . . . . . . 268--270
K. Doty and
H. Frank A Theorem on Linearity . . . . . . . . . 270--272
S. R. Petrick and
G. C. Sethares On the Determination of Complete Sets of
Logical Functions . . . . . . . . . . . 273--273
M. A. Fischler and
M. Tannenbaum Assumptions in the Threshold Synthesis
of Symmetric Switching Functions . . . . 273--279
P. K. Sinha Roy A Slide Rule Device for Checking
$2$-Summability . . . . . . . . . . . . 279--283
J. Kella and
A. Shani On the Reversibility of Computations in
a Digital Differential Analyzer . . . . 283--284
Anonymous Abstracts of Current Computer Literature 285--297
R. E. Keirstead R68-8 Language Directed Computer Design 298--298
L. C. Thomas R68-9 A Computer Simulation of
Electrical Loss and Loading Effect in
Magnetic Recording . . . . . . . . . . . 298--300
Anonymous Information for Authors . . . . . . . . 300--a
R. A. Manske Computor Simulation of Narrowband
Systems . . . . . . . . . . . . . . . . 301--308
D. R. Haring On Shift-Register Realizations of
Sequential Machines and Finite-State
Universal Sequential Machines . . . . . 309--312
C. C. Su and
S. S. Yau Unitary Shift-Register Realizations of
Sequential Machines . . . . . . . . . . 312--324
C. M. Ablow and
M. Yoeli and
J. Turner Irreducible Decompositions of
Transformation Graphs by Assignment
Techniques . . . . . . . . . . . . . . . 325--329
J. L. Massey and
M. K. Sain Inverses of Linear Sequential Circuits 330--337
S. Yajima and
T. Ibaraki Realization of Arbitrary Logic Functions
by Completely Monotonic Functions and
Its Applications to Threshold Logic . . 338--351
W. H. Kautz Fault Testing and Diagnosis in
Combinational Digital Circuits . . . . . 352--366
F. W. Smith Pattern Classifier Design by Linear
Programming . . . . . . . . . . . . . . 367--372
H. Andrews A High-Speed Algorithm for the Computer
Generation of Fourier Transforms . . . . 373--375
S. J. Kahne Sensitivity-Function Calculation in
Linear Systems Using Time-Shared Analog
Integration . . . . . . . . . . . . . . 375--379
A. Nathan and
J. Molcho Improved Voltage Selector and Cascade
Multiplier Circuits . . . . . . . . . . 380--382
S. B. Matthews Generation of Pseudorandom Noise Having
a Gaussian Spectral Density . . . . . . 382--385
J. V. Wait Correction to ``State-Space Methods for
Designing Digital Simulations of
Continuous Fixed Linear Systems'' . . . 385--385
S. Yajima and
T. Ibaraki and
I. Kawano On Autonomous Logic Nets of Threshold
Elements . . . . . . . . . . . . . . . . 385--391
S. S. Yau and
D. L. Ostapko Realization of a Class of Switching
Functions by Threshold-Logic Networks 391--399
J. H. Munson and
R. O. Duda and
P. E. Hart Experiments with Highleyman's Data . . . 399--401
J. L. Douce Comment on ``Computation of Time-Phase
Displacements of Binary Linear Sequence
Generators'' . . . . . . . . . . . . . . 402--402
Anonymous Contributors . . . . . . . . . . . . . . 403--404
D. W. Fife R68-10 SODAS and a Methodology for
System Design . . . . . . . . . . . . . 405--405
H. C. Lauer R68-11 Intercommunication of Processors
and Memory . . . . . . . . . . . . . . . 405--406
N. R. Nielsen R68-12 An Experimental Model of
System/360 . . . . . . . . . . . . . . . 406--407
G. D. Hornbuckle R68-13 An Introduction to Computer
Graphic Terminals . . . . . . . . . . . 407--407
F. G. Curl R68-14 Microprogrammed Control in
Problem-Oriented Languages . . . . . . . 407--408
E. E. Markson R68-15 Trajectory Computation by a
Hybrid Computer for the Apollo Midcourse
Abort Simulation . . . . . . . . . . . . 408--408
D. T. Greenwood R68-16 A Mathematical Model for the
Investigation of Three-Dimensional
Fields with Asymmetric Boundaries . . . 409--409
C. F. Crocker R68-17 Synthesis of Resistive
Digital-to-Analog Conversion Ladders for
Arbitrary Codes with Fixed Positive
Weights . . . . . . . . . . . . . . . . 409--410
B. R. Gaines R68-18 Random Pulse Machines . . . . . . 410--410
Anonymous Abstracts of Current Computer Literature 411--420
Anonymous Information for Authors . . . . . . . . 420--a
W. A. Davis Single Shift-Register Realizations for
Sequential Machines . . . . . . . . . . 421--431
A. R. Meo Modular Tree Structures . . . . . . . . 432--442
W. H. Kautz and
K. N. Levitt and
A. Waksman Cellular Interconnection Arrays . . . . 443--451
T. L. Booth Statistical Properties of Random Digital
Sequences . . . . . . . . . . . . . . . 452--461
H. C. Torng An Algorithm for Finding Secondary
Assignments of Synchronous Sequential
Circuits . . . . . . . . . . . . . . . . 461--469
J. C. Miller and
C. M. Wine A Simple Display for Characters and
Graphics . . . . . . . . . . . . . . . . 470--475
H. W. Lawson, Jr. Programming-Language-Oriented
Instruction Streams . . . . . . . . . . 476--485
R. R. Shively A Digital Processor to Generate Spectra
in Real Time . . . . . . . . . . . . . . 485--491
R. G. Casey and
G. Nagy An Autonomous Reading Machine . . . . . 492--503
S. R. Sedore More Efficient Use of the $F$ Matrix in
Practical Circuit Analysis Programs . . 503--506
M. S. Schmookler High Speed Binary to Decimal Conversion 506--508
Anonymous Contributors . . . . . . . . . . . . . . 509--510
Anonymous Abstracts of Current Computer Literature 511--519
G. Wiederhold R68-19 Bulk Core in a 360/67 Time
Sharing System . . . . . . . . . . . . . 520--520
J. L. Smith R68-20 Effects of Scheduling on File
Memory Applications . . . . . . . . . . 520--521
M. Kato R68-21 System Architecture for Large
Scale Integration . . . . . . . . . . . 521--521
T. A. Murrell R68-22 Current Status of Large Scale
Integration Technology . . . . . . . . . 521--522
D. J. Kuck R68-23 The Greenblatt Chess Program . . 522--522
W. M. Waite R68-24 A Proposal for Definitions in
ALGOL . . . . . . . . . . . . . . . . . 522--523
H. A. Freedman R68-25 An On-Line Editor . . . . . . . . 523--523
B. B. Barnes R68-26 Some Techniques for Accuracy
Improvement in Analog Computation . . . 523--524
Anonymous Information for Authors . . . . . . . . 524--b
W. W. Wierwille and
J. R. Knight Off-Line Correlation Analysis of
Nonstationary Signals . . . . . . . . . 525--536
R. O. McCary An Approximation to the Asymmetric
Strip-Line Coupling Coefficient . . . . 537--542
R. M. G. Wijnhoven A Simple High-Speed Magnetic Access
Switch Matrix . . . . . . . . . . . . . 542--550
D. L. Greer Characterization of the Magnetic
Second-Harmonic Analog Memory . . . . . 551--558
A. D. Friedman and
P. R. Menon Synthesis of Asynchronous Sequential
Circuits with Multiple-Input Changes . . 559--566
J. D. Bargainer, Jr. and
C. L. Coates Minimal Multiplexed Threshold Gate
Realizations . . . . . . . . . . . . . . 566--578
D. L. Dietmeyer Bounds on the Period of Oscillatory
Activity in Randomly Interconnected
Networks of Neuron-Like Elements . . . . 578--591
V. Dvorak A Two-Rail Cascade Synthesis of Boolean
Functions . . . . . . . . . . . . . . . 592--596
R. C. Born and
A. K. Scidmore Transformation of Switching Functions to
Completely Symmetric Switching Functions 596--599
N. Deo Generalized Parallel Redundancy in
Digital Computers . . . . . . . . . . . 600--600
E. G. Coffman and
A. C. McKellar On the Motion of an Unbounded, Markov
Queue in Random Access Storage . . . . . 600--603
Anonymous Contributors . . . . . . . . . . . . . . 604--605
A. V. Aho R68-27 Programming Languages for
Automata . . . . . . . . . . . . . . . . 606--606
D. Darms R68-29 Hydro System Optimization Model 607--607
W. M. McKeeman R68-28 A Microprogrammed Implementation
of EULER on IBM System/360 Model 30 . . 607--607
W. D. Little R68-30 Monte Carlo Solution of Partial
Differential Equations Using a Hybrid
Computer . . . . . . . . . . . . . . . . 607--608
R. Gleman R68-31 The Effect of Digital
Compensation for Computation Delay in a
Hybrid Loop . . . . . . . . . . . . . . 608--608
Anonymous Abstracts of Current Computer Literature 609--620
Anonymous Information for Authors . . . . . . . . 620--b
H. E. Maurer and
R. C. Ricci Horizons in Guidance Computer Component
Technology . . . . . . . . . . . . . . . 621--634
J. K. Russell A Visual Image Processor . . . . . . . . 635--639
K. A. Chen Computer Aided Memory Design Using
Transmission Line Models . . . . . . . . 640--648
F. P. Preparata Convolutional Transformation and
Recovery of Binary Sequences . . . . . . 649--655
W. S. Meisel Variable-Threshold Threshold Elements 656--667
W. S. Meisel Nets of Variable-Threshold Threshold
Elements . . . . . . . . . . . . . . . . 667--676
F. F. Sellers, Jr. and
M. Y. Hsiao and
L. W. Bearnson Analyzing Errors with the Boolean
Difference . . . . . . . . . . . . . . . 676--683
S. P. Colussi and
G. V. Pallottino An Approach to Optimum Tolerance
Adaptive Threshold Elements . . . . . . 684--691
B. A. Crane Path Finding with Associative Memory . . 691--693
S. Winograd A New Algorithm for Inner Product . . . 693--694
E. L. Renschler A Variable Counter Design Technique . . 694--696
E. Levine On the Characterizing Parameters of a
Threshold Function . . . . . . . . . . . 696--697
M. M. Newborn A Synthesis Technique for Binary
Input-Binary Output Synchronous
Sequential Moore Machines . . . . . . . 697--699
Anonymous Two Complete Axiom Systems for the
Extended Language of Regular Expressions 700--701
Sureshchander Comments on ``RST Flip-Flop Input
Equations'' . . . . . . . . . . . . . . 701--702
K. A. Foster Comments on ``Basic Properties and a
Construction Method for Fail-Safe
Logical Systems'' . . . . . . . . . . . 702--702
H. Mine and
Y. Koga Authors' Reply . . . . . . . . . . . . . 702--702
Anonymous Contributors . . . . . . . . . . . . . . 703--704
Anonymous Abstracts of Current Computer Literature 705--717
O. Serlin R68-32 The IADIC: A Hybrid Computing
Element . . . . . . . . . . . . . . . . 718--718
O. Serlin R68-33 PHENO: A New Concept of Hybrid
Computing Elements . . . . . . . . . . . 718--719
M. Y. Silberberg R68-34 Hybrid Apollo Docking Simulation 719--719
E. J. Copes R68-35 Optimal Generation of Arbitrary
Functions . . . . . . . . . . . . . . . 719--720
Anonymous Information for Authors . . . . . . . . 720--a
C. A. David and
B. Feldman High-Speed Fixed Memories Using
Large-Scale Integrated Resistor Matrices 721--728
G. N. Wassel Multiple Reflections from RC Loading of
Pulse-Signal Transmission Lines . . . . 729--737
J. Harley The Linear Transformer Tree . . . . . . 738--746
G. H. Barnes and
R. M. Brown and
M. Kato and
D. J. Kuck and
D. L. Slotnick and
R. A. Stokes The ILLIAC IV Computer . . . . . . . . . 746--757
D. J. Kuck ILLIAC IV Software and Application
Programming . . . . . . . . . . . . . . 758--770
N. N. Necula An Algorithm for the Automatic
Approximate Minimization of Boolean
Functions . . . . . . . . . . . . . . . 770--782
K. L. Suryanarayanan and
A. C. Soudack Analog Computer Automatic Parameter
Optimization of Nonlinear Control
Systems with Specific Inputs . . . . . . 782--788
C. C. Foster Determination of Priority in Associative
Memories . . . . . . . . . . . . . . . . 788--789
G. P. Cardillo and
King-Sun Fu On Suboptimal Sequential Pattern
Recognition . . . . . . . . . . . . . . 789--792
I. Kohavi and
Z. Kohavi Variable-Length Distinguishing Sequences
and Their Application to the Design of
Fault-Detection Experiments . . . . . . 792--795
A. Bouchet An Algebraic Method for Minimizing the
Number of States in an Incomplete
Sequential Machine . . . . . . . . . . . 795--798
Anonymous A Light Pen for Remote Time-Shared
Graphic Consoles . . . . . . . . . . . . 799--802
F. M. Brown The Origin of the Method of Iterated
Consensus . . . . . . . . . . . . . . . 802--802
Anonymous Contributors . . . . . . . . . . . . . . 803--804
Anonymous Abstracts of Current Computer Literature 805--817
R. M. Mcclure R68-36 Dataless Programming . . . . . . 818--818
I. Flores R68-37 Intercommunication of Processors
and Memory . . . . . . . . . . . . . . . 818--819
S. P. Bingulac R68-38 Accurate Analog Computer
Generation of Bessel Functions for Large
Ranges . . . . . . . . . . . . . . . . . 819--819
A. I. Rubin R68-39 Simulation of the Transfer
Function of a Crustacean Muscle Bundle 819--820
Anonymous Information for Authors . . . . . . . . 820--a
Anonymous Editor's Notice . . . . . . . . . . . . 821--821
Y. T. Yen A Mathematical Model Characterizing
Four-Phase MOS Circuits for Logic
Simulation . . . . . . . . . . . . . . . 822--826
Tsai Hwa Chen The Use of Delay Lines in Reading a
Manchester Code . . . . . . . . . . . . 827--845
T. R. N. Rao Error-Checking Logic for Arithmetic-Type
Operations of a Processor . . . . . . . 845--849
J. R. Duley and
D. L. Dietmeyer A Digital System Design Language (DDL) 850--861
S. S. Yau and
J. M. Schumpert Design of Pattern Classifiers with the
Updating Property Using Stochastic
Approximation Techniques . . . . . . . . 861--872
M. Perlman The Synthesis of Binary Sequence
Detectors . . . . . . . . . . . . . . . 873--880
E. Kellerman A Formula for Logical Network Cost . . . 881--884
J. Beister On the Implementation of
Failure-Tolerant Counters . . . . . . . 885--886
Chin Tung A Division Algorithm for Signed-Digit
Arithmetic . . . . . . . . . . . . . . . 887--889
R. L. Gamblin An Analysis of High-Speed,
Linear-Passive Binary, Read-Only Stores 889--893
R. L. Gamblin and
C. J. Tunis A High-Speed Threshold Memory Element 893--894
Celso de Renna e Souza A Note on Embedding Nonlinear Machines 894--896
M. C. Y. Kuo Solution of Nonlinear Equations . . . . 897--898
J. S. Rosko Comments on ``Hybrid Computer Solution
of Optimal Control Problems by the
Maximum Principle'' . . . . . . . . . . 899--899
P. K. Sinha Roy Further Comments on ``Synthesis of
Symmetric Switching Functions Using
Threshold Logic Networks'' . . . . . . . 899--900
Anonymous Contributors . . . . . . . . . . . . . . 901--902
Anonymous Abstracts of Current Computer Literature 903--921
C. C. Carroll R68-40 Sequential Machines and Automata
Theory . . . . . . . . . . . . . . . . . 922--923
J. H. Saltzer R68-41 Development of Executive
Routines, Both Hardware and Software . . 923--924
B. F. Char and
C. S. Wells R68-42 On Designing Generalized File
Records for Management Information
Systems . . . . . . . . . . . . . . . . 924--924
J. C. Strauss R68-43 Two Continuous System Modelling
Programs . . . . . . . . . . . . . . . . 924--924
Anonymous Information for Authors . . . . . . . . 924--a
D. E. Atkins Higher-radix division using estimates of
the divisor and partial remainders . . . 925--934
M. Y. Hsiao Single-Channel Error Correction in an
$f$-Channel System . . . . . . . . . . . 935--943
J. L. Shanks and
T. W. Cairns Use of a Digital Convolution Device to
Perform Recursive Filtering and the
Cooley--Tukey Algorithm . . . . . . . . 943--949
E. A. Patrick and
D. R. Anderson and
F. K. Bechtel Mapping Multidimensional Space to One
Dimension for Computer Output Display 949--953
D. L. Johnson and
K. H. O'Keefe The Application of Shift Registers to
Secondary State Assignment: Part I . . . 954--965
D. L. Johnson and
K. H. O'Keefe The Application of Shift Registers to
Secondary State Assignment: Part II . . 966--977
N. N. Necula An Algorithm for Multithreshold
Threshold Element Synthesis . . . . . . 978--985
L. K. Wadhwa Simulation of Nonquiescent Third-Order
Systems by a Single Operational
Amplifier . . . . . . . . . . . . . . . 986--987
Chi-Hau Chen Computer Processing of Radiation Sensor
PCM Data . . . . . . . . . . . . . . . . 987--989
H. D. Goldman and
J. Rom Considering Solder Connections, Does
Triplicated Majority Voting Apply to
Integrated Circuits . . . . . . . . . . 990--992
N. Kouvaras and
D. Lagoyannis and
L. Ponticopoulos A Digital System of Simultaneous
Addition of Several Binary Numbers . . . 992--997
D. R. Haring A Technique for Improving the
Reliability of Certain Classes of
Threshold Elements . . . . . . . . . . . 997--998
Anonymous A Capacitor-IGFET Digital-to-Analog
Converter . . . . . . . . . . . . . . . 999--1000
Anonymous Variable-Radix Counters Based on
Feedback Shift-Registers . . . . . . . . 1000--1002
Celso de Renna e Souza R 68-44 Mathematical Logic . . . . . . . 1003--1003
W. A. Farrand R68-45 Electrically Alterable Digital
Differential Analyzer . . . . . . . . . 1004--1004
Anonymous Abstracts of Current Computer Literature 1005--1024
Anonymous Information for Authors . . . . . . . . 1024--a
Anonymous Editor's Notice . . . . . . . . . . . . 1025--1025
Anonymous Announcement Transactions Available in
Microfiche Form . . . . . . . . . . . . 1026--1026
F. A. Russo and
R. J. Valek Process Performance Computer for
Adaptive Control Systems . . . . . . . . 1027--1037
R. H. Mitchell and
T. Williams and
W. D. Ryan A Delay Line and Logic Circuits
Utilizing Charge-Storage Subharmonic
Parametric Oscillators . . . . . . . . . 1037--1043
G. B. Gerace Digital System Design Automation --- a
Method for Designing a Digital System as
a Sequential Network System . . . . . . 1044--1061
S. Waaben High-Speed, Interlaced WRITE and
READ-Only Operation of a Plated-Wire
Memory System . . . . . . . . . . . . . 1062--1065
A. Sasaki The Basis for Implementation of Additive
Operations in the Residue Number System 1066--1073
G. Fantauzzi NORNAND Maitra Cascades . . . . . . . . 1074--1080
Yao Tung Yen Some Theoretical Properties of
Multithreshold Realizable Functions . . 1081--1088
A. W. Small Partitions and Edge-Weighted Pair-Graphs 1089--1089
M. G. Harman An Attempt to Design an Improved
Multiplication System . . . . . . . . . 1090--1090
E. S. Davidson and
G. Metze Comments on ``An Algorithm for Synthesis
of Multiple-Output Combinational Logic'' 1091--1092
E. G. Coffman, Jr. and
M. S. Schmookler A Random-Walk Model of a Queue Storage
Problem . . . . . . . . . . . . . . . . 1093--1095
Anonymous Contributors . . . . . . . . . . . . . . 1096--1097
J. Earley R68-46 Use of Transition Matrices in
Compiling . . . . . . . . . . . . . . . 1098--1098
D. W. Fife R68-47 Computer Scheduling Methods and
Their Countermeasures . . . . . . . . . 1098--1099
W. C. McGee R68-49 Virtual Memory Processes and
Sharing in Multics . . . . . . . . . . . 1099--1099
W. M. Newman R68-48 A Multiprogramming Monitor for
Small Machines . . . . . . . . . . . . . 1099--1099
C. L. Jackson R68-50 Multiprogramming System
Performance Measurement and Analysis . . 1100--1100
Anonymous Abstracts of Current Computer Literature 1101--1120
Anonymous Information for Authors . . . . . . . . 1120--a
W. Giloi and
H. Grebe Construction of Multistep Integration
Formulas for Simulation Purposes . . . . 1121--1131
G. G. Langdon, Jr. Analysis of Asynchronous Circuits Under
Different Delay Assumptions . . . . . . 1131--1143
L. Hellerman and
G. E. Hoernes Control Storage Use in Implementing an
Associative Memory for a Time-Shared
Processor . . . . . . . . . . . . . . . 1144--1151
J. E. Gaffney, Jr. Sequential Decision-Making Device for
Information-Processing Applications . . 1151--1156
W. G. Wee Generalized Inverse Approach to Adaptive
Multiclass Pattern Classification . . . 1157--1164
J. A. Cadzow Synthesis of Nonlinear Decision
Boundaries by Cascaded Threshold Gates 1165--1172
M. Silverberg Near-Optimal Ordering of Electronic
Circuit Equations . . . . . . . . . . . 1173--1174
H. Arango and
J. Santos and
A. Chacur Ternary Cyclo-Decompositions . . . . . . 1175--1176
Anonymous Realization of Sequential Machines . . . 1177--1177
Anonymous Contributors . . . . . . . . . . . . . . 1178--1179
G. Hannauer R68-51 The Design of an Automatic
Patching System . . . . . . . . . . . . 1179--1181
C. Wells R68-52 The Structure of the
``The''-Multiprogramming System . . . . 1181--1181
W. R. Sutherland R68-53 A System for Interactive
Graphical Programming . . . . . . . . . 1181--1182
Anonymous Abstracts of Current Computer Literature 1183--1230
Anonymous Information for Authors . . . . . . . . 1230--c
G. G. Hays Computer-Aided Design: Simulation of
Digital Design Logic . . . . . . . . . . 1--10
D. L. Dietmeyer and
Yueh-Hsung Su Logic Design Automation of Fan-In
Limited NAND Networks . . . . . . . . . 11--22
D. C. Dorrough A Methodical Approach to Analyzing and
Synthesizing a Self-Repairing Computer 22--42
D. J. Lynes High-Speed DC Coupled Digit Detector . . 43--47
E. L. Lawler and
K. N. Levitt and
J. Turner Module Clustering to Minimize Delay in
Digital Networks . . . . . . . . . . . . 47--57
Yueh-Hsung Su and
D. L. Dietmeyer Computer Reduction of Two-Level,
Multiple-Output Switching Circuits . . . 58--63
J. E. Shemer and
S. C. Gupta A Simplified Analysis of Processor
``Look-Ahead'' and Simultaneous
Operation of a Multi-Module Main Memory 64--71
P. M. Fenwick Binary Multiplication with Overlapped
Addition Cycles . . . . . . . . . . . . 71--74
D. Fraser Incrementing a Bit-Reversed Integer . . 74--74
G. G. Langdon, Jr. Subtraction by Minuend Complementation 74--76
T. Ito Note on a Class of Statistical
Recognition Functions . . . . . . . . . 76--79
N. Deo Author's Reply . . . . . . . . . . . . . 80--80
P. H. Giroux Comment on ``Generalized Parallel
Redundancy in Digital Computers'' . . . 80--80
T. A. Taebel Comment on ``A Variable Counter Design
Technique'' . . . . . . . . . . . . . . 80--80
Anonymous Contributors . . . . . . . . . . . . . . 81--82
R. D. Benham R69-1 Transport Time-Delay Simulation
for Transmission Line Representation . . 83--83
A. Hausner R69-2 The Synthesis and Processing of
Signals with Discontinuities in the Time
Domain . . . . . . . . . . . . . . . . . 83--84
Anonymous Abstracts of Current Computer Literature 85--104
Anonymous Information for Authors . . . . . . . . 104--a
P. Lucas An Accumulator Chip . . . . . . . . . . 105--114
A. Mukhopadhyay Unate Cellular Logic . . . . . . . . . . 114--121
B. Hruz Unateness Test of a Boolean Function and
Two General Synthesis Methods Using
Threshold Logic Elements . . . . . . . . 122--131
G. B. Gerace and
G. Gestri Sequential Machines with Less Delay
Elements than Feedback Paths . . . . . . 132--144
Kung-Chi Wang Synthesis of Linear Sequential Machines
with Unspecified Outputs . . . . . . . . 145--153
Y. H. Chuang Transition Logic Circuits and a
Synthesis Method . . . . . . . . . . . . 154--168
T. J. Powell A Procedure for Selecting Diagnostic
Tests . . . . . . . . . . . . . . . . . 168--175
O. G. Langdon, Jr. Delay-Free Asynchronous Circuits with
Constrained Line Delays . . . . . . . . 175--181
I. D. G. Macleod Comments on ``A High-Speed Algorithm for
the Computer Generation of Fourier
Transforms'' . . . . . . . . . . . . . . 182--182
E. C. Ogbuobiri Comment on ``Solution of Nonlinear
Equations'' . . . . . . . . . . . . . . 182--183
W. L. Whipple Comments on ``Higher-Radix Division
Using Estimates of the Divisor and
Partial Remainders'' . . . . . . . . . . 183--183
Anonymous Contributors . . . . . . . . . . . . . . 184--184
Anonymous Abstracts of Current Computer Literature 185--203
W. J. Karplus R69-4 Quasi-Analogue Discrete Simulating
Mediums . . . . . . . . . . . . . . . . 204--204
G. J. Klir R69-3 A Formula for Logical Network Cost 204--204
Anonymous Information for Authors . . . . . . . . 204--a
D. H. O'herren Radar Reflectivity Plots-Digital Method 205--211
A. Svoboda Decimal Adder with Signed Digit
Arithmetic . . . . . . . . . . . . . . . 212--215
G. D. Hornbuckle and
R. N. Spann Diagnosis of Single-Gate Failures in
Combinational circuits . . . . . . . . . 216--220
K. Fukunaga and
T. F. Krile Calculation of Bayes' Recognition Error
for Two Multivariate Gaussian
Distributions . . . . . . . . . . . . . 220--229
S. Even and
A. R. Meyer Sequential Boolean Equations . . . . . . 230--240
K. S. Menger, Jr. A Transform for Logic Networks . . . . . 241--250
H. S. Stone and
C. L. Jackson Structures of the Affine Families of
Switching Functions . . . . . . . . . . 251--257
Chao-Wei Mow and
King-Sun Fu Loop-Free Threshold Element Structures 257--267
W. L. Whipple Calculation of Integrated Circuit Yields 268--268
N. A. Farmer A Digital Comparator for Use with
Computer Displays . . . . . . . . . . . 269--270
H. J. Quaife On $(d, k, \mu)$ Graphs . . . . . . . . 270--272
P. Weiner and
T. A. Dolotta Mixed Memory Type Realizations of
Sequential Machines . . . . . . . . . . 272--277
V. E. Vickers Comment on ``Solution of Nonlinear
Equations'' . . . . . . . . . . . . . . 277--277
M. B. Kermani and
M. H. Mickle and
L. P. McNamee Identification of Disjunctively
Decomposable Logic Functions Employing a
Karnaugh Map . . . . . . . . . . . . . . 277--279
Anonymous Attenuationless Voltage or Current
Propagation on a Line with Ohmic Losses 280--281
F. C. Davis Comment on ``A Variable Counter Design
Technique'' . . . . . . . . . . . . . . 281--281
E. L. Renschler Author's Reply . . . . . . . . . . . . . 281--281
R. Jones Another Comment on ``A Variable Counter
Design Technique'' . . . . . . . . . . . 281--282
E. L. Renschler Author's Reply . . . . . . . . . . . . . 282--284
Anonymous Abstracts of Current Computer Literature 285--302
L. Kleinrock R69-5 The Statistics of Discrete-Event
Simulation . . . . . . . . . . . . . . . 303--303
F. T. Sasaki R69-6 Trajectory Optimization by a
Direct Descent Process . . . . . . . . . 303--304
Anonymous Information for Authors . . . . . . . . 304--a
Anonymous IEEE Transactions on Computers . . . . . c1--304--b
J. R. Duley and
D. L. Dietmeyer Translation of a DDL Digital System
Specification to Boolean Equations . . . 305--313
D. K. Banerji and
J. A. Brzozowski Sign Detection in Residue Number Systems 313--320
H. D. Schnurmann and
K. Maling A Statistical Approach to the
Computation of Delays in Logic Circuits 320--328
S. K. Das A Method of Decision Making in Pattern
Recognition . . . . . . . . . . . . . . 329--333
M. L. Dertouzos and
M. E. Kaliski and
K. P. Polzen On-Line Simulation of Block-Diagram
Systems . . . . . . . . . . . . . . . . 333--342
P. N. Marinos Fuzzy Logic and its Application to
Switching Systems . . . . . . . . . . . 343--348
S. N. Cole Real-Time Computation by $n$-Dimensional
Iterative Arrays of Finite-State
Machines . . . . . . . . . . . . . . . . 349--365
A. L. Knoll Experiments with ``Characteristic Loci''
for Recognition of Handprinted
Characters . . . . . . . . . . . . . . . 366--372
R. O. Winder Threshold Gate Approximations Based on
Chow Parameters . . . . . . . . . . . . 372--375
A. B. Marcovitz and
C. M. Shub An Improved Algorithm for the
Simplification of Switching Functions
Using Unique Identifiers on a Karnaugh
Map . . . . . . . . . . . . . . . . . . 376--378
Anonymous Comment on ``Pattern Classification
Design by Linear Programming'' . . . . . 378--379
D. Steinmeyer Logarithm Function Generated by Parallel
Resistors . . . . . . . . . . . . . . . 379--381
F. F. Sellers, Jr. and
M. Y. Hsiao and
L. W. Bearnson Correction to ``Analyzing Errors with
the Boolean Difference'' . . . . . . . . 381--381
Anonymous Contributors . . . . . . . . . . . . . . 382--383
D. T. Greenwood R69-8 Hybrid Computer Integration of
Partial Differential Equations by Use of
an Assumed Sum Separation of Variables 384--384
L. A. O'Neill R69-7 Hybrid Simulation of Speech
Waveforms Utilizing a Gaussian Wave
Function Representation . . . . . . . . 384--384
Anonymous Abstracts of Current Computer Literature 385--399
Anonymous Information for Authors . . . . . . . . 399--b
Anonymous IEEE Transactions on Computers . . . . . c1--399--c
J. W. Sammon, Jr. A Nonlinear Mapping for Data Structure
Analysis . . . . . . . . . . . . . . . . 401--409
W. T. Weeks Mathematical Analysis of Ferrite Core
Memory Arrays . . . . . . . . . . . . . 409--416
C. R. Hall and
S. J. Kahne Automated Scaling for Hybrid Computers 416--423
N. K. Natarajan and
P. A. V. Thomas A Multiaccess Associative Memory . . . . 424--428
F. O. Hadlock and
C. L. Coates Realization of Sequential Machines with
Threshold Elements . . . . . . . . . . . 428--439
S. Singh Asynchronous Sequential Circuits with
Feedback . . . . . . . . . . . . . . . . 440--450
S. Ghosh and
D. Basu and
A. K. Choudhury Multigate Synthesis of General Boolean
Functions by Threshold Logic Elements 451--456
J. L. Shanks Computation of the Fast Walsh--Fourier
Transform . . . . . . . . . . . . . . . 457--459
R. M. Kline and
D. F. Wann Threshold Logic Design of Pulse-Type
Sequential Networks . . . . . . . . . . 459--465
S. V. Dabadghao A Method for Finding Feedback Partitions
for Sequential Machines . . . . . . . . 465--467
G. K. Maki and
J. H. Tracey and
R. J. Smith II Generation of Design Equations in
Asynchronous Sequential Circuits . . . . 467--472
Anonymous On Asynchronous Machines with Flip-Flops 473--473
Celso de Renna e Souza A Theorem on the State Reduction of
Synthesized Stochastic Machines . . . . 473--474
Anonymous Contributors . . . . . . . . . . . . . . 475--476
E. O. Gilbert R69-11 A New High Performance Computer
d-c Amplifier . . . . . . . . . . . . . 477--477
M. A. Harrison R69-9 Deterministic Stack Automata and
the Quotient Operator . . . . . . . . . 477--477
A. Wakshman R69-10 Bounded Action Machines: Toward
an Abstract Theory of Computer Structure 477--477
R. L. Horst R69-12 Design Method for Digital Dead
Beat Controller . . . . . . . . . . . . 478--478
Anonymous Abstracts of Current Computer Literature 479--498
Anonymous Information for Authors . . . . . . . . 498--c
Anonymous IEEE Transactions on Computers . . . . . c1--498--d
R. Vichnevetsky Use of Functional Approximation Methods
in the Computer Solution of Initial
Value Partial Differential Equation
Problems . . . . . . . . . . . . . . . . 499--512
P. T. Rux A Glass Delay Line Content-Addressed
Memory System . . . . . . . . . . . . . 512--520
L. J. Koczela and
G. Y. Wang The Design of a Highly Parallel Computer
Organization . . . . . . . . . . . . . . 520--529
D. F. Martin and
G. Estrin Path Length Computations on Graph Models
of Computations . . . . . . . . . . . . 530--536
F. Luccio Extending the Definition of Prime
Compatibility Classes of States in
Incomplete Sequential Machine Reduction 537--540
A. D. Friedman and
R. L. Graham and
J. D. Ullman Universal Single Transition Time
Asynchronous State Assignments . . . . . 541--547
F. W. Smith Design of Multicategory Pattern
Classifiers with Two-Category Classifier
Design Procedures . . . . . . . . . . . 548--551
R. L. Cosgriff Multiplex Logic Circuits . . . . . . . . 552--556
G. C. Sethares and
J. N. Pierce On the Generation of a Class of
Multithreshold Functions . . . . . . . . 557--559
R. C. Born Transformation of Ternary Switching
Functions to Completely Symmetric
Ternary Switching Functions . . . . . . 559--560
R. B. McGhee Some Aids to the Detection of Hazards in
Combinational Switching Circuits . . . . 561--565
F. M. Brown Comment on ``Canonical Programming of
Nonlinear and Time-Varying Differential
Equations'' . . . . . . . . . . . . . . 566--566
M. Graham Error Correction in Batch-Fabricated
Memories . . . . . . . . . . . . . . . . 566--567
K. S. Hall Modified Twisted-Ring Counter Circuit 568--568
M. P. Marcus S-R-T Flip-Flop . . . . . . . . . . . . 568--569
Anonymous Contributors . . . . . . . . . . . . . . 570--571
J. Nievergelt R69-13 Perceptrons: An Introduction to
Computational Geometry . . . . . . . . . 572--572
M. A. Harrison R69-14 Translator Writing Systems . . . 572--573
C. W. Schisler R69-15 Microwave Radar and Electronic
Environment Simulator . . . . . . . . . 573--573
Anonymous Abstracts of Current Computer Literature 574--592
Anonymous Information for Authors . . . . . . . . 592--c
Anonymous IEEE Transactions on Computers . . . . . c1--592--d
T. D. Friedman and
Sih-Chin Yang Methods Used in an Automatic Logic
Design Generator (ALERT) . . . . . . . . 593--614
E. G. Henrichon, Jr. and
King-Sun Fu A Nonparametric Partitioning Procedure
for Pattern Classification . . . . . . . 614--624
C. D. Weiss The Characterization and Properties of
Cascade Realizable Switching Functions 624--633
Celso de Renna e Souza and
R. Jeffrey Leake Relationships Among Distinct Models and
Notions of Equivalence for Stochastic
Finite-State Systems . . . . . . . . . . 633--641
P. Stucki Generation of Grey Tones by Computer for
Simulation of Visual Information Systems 642--643
A. D. Hause and
D. R. Weller A Variable-Length Code for an
Incremental Display System . . . . . . . 643--644
J. E. Shemer and
Someshwar and
C. Gupta On the Design of Bayesian Storage
Allocation Algorithms for Paging and
Segmentation . . . . . . . . . . . . . . 644--651
A. Lempel On $k$-Stable Feedback Shift Registers 652--660
M. Cohn and
S. Even The Design of Shift Register Generators
for Finite Sequences . . . . . . . . . . 660--662
M. Cohn and
S. Even A Gray Code Counter . . . . . . . . . . 662--664
Anonymous On the Determination of the Maximum
Compatibility Classes . . . . . . . . . 665--665
Anonymous Contributors . . . . . . . . . . . . . . 666--667
T. T. Nieh R69-17 On Finite Automata with a
Time-Variant Structure . . . . . . . . . 668--668
H. C. Torng R69-16 Satisfaction of Sensitivity
Requirements by Threshold Logic Elements 668--668
S. A. Greibach R69-18 Multitape One-Way Nonwriting
Automata . . . . . . . . . . . . . . . . 669--669
J. D. Ullman R69-19 On the Elimination of Endmarkers 669--669
V. L. Larrowe R69-20 An Analog Card Capacity
Correlator as Applied to OCR . . . . . . 669--670
A. Ben R69-21 Hybrid Assumed Mode Solution of
Non-Linear Partial Differential
Equations . . . . . . . . . . . . . . . 670--670
Anonymous Abstracts of Current Computer Literature 671--688
Anonymous Information for Authors . . . . . . . . 688--a
Anonymous IEEE Transactions on Computers . . . . . c1--688--b
Anonymous Foreword . . . . . . . . . . . . . . . . 689--689
M. G. Smith and
W. A. Notz and
E. Schischa The Questions of Systems Implementation
with Large-Scale Integration . . . . . . 690--694
J. H. Huttenhoff and
R. R. Shively Arithmetic Unit of a Computing Element
in a Global, Highly Parallel Computer 695--698
S. A. White Digital Adaptive-Element Building Blocks
for MOS Large-Scale Integration . . . . 699--706
J. O. Campeau The Block-Oriented Computer . . . . . . 706--718
W. H. Kautz Cellular Logic-in-Memory Arrays . . . . 719--727
C. W. Weller A High-Speed Carry Circuit for Binary
Adders . . . . . . . . . . . . . . . . . 728--732
M. J. E. Golay Hexagonal Parallel Pattern
Transformations . . . . . . . . . . . . 733--740
A. Dunworth and
J. I. Roche The Error Characteristics of the Binary
Rate Multiplier . . . . . . . . . . . . 741--745
H. M. Aus and
G. A. Korn Table-Lookup/Interpolation Function
Generation for Fixed-Point Digital
Computations . . . . . . . . . . . . . . 745--749
J. L. Douce and
T. J. Healy Evaluation of the Amplitude Distribution
of Quasi-Gaussian Signals Obtained From
Pseudorandom Noise . . . . . . . . . . . 749--752
W. S. Meisel and
R. S. Kashef Hazards in Asynchronous Sequential
Circuits . . . . . . . . . . . . . . . . 752--759
T. F. Dwyer Comments on ``Fault Testing and
Diagnosis in Combinational Digital
Circuits'' . . . . . . . . . . . . . . . 760--760
W. H. Kautz Author's Reply . . . . . . . . . . . . . 760--760
G. G. Langdom, Jr. Correction to ``Subtraction by Minuend
Complementation'' . . . . . . . . . . . 760--760
Anonymous Contributors . . . . . . . . . . . . . . 761--762
B. Elspas R69-22 Computation over Galois Fields
Using Shiftregisters . . . . . . . . . . 763--763
S. A. Greibach R69-23 The Reduction of Tape Reversals
for Off-Line One-Tape Turing Machines 763--763
A. Mukhopadhyay R69-24 Universal Logic Circuits and
Their Modular Realizations . . . . . . . 763--764
J. Kopf R69-25 A System Organization for
Resource Allocation . . . . . . . . . . 764--764
Anonymous Abstracts of Current Computer Literature 765--783
Anonymous Information for Authors . . . . . . . . 783--b
Anonymous T. F. Dwyer . . . . . . . . . . . . . . 760--760
Anonymous IEEE Transactions on Computers . . . . . c1--783--c
Anonymous Editor's Notice . . . . . . . . . . . . 785--785
Shu-Kwan Chan The Serial Solution of the Diffusion
Equation Using Nonstandard Hybrid
Techniques . . . . . . . . . . . . . . . 786--799
R. L. Davis The ILLIAC IV Processing Element . . . . 800--816
S. Cohen and
R. O. Winder Threshold Gate Building Blocks . . . . . 816--823
F. J. Mowle Readily Programmable Procedures for the
Analysis of Nonlinear Feedback Shift
Registers . . . . . . . . . . . . . . . 824--829
Chung-Jen Tan and
P. R. Menon and
A. D. Friedman Structural Simplification and
Decomposition of Asynchronous Sequential
Circuits . . . . . . . . . . . . . . . . 830--838
C. D. Weiss Optimal Synthesis of Arbitrary Switching
Functions with Regular Arrays of
$2$-Input $1$-Output Switching Elements 839--856
K. Vairavan On the Lower Bound to the Memory of
Finite State Machines . . . . . . . . . 856--861
G. G. Hays Author's Reply . . . . . . . . . . . . . 862--862
A. R. Mckay Comment on ``Computer-Aided Design:
Simulation of Digital Design Logic'' . . 862--862
C. H. Haspel Remarks on ``Comments on 'An Algorithm
for Synthesis of Multiple-Output
Combinational Logic''' . . . . . . . . . 863--863
E. S. Davidson and
G. Metze Authors' Reply . . . . . . . . . . . . . 863--864
B. Brown R69-26 Further Experimental Data on the
Behavior of Programs in a Paging
Environment . . . . . . . . . . . . . . 865--865
E. G. Coffman, Jr. R69-27 Demand Paging in Perspective . . 865--866
P. J. Denning R69-28 Dynamic Storage Allocation
Systems . . . . . . . . . . . . . . . . 866--866
Anonymous Abstracts of Current Computer Literature 867--884
Anonymous Information for Authors . . . . . . . . 884--a
Anonymous IEEE Transactions on Computers . . . . . c1--884--b
W. W. Chu Optimal File Allocation in a Multiple
Computer System . . . . . . . . . . . . 885--889
Yao Tung Yen Computer-Aided Test Generation for
Four-Phase MOS LSI Circuits . . . . . . 890--894
H. K. V. Lotsch Magnetic-Field Design Considerations for
a Plated-Wire Memory . . . . . . . . . . 894--899
A. Wolinsky Unified Interval Classification and
Unified $3$-Classification for
Associative Memories . . . . . . . . . . 899--911
W. S. Meisel Potential Functions in Mathematical
Pattern Recognition . . . . . . . . . . 911--918
H. Drucker Computer Optimization of Recognition
Networks . . . . . . . . . . . . . . . . 918--923
H. R. Hwa and
C. L. Sheng An Approach for the Realization of
Threshold Functions of Order $r$ . . . . 923--939
W. T. Lynch Worst-Case Analysis of a Resistor Memory
Matrix . . . . . . . . . . . . . . . . . 940--942
E. G. Coffman, Jr. On the Tradeoff Between Response and
Preemption Costs in a
Foreground-Background Computer Service
Discipline . . . . . . . . . . . . . . . 942--947
D. Ferrari and
A. Grasselli A Cellular Structure for Sequential
Networks . . . . . . . . . . . . . . . . 947--953
S. C. De Sarkar and
A. K. Basu and
A. K. Choudhury Simplification of Incompletely Specified
Flow Tables with the Help of Prime
Closed Sets . . . . . . . . . . . . . . 953--956
M. S. Schmookler On Mod-$2$ Sums of Products . . . . . . 957--957
W. A. Davis Logical Design Using Shift Registers . . 958--960
D. Ferrari Correction to ``A Division Method Using
a Parallel Multiplier'' . . . . . . . . 960--960
Anonymous Contributors . . . . . . . . . . . . . . 961--962
L. S. Coles R69-30 Automatic Question-Answering of
English-Like Questions About Simple
Diagrams . . . . . . . . . . . . . . . . 963--963
N. J. Nilson R69-31 A Formal Deductive
Problem-Solving System . . . . . . . . . 963--964
J. V. Garwick R69-32 A Universal Syntax-Directed
Top-Down Analyzer . . . . . . . . . . . 964--965
W. F. Denham R69-33 Applications of Functional
Optimization Techniques for the Serial
Hybrid Computer Solution of Partial
Differential Equations . . . . . . . . . 965--965
Anonymous Abstracts of the Current Computer
Literature . . . . . . . . . . . . . . . 966--984
Anonymous Information for Authors . . . . . . . . 984--a
Anonymous IEEE Transactions on Computers . . . . . c1--984--b
Anonymous Foreword . . . . . . . . . . . . . . . . 985--985
Anonymous 1969 IEEE Computer Group Conference . . 986--986
E. A. Patrick and
F. P. Fischer II Cluster Mapping with Experimental
Computer Graphics . . . . . . . . . . . 987--991
J. Abate and
H. Dubner Optimizing the Performance of a
Drum-Like Storage . . . . . . . . . . . 992--997
L. Schrage Analysis and Optimization of a Queueing
Model of a Real-Time Computer Control
System . . . . . . . . . . . . . . . . . 997--1003
R. M. Jones Factors Affecting the Efficiency of a
Virtual Memory . . . . . . . . . . . . . 1004--1008
P. J. Denning Equipment Configuration in Balanced
Computer Systems . . . . . . . . . . . . 1008--1012
J.-L. E. Baer and
G. Estrin Bounds for Maxium Parallelism in a
Bilogic Graph Model of Computations . . 1012--1014
R. R. Muntz and
E. G. Coffman, Jr. Optimal Preemptive Scheduling on
Two-Processor Systems . . . . . . . . . 1014--1020
E. K. Bowdon, Sr. Priority Assignment in a Network of
Computers . . . . . . . . . . . . . . . 1021--1026
J. W. Jones, Jr. and
C. C. Carroll A Timed-Shared Digital Filter
Realization . . . . . . . . . . . . . . 1027--1030
H. B. Burner and
R. P. Million and
O. W. Rechard and
J. S. Sobolewski A Programmable Data Concentrator for a
Large Computing System . . . . . . . . . 1030--1038
A. Van De Goor and
C. G. Bell and
D. A. Witcraft Design and Behavior of TSS/8: a PDP-8
Based Time-Sharing System . . . . . . . 1038--1043
A. Van De Goor and
C. G. Bell A Control Unit for a DEC PDP-8 Computer
and a Burroughs Disk . . . . . . . . . . 1044--1048
P. I. P. Boulton and
P. A. Reid A Process-Control Language . . . . . . . 1049--1053
I. N. Samuel Synthesis and Analysis: A Flexible
Technique for Processing Command
Language . . . . . . . . . . . . . . . . 1053--1061
F. F. Lee Study of ``Look-Aside'' Memory . . . . . 1062--1064
B. E. Menn Digital Letdown Computer for Vertical
Guidance . . . . . . . . . . . . . . . . 1065--1068
Anonymous Contributors . . . . . . . . . . . . . . 1069--1072
Anonymous Abstracts of Current Computer Literature 1073--1090
Anonymous Information for Authors . . . . . . . . 1090--c
Anonymous Editor's Notice . . . . . . . . . . . . 1091--1091
I. E. Sutherland A Method for Solving Arbitrary-Wall
Mazes by Computer . . . . . . . . . . . 1092--1097
E. S. Davidson An Algorithm for NAND Decomposition
Under Network Constraints . . . . . . . 1098--1109
D. B. Armstrong and
A. D. Friedman and
P. R. Menon Design of Asynchronous Circuits Assuming
Unbounded Gate Delays . . . . . . . . . 1110--1120
H. A. Curtis Systematic Procedures for Realizing
Synchronous Sequential Machines Using
Flip-Flop Memory: Part I . . . . . . . . 1121--1127
L. P. Bolgiano, Jr. and
M. J. Piovoso Relationship of Poisson Transform to
Laguerre Expansions . . . . . . . . . . 1128--1131
W. K. Pratt An Algorithm for a Fast Hadamard Matrix
Transform of Order Twelve . . . . . . . 1131--1132
O. Aberth A Multiple Computer Linkage . . . . . . 1132--1134
J. R. Ullmann Experiments with the $n$-tuple Method of
Pattern Recognition . . . . . . . . . . 1135--1137
W. E. Thomson Comment on ``Solution of Nonlinear
Equations'' . . . . . . . . . . . . . . 1138--1138
J. T. Taylo Note on ``Solution of Nonlinear
Equations'' . . . . . . . . . . . . . . 1138--1140
M. C. Y. Kuo Author's Reply . . . . . . . . . . . . . 1140--1142
T. D. Friedman and
S. C. Yang Correction to ``Methods Used in an
Automatic Logic Design Generator
(ALERT)'' . . . . . . . . . . . . . . . 1142--1143
Anonymous Digital Engineering . . . . . . . . . . 1144--1144
Anonymous Contributors . . . . . . . . . . . . . . 1145--1145
R. C. Minnick B69-1 Digital Computer System Principles 1146--1146
Anonymous Abstracts of Current Computer Literature 1147--1222
Anonymous Information for Authors . . . . . . . . 1222--m
Anonymous 1969 Index IEEE Transactions on
Computers Vol. C-18 . . . . . . . . . . 1222--a-1222--k
Anonymous IEEE Transactions on Computers . . . . . c1--1222--n