Last update:
Wed Sep 27 16:48:49 MDT 2023
Michael Kagan and
Simcha Gochman and
Doron Orenstien and
Derrick Lin MMX Microarchitecture of Pentium
Processors With MMX Technology and
Pentium II Microprocessors . . . . . . . 8
James C. Abel and
Michael A. Julier Implementation of a High Quality Dolby
Digital Decoder using MMX Technology . . 11
Millind Mittal and
Alex Peleg and
Uri Weiser MMX Technology Architecture Overview . . 12
Anonymous Special issue on MMX Technology . . . .
Sanjiv Mittal and
Peter McNally Line Defect Control to Maximize Yields 3
Karl G. Kempf Improving Throughput Across the Factory
Life-Cycle . . . . . . . . . . . . . . . 6
Chris J. McDonald The Evolution of Intel's Copy EXACTLY!
Technology Transfer Method . . . . . . . 6
John E. Bjorkholm EUV Lithography --- The Successor to
Optical Lithography? . . . . . . . . . . 8
Eugene S. Meieran 21st Century Semiconductor Manufacturing
Capabilities . . . . . . . . . . . . . . 8
A. Brand and
A. Haranahalli and
N. Hsieh and
Y. C. Lin and
G. Sery and
N. Stenton and
B. J. Woo and
S. Ahmed and
M. Bohr and
S. Thompson and
S. Yang Intel's 0.25 Micron, 2.0Volts Logic
Process Technology . . . . . . . . . . . 9
Hani ElGebaly Characterization of Multimedia Streams
of an H.323 Terminal . . . . . . . . . . 9
Court Hilton Manufacturing Operations System Design
and Analysis . . . . . . . . . . . . . . 9
Bradley Mitchell Scalable Platform Services on the Intel
TFLOPS Supercomputer . . . . . . . . . . 9
Marius Cornea-Hasegan Proving the IEEE Correctness of
Iterative Floating-Point Square Root,
Divide, and Remainder Algorithms . . . . 11
Greg Henry and
Pat Fay and
Ben Cole and
Timothy G. Mattson The Performance of the Intel TFLOPS
Supercomputer . . . . . . . . . . . . . 11
Yeoh Eng Hong and
Lim Seong Leong and
Wong Yik Choong and
Lock Choon Hou and
Mahmud Adnan An Overview of Advanced Failure Analysis
Techniques for Pentium and Pentium Pro
Microprocessors . . . . . . . . . . . . 11
K. Seshan and
T. J. Maloney and
K. J. Wu Quality and Reliability of Intel's
Quarter Micron Process . . . . . . . . . 11
James Toga and
Hani ElGebaly Demystifying Multimedia Conferencing
Over the Internet Using the H.323 Set of
Standards . . . . . . . . . . . . . . . 11
Sharad Garg and
Robert Godley and
Richard Griffiths and
Andrew Pfiffer and
Terry Prickett and
David Robboy and
Stan Smith and
T. Mack Stallcup and
Stephan Zeisset Achieving Large Scale Parallelism
Through Operating System Resource
Management on the Intel TFLOPS
Supercomputer . . . . . . . . . . . . . 12
Timothy G. Mattson and
Greg Henry An Overview of the Intel TFLOPS
Supercomputer . . . . . . . . . . . . . 12
Daniel Seligson Planning for the 300mm Transition . . . 14
Gary R. Bradski Computer Vision Face Tracking For Use in
a Perceptual User Interface . . . . . . 15
Milind Girkar and
Mohammad R. Haghighat and
Paul Grey and
Hideki Saito and
Nicholas Stavrakos and
Constantine D. Polychronopoulos Illinois-Intel Multithreading Library:
Multithreading Support for Intel
Architecture Based Multiprocessor
Systems . . . . . . . . . . . . . . . . 15
Scott Thompson and
Paul Packan and
Mark Bohr MOS Scaling: Transistor Challenges for
the 21st Century . . . . . . . . . . . . 19
Stephen Fischer and
James Mi and
Albert Teng Pentium III Processor Serial Number
Feature and Applications . . . . . . . . 6
Kathy Carver and
Chuck Fleckenstein and
Joshua LeVasseur and
Stephan Zeisset Porting Operating System Kernels to the
IA-64 Architecture for Pre-silicon
Validation Purposes . . . . . . . . . . 7
Chuck Fleckenstein and
Kathy Carver and
Joshua LeVasseur and
Stephan Zeisset Porting Operating System Kernels to the
IA-64 Architecture for Pre-silicon
Validation Purposes . . . . . . . . . . 7
John Harrison and
Ted Kubaska and
Shane Story and
Ping Tak Peter Tang The Computation of Transcendental
Functions on the IA-64 Architecture . . 7
Satyendra Yadav and
Sanjay Bakshi and
Dave Putzolu and
Raj Yavatkar The Phoenix Framework: A Practical
Architecture for Programmable Networks 7
Bharat Krishna and
Gil Kleinfeld Circuit Design Environment and Layout
Planning . . . . . . . . . . . . . . . . 8
Shreekant (Ticky) Thakkar and
Tom Huff The Internet Streaming SIMD Extensions 8
Christian Dreke Introduction to Personal Communication
on the Internet . . . . . . . . . . . . 9
Vineet Kumar Supplementary Services in the H.323 IP
Multimedia Telephony Network . . . . . . 9
V. Nagbhushan and
Yehuda Shiran and
Satish Venkatesan and
Tamar Yehoshua Nike's Software Architecture and
Infrastructure: Enabling Integrated
Solutions for Gigahertz Designs . . . . 9
Hani ElGebaly Reactive Mechanisms for Recovering Audio
Performance in Multimedia Conferencing
Over Packet Switched Networks . . . . . 10
Shesha Krishnapura and
Ty Tang and
Vipul Lal CAD Design Flows Development in a
Cross-Platform Computing Environment . . 10
John O'Leary and
Xudong Zhao and
Rob Gerth and
Carl-Johan H. Seger Formally Verifying IEEE Compliance of
Floating-Point Hardware . . . . . . . . 10
Ady Tal and
Vadim Bassin and
Shay Gal-On and
Elena Demikhovsky Assembly Language Programming Tools for
the IA-64 Architecture . . . . . . . . . 10
Jagannath Keshava and
Vladimir Pentkovski Pentium III Processor Implementation
Tradeoffs . . . . . . . . . . . . . . . 11
Joe H. Wolf Programming Methods for the Pentium III
Processor's Streaming SIMD Extensions
Using the VTune Performance Enhancement
Environment . . . . . . . . . . . . . . 11
Paul M. Zagacki and
Deep Buch and
Emile Hsieh and
Daniel Melaku and
Vladimir Pentkovski and
Hsien-Hsin Lee Architecture of a 3D Software Stack for
Peak Pentium III Processor Performance 11
James Abel and
Kumar Balasubramanian and
Mike Bargeron and
Tom Craver and
Mike Phlipot Applications Tuning for Streaming SIMD
Extensions . . . . . . . . . . . . . . . 13
Sanjay Sengupta and
Sandip Kundu, Sr.eejit Chakravarty and
Praveen Parvathala and
Rajesh Galivanche and
George Kosonocky and
Mike Rodgers and
TM Mak Defect-Based Test: A Key Enabler for
Successful Migration to Structural Test 14
Richard Uhlig and
Roman Fishtein and
Oren Gershon and
Israel Hirsh and
Hong Wang SoftSDV: A Pre-silicon Software
Development Environment for the IA-64
Architecture . . . . . . . . . . . . . . 14
Carole Dulong and
Rakesh Krishnaiyer and
Dattatraya Kulkarni and
Daniel Lavery and
Wei Li and
John Ng and
David Sehr An Overview of the Intel IA-64 Compiler 15
Marius Cornea-Hasegan and
Bob Norin IA-64 Floating-Point Operations and the
IEEE Standard for Binary Floating-Point
Arithmetic . . . . . . . . . . . . . . . 16
Tim Chan and
Amit Chowdhary and
Bharat Krishna and
Artour Levin and
Gary Meeker and
Naresh Sehgal Challenges of CAD Development for
Datapath Design . . . . . . . . . . . . 17
Anonymous Special issue on Intel Architecture
64-bit (IA-64) Technology . . . . . . .
Sultan Weatherspoon Overview of IEEE 802.11b Security . . . 5
Phillip Ames and
John Gabor The Evolution of Third-Generation
Cellular Standards . . . . . . . . . . . 6
Brad Coyne and
Sonja K. Sandeen e-Business Asset Management and Capacity
Planning . . . . . . . . . . . . . . . . 6
Michael Schlierf and
Michael Fuller and
Mike Kerr Certifying Service Reliability in Data
Centers . . . . . . . . . . . . . . . . 6
Atul Aneja and
Chia Rowan and
Brian Brooksby Corporate Portal Framework for
Transforming Content Chaos on Intranets 7
Tom Dory and
Kenji Takahashi and
Tomomi Kume and
Jiro Kubota and
Seiichiro Seki and
Takaharu Fujiyama Simultaneous Chip-Join and Underfill
Assembly Technology for Flip-Chip
Packaging . . . . . . . . . . . . . . . 7
Kristoffer Fleming and
Robert J. Hunter and
Jon Inouye and
Jeffrey Schiffer Enabling Always On, Always Connected
(AOAC) Computing with Bluetooth
Technology . . . . . . . . . . . . . . . 7
James Kardach Bluetooth Architecture Overview . . . . 7
Graham Kirby Integrating Bluetooth Technology into
Mobile Products . . . . . . . . . . . . 8
Nicholas P. Mencinger A Mechanism-Based Methodology for
Processor Package Reliability
Assessments . . . . . . . . . . . . . . 8
Pooya Tadayon Thermal Challenges During Microprocessor
Testing . . . . . . . . . . . . . . . . 8
Alan Hodgson Intel eBusiness Engineering Release
Management and Application Landing . . . 9
Mirng-Ji Lii and
Bob Sankman and
Hamid Azimi and
Hwai Peng Yeoh and
Yuejin Guo Flip-Chip Technology on Organic Pin Grid
Array Packages . . . . . . . . . . . . . 9
Kris Fleming and
Uma Gadamsetty and
Robert J. Hunter, Sr.ikanth Kambhatla, Sr.idhar Rajagopal and
Sundaram Ramakesavan Architectural Overview of Intel's
Bluetooth Software Stack . . . . . . . . 10
Ravi Mahajan and
Ken Brown and
Vasu Atluri The Evolution of Microprocessor
Packaging . . . . . . . . . . . . . . . 10
Cindy Bickerstaff and
Sally Hambridge and
Lynne Marchi and
Tod Oace and
Stacy Purcell and
Jeff Sedayao and
Charles Smothers and
Ken True Intel's Internet Connectivity:
Evolution, Technical Architecture, and
Future Directions . . . . . . . . . . . 11
Tom Fieldhouse and
Mark Greinke and
Jay Hahn-Steichen and
Jackson He and
John Vliet Evolution of Intel's e-Business Data
Center Architecture From Yesterday to
Tomorrow . . . . . . . . . . . . . . . . 11
Lynne Marchi and
Sridhar Mahankali and
Jeff Sedayao IP Addressing Space Design Issues For
Internet Data Centers . . . . . . . . . 12
Paul Calame and
Ravi Nannapaneni and
Scott Peterson and
Jay Turpin and
James Yu Cockpit: Decision Support Tool for
Factory Operations and Supply Chain
Management . . . . . . . . . . . . . . . 13
John Vicente and
Harold Cartmill and
Glen Maxson and
Shelby Siegel and
Russ Fenger Managing Enhanced Network Services: A
Pragmatic View of Policy-Based
Management . . . . . . . . . . . . . . . 13
Patricia J. O'Sullivan and
Don S. Whitecar Implementing an Industry e-Business
Initiative: Getting to RosettaNet . . . 15
Ram Viswanath and
Vijay Wakharkar and
Abhay Watwe and
Vassou Lebonheur Thermal Performance Challenges from
Silicon to Systems . . . . . . . . . . . 16
Lesley Polka and
Shamala Chickamenahalli and
Chee-Yee Chung and
David G. Figueroa and
Yuan-Liang Li and
Kim Merley and
Dustin Wood and
Larry Zu Package-Level Interconnect Design for
Optimum Electrical Performance . . . . . 17
Bob Bentley and
Rand Gray Validating the Intel Pentium 4 Processor 8
Aart Bik and
Milind Girkar and
Paul Grey and
Xinmin Tian Efficient Exploitation of Parallelism on
Pentium III and Pentium 4
Processor-Based Systems . . . . . . . . 9
Stephen H. Gunther and
Frank Binns and
Douglas M. Carmean and
Jonathan C. Hall Managing the Impact of Increasing
Microprocessor Power Consumption . . . . 9
Glenn Hinton and
Dave Sager and
Mike Upton and
Darrell Boggs and
Doug Carmean and
Alan Kyker and
Patrice Roussel The Microarchitecture of the Pentium 4
Processor . . . . . . . . . . . . . . . 13
Rajesh Kumar Interconnect and Noise Immunity Design
for the Pentium 4 Processor . . . . . . 12
R. Scott Tetrick and
Blaise Fanning and
Robert Greiner and
Tom Huff and
Lance Hacking and
David Hill and
Srinivas Chennupaty and
David Koufaty and
Subba Palacharla and
Jeff Rabe and
Mike Derr A Discussion of PC Platform Balance: the
Intel Pentium 4 Processor-Based Platform
Solutions . . . . . . . . . . . . . . . 13
Andrew M. Volk and
Peter A. Stoll and
Paul Metrovich Recollections of Early Chip Development
at Intel . . . . . . . . . . . . . . . . 12
Steve Bard Wireless Convergence of PC and Consumer
Electronics in the e-Home . . . . . . . 11
Joey Chou Open CPE Architecture: A Solution to the
Delivery of Integrated Services over
Broadband . . . . . . . . . . . . . . . 10
Jeff Foerster and
Evan Green and
Srinivasa Somayazulu and
David Leeper Ultra-Wideband Technology for Short- or
Medium-Range Wireless Communications . . 11
Craig Merrick and
Robert Dunstan and
Michael Jeronimo Extending the PC in the Home . . . . . . 13
Greg Regnier CSP: A System-Level Architecture for
Scalable Communication Services . . . . 6
Genevieve Bell Looking Across the Atlantic: Using
Ethnographic Methods to Make Sense of
Europe . . . . . . . . . . . . . . . . . 10
Carole Dulong and
Priti Shrivastav and
Azita Refah The Making of a Compiler for the
Intel\reg Itanium Processor . . . . . . 7
Leslie Ann Rusch Indoor Wireless Communications: Capacity
and Coexistence on the Unlicensed Bands 10
Kumud M. Srinivasan The Evolving Role of Automation in
Intel\reg Microprocessor Development and
Manufacturing . . . . . . . . . . . . . 7
Scott Boss Audio Software for the Intel\reg Play
Computer Sound Morpher . . . . . . . . . 11
Scott Boss and
Henry Bruce and
Charlie Case and
Kendal Miller Developing Smart Toys---From Idea to
Product . . . . . . . . . . . . . . . . 9
Michael M. Conti and
Riley Jackson and
Henry Bruce Technology and Play Pattern: Intel\reg
Play Digital Movie Creator . . . . . . . 7
Herman D'Hooge and
Michael Goldsmith Game Design Principles for the Intel\reg
Play Me2Cam* Virtual Game System . . . . 9
Herman D'Hooge and
Melanie Goldstein History of the Smart Toy Lab and
Intel\reg Play Toys . . . . . . . . . . 6
Lenka Jelinek and
Geoff Peters and
Jim Okuley and
Steve McGowan Dissection of the Intel\reg Play QX3
Computer Microscope . . . . . . . . . . 10
Lin Chao Preface: Q1. 2002 . . . . . . . . . . . 2--2
Robert L. Cross ITJ Foreword Q1, 2002: Intel\reg
Hyper-Threading Technology . . . . . . . 3--3
Deborah T. Marr and
Frank Binns and
David L. Hill and
Glenn Hinton and
David A. Koufaty and
J. Alan Miller and
Michael Upton Hyper-Threading Technology Architecture
and Microarchitecture . . . . . . . . . 4--15
David Burns Pre-Silicon Validation of
Hyper-Threading Technology . . . . . . . 16--21
Hong Wang and
Perry H. Wang and
Ross Dave Weldon and
Scott M. Ettinger and
Hideki Saito and
Milind Girkar and
Steve Shih-wei Liao and
John P. Shen Speculative Precomputation: Exploring
the Use of Multithreading for Latency
Tools . . . . . . . . . . . . . . . . . 22--35
Xinmin Tian and
Aart Bik and
Milind Girkar and
Paul Grey and
Hideki Saito and
Ernesto Su Intel\reg OpenMP C++/Fortran Compiler
for Hyper-Threading Technology:
Implementation and Performance . . . . . 36--46
Yen-Kuang Chen and
Matthew Holliman and
Eric Debes and
Sergey Zheltov and
Alexander Knyazev and
Stanislav Bratanov and
Roman Belenov and
Ishmael Santos Media Applications on Hyper-Threading
Technology . . . . . . . . . . . . . . . 47--57
William Magro and
Paul Petersen and
Sanjiv Shah Hyper-Threading Technology: Impact on
Compute-Intensive Workloads . . . . . . 58--66
Anonymous Preface . . . . . . . . . . . . . . . . 3--3
Mark Bohr Semiconductor Technology and
Manufacturing---Current and Future . . . 4--4
Scott Thompson and
Mohsen Alavi and
Makarem Hussein and
Pauline Jacob and
Chris Kenyon and
Peter Moon and
Matthew Prince and
Sam Sivakumar and
Sunit Tyagi, Jr. and
Mark Bohr 130nm Logic Technology Featuring 60nm
Transistors, Low-K Dielectrics and Cu
Interconnects . . . . . . . . . . . . . 5--13
Sanjay Natarajan and
Melton Bost and
Derek Fisher and
David Krick and
Chris Kenyon and
Chris Kardas and
Chris Parker and
Robert Gasser, Jr. Process Development and Manufacturing of
High-Performance Microprocessors on
300mm Wafers . . . . . . . . . . . . . . 14--22
Al Fazio and
Stephen Keeney and
Stefan Lai ETOX\TM Flash Memory Technology: Scaling
and Integration Challenges . . . . . . . 23--30
Kelin J. Kuhn and
Shahriar Ahmed and
Peter Vandervoorn and
Anand Murthy and
Borna Obradovic and
Kartik Raol and
Wei-kai Shih and
Iwen Chao and
Ian Post and
Steve Chambers Integration of Mixed-Signal Elements
into a High-Performance Digital CMOS
Process . . . . . . . . . . . . . . . . 31--41
Brian Doyle and
Reza Arghavani and
Doug Barlage and
Suman Datta and
Mark Doczy and
Jack Kavalieros and
Anand Murthy and
Robert Chau Transistor Elements for 30nm Physical
Gate Length and Beyond . . . . . . . . . 42--54
Peter J. Silverman The Intel Lithography Roadmap . . . . . 55--61
Ravi Mahajan and
Raj Nair and
Vijay Wakharkar and
Johanna Swan and
John Tang and
Gilroy Vandentop Emerging Directions for Packaging
Technologies . . . . . . . . . . . . . . 62--75
Lin Chao Preface . . . . . . . . . . . . . . . . 3--3
Jim Finnegan Foreword Q3, 2002 ITJ: Innovations in
Network Processors . . . . . . . . . . . 4--5
Matthew Adiletta and
Mark Rosenbluth and
Debra Bernstein and
Gilbert Wolrich and
Hugh Wilkinson The Next Generation of Intel IXP Network
Processors . . . . . . . . . . . . . . . 6--18
Sridhar Lakshmanamurthy and
Kin-Yip Liu and
Yim Pun and
Larry Huston and
Uday Naik Network Processor Performance Analysis
Methodology . . . . . . . . . . . . . . 19--28
Matthew Adiletta and
Donald Hooper and
Myles Wilde Packet over SONET: Achieving 10
Gigabit/sec Packet Processing with an
IXP2800 . . . . . . . . . . . . . . . . 29--39
Wajdi Feghali and
Brad Burres and
Gilbert Wolrich and
Douglas Carrigan Security: Adding Protection to the
Network via the Network Processor . . . 40--49
Uday Naik and
Alex Shoykhet and
Larry Huston and
Donald Hooper and
Raj Yavatkar and
Duke Tallam and
Travis Schluessler and
Prashant Chandra and
Adrian Georgescu IXA Portability Framework: Preserving
Software Investment in Network Processor
Applications . . . . . . . . . . . . . . 50--60
Harsh Vipat and
Philip Mathew and
Manohar Ruben Castelino and
Auro Tripathy Network Processor Building Blocks for
All-IP Wireless Network . . . . . . . . 61--69
Jaroslaw Sydir and
Prashant Chandra and
Alok Kumar and
Sridhar Lakshmanamurthy and
Longsong Lin and
Muthaiah Venkatachalam Implementing Voice over AAL2 on a
Network Processor . . . . . . . . . . . 70--82
Ram Bhamidipati and
Ahmad Zaidi and
Siva Makineni and
Kah K. Low and
Robert Chen and
Kin-Yip Liu and
Jack Dahlgren Challenges and Methodologies for
Implementing High-Performance Network
Processors . . . . . . . . . . . . . . . 83--92
Lin Chao Digital Content Distribution in the Home 3--3
Abel Weinrib and
Gerald Holzhammer Interoperable Home Infrastructure . . . 4--4
Yasser Rasheed and
Jim Edwards and
Charlie Tai Home Interoperability Framework for the
Digital Home . . . . . . . . . . . . . . 5--16
Yasser Rasheed and
John Ritchie High-Quality Media Distribution in the
Home . . . . . . . . . . . . . . . . . . 17--29
Mark R. Walker and
Jim Edwards and
Michael Jeronimo and
John G. Ritchie and
Ylian Saint-Hilaire Remote I/O: Freeing the Experience from
the Platform with UPnP* Architecture . . 30--36
Carl M. Ellison Home Network Security . . . . . . . . . 37--48
Michael Ripley and
C. Brendan S. Traw and
Steve Balogh and
Michael Reed Content Protection in the Digital Home 49--55
Lakshman Krishnamurthy and
Steven Conner and
Mark Yarvis and
Jasmeet Chhabra and
Carl Ellison and
Chuck Brabenac and
Ernest Tsui Meeting the Demands of the Digital Home
with High-Speed Multi-Hop Wireless
Networks . . . . . . . . . . . . . . . . 57--68
Venkat R. Gokulrangan Internetworking Using IPv6 Technology
Inside and Outside the Home . . . . . . 69--77
Lin Chao Preface Q1, 2003, ITJ . . . . . . . . . 3--3
Justin Rattner Foreword: Managed Runtime Technologies 4--4
Michal Cierniak and
Marsha Eng and
Neal Glew and
Brian Lewis and
James Stichnoth The Open Runtime Platform: a Flexible
High-Performance Managed Runtime
Environment . . . . . . . . . . . . . . 5--18
Ali-Reza Adl-Tabatabai and
Jay Bharadwaj and
Dong-Yuan Chen and
Anwar Ghuloum and
Vijay Menon and
Brian Murphy and
Mauricio Serrano and
Tatiana Shpeisman The StarJIT Compiler: a Dynamic Compiler
for Managed Runtime Environments . . . . 19--31
Kingsum Chow and
Ricardo Morin and
Kumar Shiv Enterprise Java Performance: Best
Practices . . . . . . . . . . . . . . . 32--46
George Vorobiov and
Carl Dichter and
John Benninghoff and
Charlie Hewett Developing and Optimizing Web
Applications on ASP .NET Platform . . . 47--59
Selim Aissi Runtime Environment Security Models . . 60--67
Lynn Comp and
Tim Dobbing Runtime Abstractions in the Wireless and
Handheld Space . . . . . . . . . . . . . 68--76
Paul Drews and
Doug Sommer and
Roger Chandler and
Terry Smith Managed Runtime Environments for
Next-Generation Mobile Devices . . . . . 77--82
Lin Chao Preface Q2, 2003 ITJ . . . . . . . . . . 3--3
Anand Chandrasekher and
David Perlmutter Foreword: Intel\reg Centrino\TM Mobile
Technology . . . . . . . . . . . . . . . 4--5
Gordon Chinn and
Sanjiv Desai and
Eric DiStefano and
Krishnan Ravichandran and
Shreekant (Ticky) Thakkar Mobile PC Platforms Enabled with
Intel\reg Centrino\TM Mobile Technology 6--15
Shailesh Trivedi and
Tom Shewchuk and
Aditya Sreenivas and
Terry Fletcher and
Michael de la Cruz Innovation Brings Low Power Integrated
Graphics to the Intel\reg Centrino\TM
Mobile Technology Platform . . . . . . . 16--20
Simcha Gochman and
Ronny Ronen and
Ittai Anati and
Ariel Berkovits and
Tsvika Kurts and
Alon Naveh and
Ali Saeed and
Zeev Sperber and
Robert C. Valentine The Intel\reg Pentium\reg M Processor:
Microarchitecture and Performance . . . 21--59
Isic Silas and
Igor Frumkin and
Eilon Hazan and
Ehud Mor and
Genadiy Zobin System-Level Validation of the Intel\reg
Pentium\reg M Processor . . . . . . . . 37--43
Dani Genossar and
Nachum Shamir Intel\reg Pentium\reg M Processor Power
Estimation, Budgeting, Optimization and
Validation . . . . . . . . . . . . . . . 44--49
Yuval Finkelstein Antenna Selection in Multicarrier
Communication Systems . . . . . . . . . 50--58
Lin Chao Preface: Wireless Technologies . . . . . 3--3
Gadi Singer Foreword: Wireless Technologies . . . . 4--4
Henry Chesbrough Open Platform Innovation: Creating Value
from Internal and External Innovation 5--9
Prakash Iyer and
Victor Lortz and
Lee Tapper and
Roger Chandler and
Roxanne Gryder Public Wireless LAN Hotspot Deployment
and Internetworking . . . . . . . . . . 10--19
Ofer Bar-Shalom and
Gordon Chinn and
Kris Fleming and
Uma Gadamsetty On the Union of WPAN and WLAN in Mobile
Computers and Hand-Held Devices . . . . 20--36
Amber Sistla and
Jeremy Rover and
Asha Keddy Dynamic Wired and Wireless Networks on
Demand . . . . . . . . . . . . . . . . . 37--46
Boyd Bangerter and
Eric Jacobsen and
Minnie Ho and
Adrian Stephens and
Alexander Maltsev and
Alexey Rubtsov and
Ali Sadri High-Throughput Wireless LAN Air
Interface . . . . . . . . . . . . . . . 47--57
Allan Chin and
Ajay Gupta and
Ranjit Narjala and
Venkata Vallabhu Seamless Connectivity to Wireless Local
Area Networks . . . . . . . . . . . . . 58--67
Jim Finnegan Preface on Communications Processing,
Intel Technology Journal . . . . . . . . 3--5
Sean Maloney Foreword: Communications Processing . . 6--6
Matthew M. Boam and
Jay Gilbert and
Tisson K. Mathew and
Karel Rasovsky and
Raj Sistla Modular Communications Platform . . . . 7--16
Brian Peebles and
Chuck Narad and
Victoria Genovker and
Karel Rasovsky and
Jay Gilbert Fabrics and Application Characteristics
for AdvancedTCA Architectures . . . . . 17--28
Sharad Garg and
Raj Sistla and
Ramesh Caushik and
Julie Fleischer and
Rusty Lynch AdvancedTCA/CGL Advantage: HA and TCO 29--38
Dave Minturn and
Greg Regnier and
Jon Krueger and
Ravishankar Iyer and
Srihari Makineni Addressing TCP/IP Processing Challenges
Using the IA and IXP Processors . . . . 39--50
Manasi Deval and
Hormuzd Khosravi and
Rajeev Muralidhar and
Suhail Ahmed and
Sanjay Bakshi and
Raj Yavatkar Distributed Control Plane Architecture
for Network Elements . . . . . . . . . . 51--63
Stephen D. Goglin and
Donald Hooper and
Alok Kumar and
Raj Yavatkar Advanced Software Framework, Tools, and
Languages for the IXP Family . . . . . . 64--76
Peter Brink and
Manohar Castelino and
David Meng and
Chetan Rawal and
Hari Tadepalli Network Processing Performance Metrics
for the IA- and IXP-Based systems . . . 77--91
Matthew Adiletta and
John Beck and
Doug Carrigan and
Mark Rosenbluth and
Bill Tiso and
Frank Hady Enterprise Edge Convergence: Packet
Processing and Computing Silicon in the
Data Center . . . . . . . . . . . . . . 92--106
Bapi Vinnakota and
Paul Dormitzer and
Mark Rosenbluth and
Sridhar Lakshmanamurthy Scalable Intel\reg IXA and its Building
Blocks for Networking Platforms . . . . 107--121
Lin Chao Preface . . . . . . . . . . . . . . . . iii--iii
William M. Siu Foreword . . . . . . . . . . . . . . . . v--vi
Darrell Boggs and
Aravindh Baktha and
Jason Hawkins and
Deborah T. Marr and
J. Alan Miller and
Patrice Roussel and
Ronak Singhal and
Bret Toll and
K. S. Venkatraman The Microarchitecture of the Intel\reg
Pentium\reg 4 Processor on 90nm
Technology . . . . . . . . . . . . . . . 1--17
Kevin B. Smith and
Aart J. C. Bik and
Xinmin Tian Support for the Intel\reg Pentium\reg 4
Processor with Hyper-Threading
Technology in Intel\reg 8.0 Compilers 19--31
Ronak Singhal and
K. S. Venkatraman and
. Evan R. Cohn and
John G. Holm and
David A. Koufaty and
Meng-Jang Lin and
Mahesh J. Madhav and
Markus Mattwandel and
Nidhi Nidhi and
Jonathan D. Pearce and
Madhusudanan Seshadri Performance Analysis and Validation of
the Intel\reg Pentium\reg 4 Processor on
90nm Technology . . . . . . . . . . . . 33--42
Dan J. Deleganes and
Micah Barany and
Daniel Chow and
Tom D. Fletcher and
George L. Geannopoulos and
Kurt Kreitzer and
Anant P. Singh and
Sapumal B. Wijeratne LVS Technology for the Intel\reg
Pentium\reg 4 Processor on 90nm
Technology . . . . . . . . . . . . . . . 43--53
Barbara Chappell and
Amanda Duncan and
Kiran Ganesh and
Manoj Gunwani and
Abhinav Sharma and
Desktop Madhu Swarna Library Architecture Challenges for
Cell-Based Design . . . . . . . . . . . 55--61
Ravishankar Kuppuswamy and
Peter DesRosier and
Derek Feltham and
Rehan Sheikh and
Paul Thadikaran Full Hold-Scan Systems in
Microprocessors: Cost/Benefit Analysis 63-
Lin Chao Preface . . . . . . . . . . . . . . . . iii--iv
Mario Paniccia Foreword: a New Era in Optical
Communications . . . . . . . . . . . . . v--vi
Anonymous Technical Reviewers . . . . . . . . . . vii--vii
Pierre Herve and
Shlomo Ovadia Optical Technologies for Enterprise
Networks . . . . . . . . . . . . . . . . 73--82
Peter Kirkpatrick and
Wei-chiao Fang and
Henrik Johansen and
Benny Christensen and
Jesper Hanberg and
Martin Lobel and
Tom Mader and
Song Shang and
Craig Schulz and
Doug Sprock and
Marc Verdiell 10 Gb/s Optical Transceivers:
Fundamentals and Emerging Technologies 83--99
Marc Finot and
Mark McDonald and
Andrew Daiber and
William B. Chapman and
Delin Li and
Marc Epitaux and
Eric Zbinden and
Jeff Bennett and
William J. Kozlovsky and
Jean-Marc Verdiell Automated Optical Packaging Technology
for 10 Gb/s Transceivers and its
Application to a Low-Cost Full C-Band
Tunable Transmitter . . . . . . . . . . 101--114
Edris Mohammed and
Andrew Alduino and
Thomas Thomas and
Henning Braunisch and
Daoqiang Lu and
John Heck and
Ansheng Liu and
Ian Young and
Brandon Barnett and
Gilroy Vandentop and
Randy Mooney Optical Interconnect System Integration
for Ultra-Short-Reach Applications . . . 115--127
Mauro J. Kobrinsky and
Bruce A. Block and
Jun-Fei Zheng and
Brandon C. Barnett and
Edris Mohammed and
Miriam Reshotko and
Frank Robertson and
Scott List and
Ian Young and
Kenneth Cadien On-Chip Optical Interconnects . . . . . 129--141
Mike Salib and
Ling Liao and
Richard Jones and
Mike Morse and
Ansheng Liu and
Dean Samara-Rubio and
Drew Alduino and
Mario Paniccia Silicon Photonics . . . . . . . . . . . 143--160
John M. Hutchinson and
Jun-Fei Zheng and
Jonathon S. Barton and
Jeffrey A. Henness and
Milan L. Maaanovi and
Matthew N. Sysak and
Leif A. Johansson and
Daniel J. Blumenthal and
Larry A. Coldren and
Hilmi Volkan Demir and
Edward. L. Ginzton and
Vijit A. Sabnis and
Onur Fidaner and
James S. Harris and
David A. B. Miller Indium Phosphide-Based Optoelectronic
Wavelength Conversion for High-Speed
Optical Networks . . . . . . . . . . . . 161--171
Lin Chao Preface . . . . . . . . . . . . . . . . iii--iv
Scott G. Richardson Foreword: Emerging Broadband Networks:
The Case for WiMAX . . . . . . . . . . . v--vi
Anonymous Technical Reviewers . . . . . . . . . . vii--vii
Ed Agis and
Henry Mitchel and
Shlomo Ovadia and
Selim Aissi and
Sanjay Bakshi and
Prakash Iyer and
Masud Kibria and
Christopher Rogers and
James Tsai Global, Interoperable Broadband Wireless
Networks: Extending WiMAX Technology to
Mobility . . . . . . . . . . . . . . . . 173--187
Balvinder Bisla and
Roger Eline and
Luiz M. Franca-Neto RF System and Circuit Challenges for
WiMAX . . . . . . . . . . . . . . . . . 189--200
Hassan Yaghoobi Scalable OFDMA Physical Layer in IEEE
802.16 WirelessMAN . . . . . . . . . . . 201--212
Govindan Nair and
Joey Chou and
Tomasz Madejski and
Krzysztof Perycz and
David Putzolu and
Jerry Sydir IEEE 802.16 Medium Access Control and
Service Provisioning . . . . . . . . . . 213--228
Atul Salvekar and
Sumeet Sandhu and
Qinghua Li and
Minh-Anh Vuong and
Xiaoshu Qian Multiple Antenna Technology in WiMAX
Systems . . . . . . . . . . . . . . . . 229--239
Luiz M. Franca-Neto and
Roger Eline and
Bisla Balvinder Fully Integrated CMOS Radios from RF to
Millimeter Wave Frequencies . . . . . . 241--258
Lin Chao Preface . . . . . . . . . . . . . . . . iii--iii
Doug Busch Foreword: Building Intel Leadership in
Enterprise Computing . . . . . . . . . . v--vi
Anonymous Technical Reviewers . . . . . . . . . . vii--vii
George Brown and
Thomas Gardos and
Jay Hopman and
Hong Li and
Sigal Louchheim and
Cynthia Pickering and
Jeff Sedayao and
John Vicente The Proactive Enterprise . . . . . . . . 259--267
Jeff Sedayao and
John Vicente and
Rita Wouhaybi and
Hong Li and
Manish Dave and
Sanjay Rungta and
Stacy Purcell PlanetLab and its Applicability to the
Proactive Enterprise . . . . . . . . . . 269--277
Brian Melcher and
Bradley Mitchell Towards an Autonomic Framework:
Self-Configuring Network Services and
Developing Autonomic Applications . . . 279--290
Dilip Krishnaswamy and
John Vicente Scalable Adaptive Wireless Networks for
Multimedia in the Proactive Enterprise 291--301
Sanjay Rungta and
Anant Raman and
Toby Kohlenberg and
Hong Li and
Manish Dave and
Greg Kime Bringing Security Proactively Into the
Enterprise . . . . . . . . . . . . . . . 303--311
Michael A. Kozuch and
Casey J. Helfrich and
David O. Hallaron and
Mahadev Satyanarayanan Enterprise Client Management with
Internet Suspend/Resume . . . . . . . . 313--323
Randall Goodwin and
Russell Miller and
Eugene Tuv and
Alexander Borisov and
Mani Janakiram and
Sigal Louchheim Advancements and Applications of
Statistical Learning/Data Mining in
Semiconductor Manufacturing . . . . . . 325--336
Thiru Thangarathinam and
Gregg Wyant and
Jacque Gibson and
John Simpson Metadata Management: the Foundation for
Enterprise Information Integration . . . 337--344
George Brown and
Robert Carpenter Successful Application of
Service-Oriented Architecture Across the
Enterprise and Beyond . . . . . . . . . 345--359
John Mark Agosta and
Thomas Gardos Bayes Network ``Smart'' Diagnostics . . 361--372
Cynthia Pickering and
Eleanor Wynn An Architecture and Business Process
Framework for Global Team Collaboration 373--382
Lin Chao Preface: Second-Generation Intel\reg
Centrino\TM Mobile Technology . . . . . iii--iv
Anonymous Technical Reviewers . . . . . . . . . . v--v
Shreekant (Ticky) Thakkar Second-Generation Intel\reg Centrino\TM
Mobile Technology Platform . . . . . . . 1--10
David W. Browning and
Vinay Kumar C. and
Praveen G. and
Ananth V. Gopal and
Tom Shewchuk and
Suresh V. Subramanyam Intel\reg 915GMS Chipset: In Mobile
Platforms, Smaller is Better . . . . . . 11--19
Mohammad Kolbehdari and
David Harriman and
Altug Koker and
Seh Kwa and
Brad Saunders The Emergence of PCI Express* in the
Next Generation of Mobile Platforms . . 21--33
Kam Leung and
Steve Spangler and
Todd Witter and
Kevin E. Arendt and
Satya Avadhanam and
Satyaki Koneru and
Val Cook High-Performance Graphics and TV Output
Comes to the Second-Generation Intel\reg
Centrino\TM Mobile Technology Platform 35--47
Tom Clark and
Feng (Frank) Yang and
Greg Kaine and
Brian Leete and
Sriram Ranganathan Low-Power Audio and Storage Input/Output
Technologies for the Second-Generation
Intel\reg Centrino\TM Mobile Technology
Platform . . . . . . . . . . . . . . . . 49--59
Eunice Chang and
Jim Fung and
Greg Kaine and
Ali Saeed and
Randy P. Stanley Performance and Power Consumption for
Mobile Platform Components Under Common
Usage Models . . . . . . . . . . . . . . 61--73
Eric C. Samson and
Sridhar V. Machiroutu and
Je-Young Chang and
Ishmael Santos and
Jim Hermerding and
Ashay Dani and
Ravi Prasher and
David W. Song Interface Material Selection and a
Thermal Management Technique in
Second-Generation Platforms Built on
Intel\reg Centrino\TM Mobile Technology 75--86
Camille Chen and
Penny Chen and
Sherry Chen and
Gordon Chinn and
Hani Elgebaly and
Uma Gadamsetty and
Ranjit Narjala and
Paul K. Reddy and
Jeremy Rover and
Paul Schmitz Next-Generation PC Platform Built on
Intel\reg Centrino\TM Mobile Technology
New Usage Models . . . . . . . . . . . . 87--98
Lin Chao Preface: Compute-Intensive, Highly
Parallel Applications and Uses . . . . . iii--iv
Bob Liang and
Pradeep Dubey Foreword: Recognition, Mining and
Synthesis . . . . . . . . . . . . . . . v--vi
Jim Hurley Ray Tracing Goes Mainstream . . . . . . 99--107
Trista P. Chen and
Horst Haussecker and
Alexander Bovyrin and
Roman Belenov and
Konstantin Rodyushkin and
Alexander Kuranov and
Victor Eruhimov Computer Vision Workload Analysis: Case
Study of Video Surveillance Systems . . 109--118
Gary Bradski and
Adrian Kaehler and
Vadim Pisarevsky Learning-Based Computer Vision with
Intel's Open Source Computer Vision
Library . . . . . . . . . . . . . . . . 119--130
Yurong Chen and
Qian Diao and
Carole Dulong and
Chunrong Lai and
Wei Hu and
Eric Li and
Wenlong Li and
Tao Wang and
Yimin Zhang Performance Scalability of Data-Mining
Workloads in Bioinformatics . . . . . . 131--142
Alexander Borisov and
Igor Chikalov and
Victor Eruhimov and
Eugene Tuv Performance and Scalability Analysis of
Tree-Based Models in Large-Scale
Data-Mining Problems . . . . . . . . . . 143--150
Mikhail Smelyanskiy and
Stephen Skedzielewski and
Carole Dulong Parallel Computing for Large-Scale
Optimization Problems: Challenges and
Solutions . . . . . . . . . . . . . . . 151--163
Krishnamurthy Srinivasan and
Raj Ramanujan and
Michael Amirfathi and
Enrique Castro-Leon Understanding the Platform Requirements
of Emerging Enterprise Solutions . . . . 165--175
Lin Chao Preface: Managing International Supply
and Demand at Intel Corporation . . . . iii--v
Karl Kempf Foreword: Managing Intel's International
Network of Supply and Demand . . . . . . vii--viii
Anonymous Technical Reviewers . . . . . . . . . . ix--ix
Jay W. Hopman Managing Uncertainty in Planning and
Forecasting . . . . . . . . . . . . . . 175--183
Viswanath Vaidyanathan and
Dave Metcalf and
Douglas Martin Using Capacity Options to Better Enable
Our Factory Ramps . . . . . . . . . . . 185--191
Jason Katz and
Don Edenfeld Redefining the Test Equipment Supply
Chain: The Open Architecture Revolution 193--201
Kinnar Ghiya and
Marci Powers e-Procurement --- Strengthening the
Indirect Supply-Chain Through Technology
Globalization . . . . . . . . . . . . . 203--209
Anwar Ali and
William J. Campbell and
Lance I. Solomon and
Megan A. Walsh and
James R. Wuerfel Intel's Processes for Capacity Planning
Optimization . . . . . . . . . . . . . . 211--221
John W. Bean and
Amit Devpura and
Michael O. Brien and
Shamin Shirodkar Optimizing Supply-Chain Planning . . . . 223--231
Kurt L. Johnson Inventory Modeling . . . . . . . . . . . 233--238
John Cartwright and
Jay Hahn-Steichen and
Jackson He and
Thurman Miller RosettaNet for Intel's Trading Entity
Automation . . . . . . . . . . . . . . . 239--245
Craig Dighero and
James Kellso and
Debbie Merizon and
Mary Murphy-Hoye and
Richard Tyo RFID: The Real and Integrated Story . . 247--257
Lin Chao Preface: Electronic Package Technology
Development . . . . . . . . . . . . . . iii--iii
Nasser Grayeli Foreword: Challenges and Opportunities
in Electronic Package Technology
Development . . . . . . . . . . . . . . v--vi
Anonymous Technical Reviewers . . . . . . . . . . vii--vii
Debendra Mallik and
Kaladhar Radhakrishnan and
Jinagqi He and
Chia-Pin Chiu and
Telesphor Kamgaing and
Damion Searls and
James D. Jackson Advanced Package Technologies for
High-Performance Systems . . . . . . . . 259--271
Kemal Aygün and
Michael J. Hill and
Kimberley Eilert and
Kaladhar Radhakrishnan and
Alex levin Power Delivery for High-Performance
Microprocessors . . . . . . . . . . . . 273--283
Ravi S. Prasher and
Je-Young Chang and
Ioan Sauciuc and
Sridhar Narasimhan and
David Chau and
Greg Chrysler and
Alan Myers and
Suzana Prstic and
Chuan Hu Nano and Micro Technology-Based
Next-Generation Package-Level Cooling
Solutions . . . . . . . . . . . . . . . 285--296
Luke Garner and
Sandeep Sane and
Daewoong Suh and
Tiffany Byrne and
Ashay Dani and
Ted Martin and
Michael Mello and
Mitesh Patel and
Richard Williams Finding Solutions to the Challenges in
Package Interconnect Reliability . . . . 297--308
Vijay Wakharkar and
Chris Matayabas and
Ed Lehman and
Rahul Manepalli and
Mukul Renavikar and
Saikumar Jayaraman and
Vassou LeBonheur Materials Technologies for
Thermomechanical Management of Organic
Packages . . . . . . . . . . . . . . . . 309--323
Chris Baldwin and
Tod Byquist and
Chris Combs and
Vinayak Pandey and
Brent Stone and
Ram Viswanath and
Abhay Watwe and
Leight Wojewoda Pentium 4 Processor High-Volume
Land-Grid-Array Technology: Challenges
and Future Trends . . . . . . . . . . . 325--336
Mario Pacheco and
Zhiyong Wang and
Lars Skoglund and
Yongmei Liu and
Ariel Medina and
Arun Raman and
Rajen Dias and
Deepak Goyal and
Shriram Ramanathan Advanced Fault Isolation and Failure
Analysis Techniques for Future Package
Technologies . . . . . . . . . . . . . . 337--352
Telesphor Kamgaing and
Kinya Ichikawa and
Xiang Yin Zeng and
Kyu-Pyung Hwang and
Yonkgki Min and
Jiro Kubota Future Package Technologies for Wireless
Communication Systems . . . . . . . . . 353--364
Lin Chao Preface: Voice, Video, and Data Services
--- the Merging of Triplets . . . . . . iii--iv
Anthony Neal-Graves Foreword: Convergence Now . . . . . . . v--vi
Anonymous Technical Reviewers . . . . . . . . . . v--v
Sanjay Rungta and
Omer Ben-Shalom Enterprise Converged Network-One Network
for Voice, Video, Data, and Wireless . . 1--9
Mohammad Kolbehdari and
Dave Lizotte and
Glen Shires and
Scott Trevor Session Initiation Protocol (SIP)
Evolution in Converged Communications 11--18
Steve DeNies and
Jay Gilbert and
Ashok Mishra and
Karel Rasovsky Standards-Based Interoperability for the
Advanced Telecom Computing Architecture
(AdvancedTCA*) . . . . . . . . . . . . . 19--27
Ranjan Sinha and
Catherine Spence and
Tim Verrall Quality Campus VoIP: An Intel Case Study 29--38
Shelby Siegel and
Dave Lizotte and
Blaine Bauer and
Maria Frick and
Duncan Glendinning Experiences with PC-Based Real-Time
Multimedia Collaboration over IP . . . . 39--47
Joseph Grecco and
Mark Mize and
Ranjan Singh Using Intel Technologies to Build
Next-Generation Media Servers . . . . . 49--66
Mark Walker and
Jim Edwards and
Ylian Saint-Hilaire and
Jeffrey Lee New Uses, Proposed Standards, and
Emergent Device Classes for Digital Home
Communications . . . . . . . . . . . . . 67--75
Hani Elgebaly and
Farid Adrangi and
Rajeev Muralidhar and
Lakshmi Ramachandran and
Manish Nair Seamless Collaboration-Enabling
Best-in-Class VoIP Experience on Intel
Centrino Mobile Technology . . . . . . . 77--87
Lin Chao Preface: Meet the Intel Core Duo
Processor . . . . . . . . . . . . . . . iii--iv
Dadi Perlmutter Foreword: Intel Centrino Duo Mobile
Technology: The Beginning of an Era of
Mobile Multi-Core Computing . . . . . . v--vi
Anonymous Technical Reviewers . . . . . . . . . . vii--vii
Simcha Gochman and
Avi Mendelson and
Alon Naveh and
Efraim Rotem Introduction to Intel Core Duo Processor
Architecture . . . . . . . . . . . . . . 89--97
Avi Mendelson and
Julius Mandelblat and
Simcha Gochman and
Anat Shemer and
Erik Niemeyer and
Arun Kumar CMP Implementation in Systems Based on
the Intel Core Duo Processor . . . . . . 99--107
Alon Naveh and
Efraim Rotem and
Avi Mendelson and
Simcha Gochman and
Rajshree Chabukswar and
Karthik Krishnan and
Arun Kumar Power and Thermal Management in the
Intel Core Duo Processor . . . . . . . . 109--122
Jayesh Iyer and
Corinne L. Hall and
Jerry Shi and
Yuchen Huang System Memory Power and Thermal
Management in Platforms Built on Intel
Centrino Duo Mobile Technology . . . . . 123--132
Suresh Subramanyam and
Taninder Sijher and
Sidharth Krishnama and
Parthasarathy Ramaswamy and
Deepa Mohan and
Vikas Shilimkar and
Eric Samson and
Michael Derr and
Samir Gundawar Intel 945GMS Express Chipset for Small
Form Factor Platform Based on Intel
Centrino Duo Mobile Technology . . . . . 133--145
Mark Ruberto and
Ra'anan Soyer and
Jorge Myszne and
Alexander Sloutsky and
Yari Shemesh WLAN System, HW, and RFIC Architecture
for the Intel PRO/Wireless 3945ABG
Network Connection . . . . . . . . . . . 147--156
Ilan Hen MIMO Architecture for Wireless
Communication . . . . . . . . . . . . . 157--165
Lin Chao Preface . . . . . . . . . . . . . . . . iii--iv
Rich Uhlig Forward: Intel Virtualization
Technology: Taking Virtualization
Mainstream on Intel Architecture
Platforms . . . . . . . . . . . . . . . v--vi
Anonymous Technical Reviewers . . . . . . . . . . vii--vii
Gil Neiger and
Amy Santoni and
Felix Leung and
Dion Rodgers and
Rich Uhlig Intel Virtualization Technology:
Hardware Support for Efficient Processor
Virtualization . . . . . . . . . . . . . 167--177
Darren Abramson and
Jeff Jackson and
Sridhar Muthrasanallur and
Gil Neiger and
Greg Regnier and
Rajesh Sankaran and
Ioannis Schoinas and
Rich Uhlig and
Balaji Vembu and
John Weigert Intel Virtualization Technology for
Directed I/O . . . . . . . . . . . . . . 179--192
Yaozu Dong and
Shaofan Li and
Asit Mallick and
Jun Nakajim and
Kun Tian and
Xuefei Xu and
Fred Yang and
Wilfred Yu Extending Xen with Intel Virtualization
Technology . . . . . . . . . . . . . . . 193--203
Mahendra Ramachandran and
Ned Smith and
Matthew Wood and
Sharad Garg and
Jim Stanley and
Eswar Eduri and
Rinat Rappoport and
Arie Chobotaro and
Carl Klotz and
Lori Janz New Client Virtualization Usage Models
Using Intel Virtualization Technology 205--216
Dean Neumann and
Dileep Kulkarni and
Aaron Kunze and
Gerald Rogers and
Edwin Verplanke Intel Virtualization Technology in
Embedded and Communications
Infrastructure Applications . . . . . .
Patrick Fabian and
Julia Palmer and
Justin Richardson and
Mic Bowman and
Paul Brett and
Rob Knauerhase and
Jeff Sedayao and
John Vicente and
Cheng-Chee Koh and
Sanjay Rungta Virtualization in the Enterprise . . . . 227--242
Jeffrey P. Casazza and
Michael Greenfield and
Kan Shi Redefining Server Performance
Characterization for Virtualization
Benchmarking . . . . . . . . . . . . . . 243--251