# bibtab

bibtype: article
filename: fparith.bib
label: Sakellariou:2024:MFR
title: A Multiplier-Free RNS-Based CNN Accelerator Exploiting Bit-Level Sparsity
journal: j-IEEE-TRANS-EMERG-TOP-COMPUT
volume: 12
number: 2
pages: 667--683
year: 2024
DOI: https://doi.org/10.1109/TETC.2023.3301590
ISSN: 2168-6750 (print), 2376-4562 (electronic) OR 21686750 (print), 23764562 (electronic)
bibdate: Tue Sep 9 13:42:38 2025
bibtimestamp: 2025.09.09 13:42:38 ???
fjournal: IEEE Transactions on Emerging Topics in Computing
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245516
rawtitle: A Multiplier-Free {RNS}-Based {CNN} Accelerator Exploiting Bit-Level Sparsity
author:
Vasilis Sakellariou and Vassilis Paliouras and Ioannis Kouretas and Hani Saleh and Thanos Stouraitis

keywords:
Adders; AI hardware accelerator; Artificial intelligence; canonical signed digit; Computer architecture; Convolutional neural networks; Encoding; Energy efficiency; RNS; Throughput

entry:
@Article{Sakellariou:2024:MFR,
  author =       "Vasilis Sakellariou and Vassilis Paliouras and Ioannis
                 Kouretas and Hani Saleh and Thanos Stouraitis",
  title =        "A Multiplier-Free {RNS}-Based {CNN} Accelerator
                 Exploiting Bit-Level Sparsity",
  journal =      j-IEEE-TRANS-EMERG-TOP-COMPUT,
  volume =       "12",
  number =       "2",
  pages =        "667--683",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/TETC.2023.3301590",
  ISSN =         "2168-6750 (print), 2376-4562 (electronic)",
  bibdate =      "Tue Sep 9 13:42:38 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetransemergtopcomput.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Emerging Topics in Computing",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245516",
  keywords =     "Adders; AI hardware accelerator; Artificial
                 intelligence; canonical signed digit; Computer
                 architecture; Convolutional neural networks; Encoding;
                 Energy efficiency; RNS; Throughput",
}


bibtype: article
filename: fparith.bib
label: Scott:2024:ABI
author: Jennifer Scott and Miroslav Tuma
title: Avoiding Breakdown in Incomplete Factorizations in Low Precision Arithmetic
journal: j-TOMS
volume: 50
number: 2
pages: 9:1--9:25
month: jun
monthnumber: 6
year: 2024
CODEN: ACMSCU
DOI: https://doi.org/10.1145/3651155
ISSN: 0098-3500 (print), 1557-7295 (electronic) OR 00983500 (print), 15577295 (electronic)
ISSNL: 0098-3500 OR 00983500
bibdate: Tue Jul 2 07:51:57 MDT 2024
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/toms.bib
bibtimestamp: 2024.07.02 07:51:57 MDT
URL: https://dl.acm.org/doi/10.1145/3651155
fjournal: ACM Transactions on Mathematical Software (TOMS)
acknowledgement: ack-nhfb
ajournal: ACM Trans. Math. Softw.
articleno: 9
journalURL: https://dl.acm.org/loi/toms
rawauthor: Jennifer Scott and Miroslav Tuma
rawtitle: Avoiding Breakdown in Incomplete Factorizations in Low Precision Arithmetic
abstract:
The emergence of low precision floating-point arithmetic in computer hardware has led to a resurgence of interest in the use of mixed precision numerical linear algebra. For linear systems of equations, there has been renewed enthusiasm for mixed precision variants of iterative refinement. We consider the iterative solution of large sparse systems using incomplete factorization preconditioners. The focus is on the robust computation of such preconditioners in half precision arithmetic and employing them to solve symmetric positive definite systems to higher precision accuracy; however, the proposed ideas can be applied more generally. Even for well-conditioned problems, incomplete factorizations can break down when small entries occur on the diagonal during the factorization. When using half precision arithmetic, overflows are an additional possible source of breakdown. We examine how breakdowns can be avoided and implement our strategies within new half precision Fortran sparse incomplete Cholesky factorization software. Results are reported for a range of problems from practical applications. These demonstrate that, even for highly ill-conditioned problems, half precision preconditioners can potentially replace double precision preconditioners, although unsurprisingly this may be at the cost of additional iterations of a Krylov solver.

rawabstract:
The emergence of low precision floating-point arithmetic in computer hardware has led to a resurgence of interest in the use of mixed precision numerical linear algebra. For linear systems of equations, there has been renewed enthusiasm for mixed precision variants of iterative refinement. We consider the iterative solution of large sparse systems using incomplete factorization preconditioners. The focus is on the robust computation of such preconditioners in half precision arithmetic and employing them to solve symmetric positive definite systems to higher precision accuracy; however, the proposed ideas can be applied more generally. Even for well-conditioned problems, incomplete factorizations can break down when small entries occur on the diagonal during the factorization. When using half precision arithmetic, overflows are an additional possible source of breakdown. We examine how breakdowns can be avoided and implement our strategies within new half precision Fortran sparse incomplete Cholesky factorization software. Results are reported for a range of problems from practical applications. These demonstrate that, even for highly ill-conditioned problems, half precision preconditioners can potentially replace double precision preconditioners, although unsurprisingly this may be at the cost of additional iterations of a Krylov solver.

entry:
@Article{Scott:2024:ABI,
  author =       "Jennifer Scott and Miroslav Tuma",
  title =        "Avoiding Breakdown in Incomplete Factorizations in Low
                 Precision Arithmetic",
  journal =      j-TOMS,
  volume =       "50",
  number =       "2",
  pages =        "9:1--9:25",
  month =        jun,
  year =         "2024",
  CODEN =        "ACMSCU",
  DOI =          "https://doi.org/10.1145/3651155",
  ISSN =         "0098-3500 (print), 1557-7295 (electronic)",
  ISSN-L =       "0098-3500",
  bibdate =      "Tue Jul 2 07:51:57 MDT 2024",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/toms.bib",
  URL =          "https://dl.acm.org/doi/10.1145/3651155",
  abstract =     "The emergence of low precision floating-point
                 arithmetic in computer hardware has led to a resurgence
                 of interest in the use of mixed precision numerical
                 linear algebra. For linear systems of equations, there
                 has been renewed enthusiasm for mixed precision
                 variants of iterative refinement. We consider the
                 iterative solution of large sparse systems using
                 incomplete factorization preconditioners. The focus is
                 on the robust computation of such preconditioners in
                 half precision arithmetic and employing them to solve
                 symmetric positive definite systems to higher precision
                 accuracy; however, the proposed ideas can be applied
                 more generally. Even for well-conditioned problems,
                 incomplete factorizations can break down when small
                 entries occur on the diagonal during the factorization.
                 When using half precision arithmetic, overflows are an
                 additional possible source of breakdown. We examine how
                 breakdowns can be avoided and implement our strategies
                 within new half precision Fortran sparse incomplete
                 Cholesky factorization software. Results are reported
                 for a range of problems from practical applications.
                 These demonstrate that, even for highly ill-conditioned
                 problems, half precision preconditioners can
                 potentially replace double precision preconditioners,
                 although unsurprisingly this may be at the cost of
                 additional iterations of a Krylov solver.",
  acknowledgement = ack-nhfb,
  ajournal =     "ACM Trans. Math. Softw.",
  articleno =    "9",
  fjournal =     "ACM Transactions on Mathematical Software (TOMS)",
  journal-URL =  "https://dl.acm.org/loi/toms",
}


bibtype: inproceedings
filename: fparith.bib
label: Singh:2024:FBS
author: Suryadev Singh and Babita Jajodia
booktitle: 2024 International Conference on IoT, Communication and Automation Technology (ICICAT)
title: FPGA-based SoC Design with CORDIC-POSIT Arithmetic for Efficient IoT Data Processing
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1534--1539
year: 2024
DOI: https://doi.org/10.1109/ICICAT62666.2024.10923249
bibdate: Mon Oct 27 10:32:44 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/cordic.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.27 10:32:44 ???
acknowledgement: ack-nhfb
rawauthor: Suryadev Singh and Babita Jajodia
rawbooktitle: {2024 International Conference on IoT, Communication and Automation Technology (ICICAT)}
rawtitle: {FPGA}-based {SoC} Design with {CORDIC-POSIT} Arithmetic for Efficient {IoT} Data Processing
keywords:
Accuracy; Arithmetic; Coordinate Rotation Digital Computer (CORDIC); Data processing; Field programmable gate arrays; Field Programmable Gate-Array (FPGA); Internet of Things; Internet of Things (IoT); Positive Integer and Signed Integer Ternary (POSIT); Real-time systems; sensor data management; Soil measurements; Soil moisture; System on Chip (SoC); System-on-chip; Table lookup; XADC

entry:
@InProceedings{Singh:2024:FBS,
  author =       "Suryadev Singh and Babita Jajodia",
  booktitle =    "{2024 International Conference on IoT, Communication
                 and Automation Technology (ICICAT)}",
  title =        "{FPGA}-based {SoC} Design with {CORDIC-POSIT}
                 Arithmetic for Efficient {IoT} Data Processing",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1534--1539",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/ICICAT62666.2024.10923249",
  bibdate =      "Mon Oct 27 10:32:44 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/cordic.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Arithmetic; Coordinate Rotation Digital
                 Computer (CORDIC); Data processing; Field programmable
                 gate arrays; Field Programmable Gate-Array (FPGA);
                 Internet of Things; Internet of Things (IoT); Positive
                 Integer and Signed Integer Ternary (POSIT); Real-time
                 systems; sensor data management; Soil measurements;
                 Soil moisture; System on Chip (SoC); System-on-chip;
                 Table lookup; XADC",
}


bibtype: inproceedings
filename: fparith.bib
label: Tang:2024:OSR
author: Ping Tak Peter Tang
title: An Open-Source RISC-V Vector Math Library
crossref: IEEE:2024:PIS
pages: 60--67
year: 2024
DOI: https://doi.org/10.1109/arith61463.2024.00019
bibdate: Thu Nov 13 11:37:34 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/risc-v.bib
bibtimestamp: 2025.11.13 11:37:34 ???
keywords: ARITH 2024; ARITH-31
acknowledgement: ack-nhfb
rawauthor: Ping Tak Peter Tang
rawtitle: An Open-Source {RISC-V} Vector Math Library
entry:
@InProceedings{Tang:2024:OSR,
  author =       "Ping Tak Peter Tang",
  title =        "An Open-Source {RISC-V} Vector Math Library",
  crossref =     "IEEE:2024:PIS",
  pages =        "60--67",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/arith61463.2024.00019",
  bibdate =      "Thu Nov 13 11:37:34 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/risc-v.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2024; ARITH-31",
}


bibtype: article
filename: fparith.bib
label: Tosini:2024:AEI
author: Marcelo Tosini and Martin Vazquez and Lucas Leiva
journal: j-J-SUPERCOMPUTING
volume: 80
number: 7
pages: 9298--9326
month: may
monthnumber: 5
year: 2024
CODEN: JOSUED
DOI: https://doi.org/10.1007/s11227-023-05808-w
ISSN: 0920-8542 (print), 1573-0484 (electronic) OR 09208542 (print), 15730484 (electronic)
ISSNL: 0920-8542 OR 09208542
bibdate: Fri Apr 19 06:28:17 MDT 2024
bibtimestamp: 2024.04.19 06:28:17 MDT
URL: https://link.springer.com/article/10.1007/s11227-023-05808-w
fjournal: The Journal of Supercomputing
keywords: decimal floating-point arithmetic
acknowledgement: ack-nhfb
ajournal: J. Supercomputing
journalURL: http://link.springer.com/journal/11227
rawauthor: Marcelo Tosini and Mart{\'\i}n V{\'a}zquez and Lucas Leiva
title:
Analysis and efficient implementation of IEEE-754 decimal floating point adders / subtractors in FPGAs for DPD and BID encoding

rawtitle:
Analysis and efficient implementation of {IEEE-754} decimal floating point adders\slash subtractors in {FPGAs} for {DPD} and {BID} encoding

entry:
@Article{Tosini:2024:AEI,
  author =       "Marcelo Tosini and Mart{\'\i}n V{\'a}zquez and Lucas
                 Leiva",
  title =        "Analysis and efficient implementation of {IEEE-754}
                 decimal floating point adders\slash subtractors in
                 {FPGAs} for {DPD} and {BID} encoding",
  journal =      j-J-SUPERCOMPUTING,
  volume =       "80",
  number =       "7",
  pages =        "9298--9326",
  month =        may,
  year =         "2024",
  CODEN =        "JOSUED",
  DOI =          "https://doi.org/10.1007/s11227-023-05808-w",
  ISSN =         "0920-8542 (print), 1573-0484 (electronic)",
  ISSN-L =       "0920-8542",
  bibdate =      "Fri Apr 19 06:28:17 MDT 2024",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/jsuper2020.bib",
  URL =          "https://link.springer.com/article/10.1007/s11227-023-05808-w",
  acknowledgement = ack-nhfb,
  ajournal =     "J. Supercomputing",
  fjournal =     "The Journal of Supercomputing",
  journal-URL =  "http://link.springer.com/journal/11227",
  keywords =     "decimal floating-point arithmetic",
}


bibtype: manual
filename: fparith.bib
label: Towner:2024:IAF
title: Intel AVX-512 --- FP16 Instruction Set for Intel Xeon Processor Based Products Technology Guide
organization: Intel Corporation
pages: 9298--9326
day: 12
month: mar
monthnumber: 3
year: 2024
bibdate: Fri Apr 11 08:28:36 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.04.11 08:28:36 ???
acknowledgement: ack-nhfb
author:
Daniel Towner and Steven Wood and Phoebe Wang and Marius Cornea and Cristina Anderson and Amit Gradstein

URL:
https://www.intel.com/content/www/us/en/content-details/669773/intel-avx-512-fp16-instruction-set-for-intel-xeon-processor-based-products-technology-guide.html

rawauthor:
Daniel Towner and Steven Wood and Phoebe Wang and Marius Cornea and Cristina Anderson and Amit Gradstein

rawtitle:
{Intel AVX-512} --- {FP16} Instruction Set for {Intel Xeon} Processor Based Products Technology Guide

entry:
@Manual{Towner:2024:IAF,
  author =       "Daniel Towner and Steven Wood and Phoebe Wang and
                 Marius Cornea and Cristina Anderson and Amit
                 Gradstein",
  title =        "{Intel AVX-512} --- {FP16} Instruction Set for {Intel
                 Xeon} Processor Based Products Technology Guide",
  organization = "Intel Corporation",
  address =      "????",
  day =          "12",
  month =        mar,
  year =         "2024",
  bibdate =      "Fri Apr 11 08:28:36 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://www.intel.com/content/www/us/en/content-details/669773/intel-avx-512-fp16-instruction-set-for-intel-xeon-processor-based-products-technology-guide.html",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Upadhyay:2024:ECI
booktitle: 2024 Second International Conference on Networks, Multimedia and Information Technology (NMITCON)
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--6
year: 2024
DOI: https://doi.org/10.1109/NMITCON62075.2024.10699069
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/python.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawbooktitle: {2024 Second International Conference on Networks, Multimedia and Information Technology (NMITCON)}
author:
Gaurav Upadhyay and C Siva Prasad and V Akash and Ayush Kumar Singh and R Monish Sai and Srijan Ghosal and Subrat Kar and S H Shantala and J Thakur LalitKrushna and S Srividhya and Sunil Alias Balwantrao

title:
Enhancing CNN Inference Time and Reducing Latency on Edge and Resource-Constrained Systems through Quantization

keywords:
Accuracy; Computational modeling; Deep Learning; DPU; Edge computing; EuroSat; GPU; Model Compression; Optimization; Performance evaluation; Performance Evaluation; Post-Training Quantization; PyTorch; Quantization; Quantization (signal); Quantization Aware Training; Remote sensing; Space vehicles; Surveillance; Throughput; Training; Xilinx

rawauthor:
Gaurav Upadhyay and C Siva Prasad and V Akash and Ayush Kumar Singh and R Monish Sai and Srijan Ghosal and Subrat Kar and S H Shantala and J Thakur LalitKrushna and S Srividhya and Sunil Alias Balwantrao

rawtitle:
Enhancing {CNN} Inference Time and Reducing Latency on Edge and Resource-Constrained Systems through Quantization

entry:
@InProceedings{Upadhyay:2024:ECI,
  author =       "Gaurav Upadhyay and C Siva Prasad and V Akash and
                 Ayush Kumar Singh and R Monish Sai and Srijan Ghosal
                 and Subrat Kar and S H Shantala and J Thakur
                 LalitKrushna and S Srividhya and Sunil Alias
                 Balwantrao",
  booktitle =    "{2024 Second International Conference on Networks,
                 Multimedia and Information Technology (NMITCON)}",
  title =        "Enhancing {CNN} Inference Time and Reducing Latency on
                 Edge and Resource-Constrained Systems through
                 Quantization",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--6",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/NMITCON62075.2024.10699069",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/python.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Computational modeling; Deep Learning; DPU;
                 Edge computing; EuroSat; GPU; Model Compression;
                 Optimization; Performance evaluation; Performance
                 Evaluation; Post-Training Quantization; PyTorch;
                 Quantization; Quantization (signal); Quantization Aware
                 Training; Remote sensing; Space vehicles; Surveillance;
                 Throughput; Training; Xilinx",
}


bibtype: inproceedings
filename: fparith.bib
label: vanderHoeven:2024:FMP
author: Joris van der Hoeven and Fredrik Johansson
title: Fast multiple precision $ exp (x) $ with precomputations
crossref: IEEE:2024:PIS
pages: 80--87
year: 2024
DOI: https://doi.org/10.1109/arith61463.2024.00023
bibdate: Thu Nov 13 11:37:34 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 11:37:34 ???
keywords: ARITH 2024; ARITH-31
acknowledgement: ack-nhfb
rawauthor: Joris van der Hoeven and Fredrik Johansson
rawtitle: Fast multiple precision $ \exp (x) $ with precomputations
entry:
@InProceedings{vanderHoeven:2024:FMP,
  author =       "Joris van der Hoeven and Fredrik Johansson",
  title =        "Fast multiple precision $ \exp (x) $ with
                 precomputations",
  crossref =     "IEEE:2024:PIS",
  pages =        "80--87",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/arith61463.2024.00023",
  bibdate =      "Thu Nov 13 11:37:34 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2024; ARITH-31",
}


bibtype: inproceedings
filename: fparith.bib
label: Villalba:2024:MCC
author: Julio Villalba and Javier Hormigo and Javier Diaz Bruguera and Sonia Gonzalez-Navarro
title: Message from Conference Chairs: ARITH 2024
crossref: IEEE:2024:PIS
pages: 8--9
year: 2024
DOI: https://doi.org/10.1109/arith61463.2024.00005
bibdate: Thu Nov 13 11:37:34 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 11:37:34 ???
keywords: ARITH 2024; ARITH-31
acknowledgement: ack-nhfb
rawauthor: Julio Villalba and Javier Hormigo and Javier {Diaz Bruguera} and Sonia Gonzalez-Navarro
rawtitle: Message from Conference Chairs: {ARITH 2024}
entry:
@InProceedings{Villalba:2024:MCC,
  author =       "Julio Villalba and Javier Hormigo and Javier {Diaz
                 Bruguera} and Sonia Gonzalez-Navarro",
  title =        "Message from Conference Chairs: {ARITH 2024}",
  crossref =     "IEEE:2024:PIS",
  pages =        "8--9",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/arith61463.2024.00005",
  bibdate =      "Thu Nov 13 11:37:34 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2024; ARITH-31",
}


bibtype: article
filename: fparith.bib
label: Wang:2024:DIH
journal: j-IEEE-J-SOLID-STATE-CIRCUITS
volume: 59
number: 2
pages: 595--604
year: 2024
CODEN: IJSCBC
DOI: https://doi.org/10.1109/JSSC.2023.3304174
ISSN: 0018-9200 (print), 1558-173X (electronic) OR 00189200 (print), 1558173X (electronic)
ISSNL: 0018-9200 OR 00189200
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Journal of Solid-State Circuits
acknowledgement: ack-nhfb
author:
Junjie Wang and Teng Zhang and Shuang Liu and Yihe Liu and Yuancong Wu and Shaogang Hu and Tupei Chen and Yang Liu and Yuchao Yang and Ru Huang

title:
Design and Implementation of a Hybrid, ADC / DAC-Free, Input-Sparsity-Aware, Precision Reconfigurable RRAM Processing-in-Memory Chip

keywords:
Adders; Convolution; Nonvolatile memory; Power demand; Processing-in-memory (PIM); Programming; quantization-aware training (QAT); Resistance; resistive random access memory (RRAM); sparsity-aware; time-division multiplexing (TDM); Transistors

rawauthor:
Junjie Wang and Teng Zhang and Shuang Liu and Yihe Liu and Yuancong Wu and Shaogang Hu and Tupei Chen and Yang Liu and Yuchao Yang and Ru Huang

rawtitle:
Design and Implementation of a Hybrid, {ADC\slash DAC}-Free, Input-Sparsity-Aware, Precision Reconfigurable {RRAM} Processing-in-Memory Chip

entry:
@Article{Wang:2024:DIH,
  author =       "Junjie Wang and Teng Zhang and Shuang Liu and Yihe Liu
                 and Yuancong Wu and Shaogang Hu and Tupei Chen and Yang
                 Liu and Yuchao Yang and Ru Huang",
  title =        "Design and Implementation of a Hybrid, {ADC\slash
                 DAC}-Free, Input-Sparsity-Aware, Precision
                 Reconfigurable {RRAM} Processing-in-Memory Chip",
  journal =      j-IEEE-J-SOLID-STATE-CIRCUITS,
  volume =       "59",
  number =       "2",
  pages =        "595--604",
  year =         "2024",
  CODEN =        "IJSCBC",
  DOI =          "https://doi.org/10.1109/JSSC.2023.3304174",
  ISSN =         "0018-9200 (print), 1558-173X (electronic)",
  ISSN-L =       "0018-9200",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Journal of Solid-State Circuits",
  keywords =     "Adders; Convolution; Nonvolatile memory; Power demand;
                 Processing-in-memory (PIM); Programming;
                 quantization-aware training (QAT); Resistance;
                 resistive random access memory (RRAM); sparsity-aware;
                 time-division multiplexing (TDM); Transistors",
}


bibtype: inproceedings
filename: fparith.bib
label: Wang:2024:WPB
booktitle: 2024 IEEE International Solid-State Circuits Conference (ISSCC)
title: 34.1 A 28nm 83.23TFLOPS/W POSIT-Based Compute-in-Memory Macro for High-Accuracy AI Applications
volume: 67
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 566--568
year: 2024
DOI: https://doi.org/10.1109/ISSCC49657.2024.10454567
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawbooktitle: {2024 IEEE International Solid-State Circuits Conference (ISSCC)}
author:
Yang Wang and Xiaolong Yang and Yubin Qin and Zhiren Zhao and Ruiqi Guo and Zhiheng Yue and Huiming Han and Shaojun Wei and Yang Hu and Shouyi Yin

keywords:
Energy efficiency; In-memory computing; Program processors; Runtime; Solid state circuits; Thermometers; Training

rawauthor:
Yang Wang and Xiaolong Yang and Yubin Qin and Zhiren Zhao and Ruiqi Guo and Zhiheng Yue and Huiming Han and Shaojun Wei and Yang Hu and Shouyi Yin

rawtitle:
34.1 A 28nm {83.23TFLOPS/W} {POSIT}-Based Compute-in-Memory Macro for High-Accuracy {AI} Applications

entry:
@InProceedings{Wang:2024:WPB,
  author =       "Yang Wang and Xiaolong Yang and Yubin Qin and Zhiren
                 Zhao and Ruiqi Guo and Zhiheng Yue and Huiming Han and
                 Shaojun Wei and Yang Hu and Shouyi Yin",
  booktitle =    "{2024 IEEE International Solid-State Circuits
                 Conference (ISSCC)}",
  title =        "34.1 A 28nm {83.23TFLOPS/W} {POSIT}-Based
                 Compute-in-Memory Macro for High-Accuracy {AI}
                 Applications",
  volume =       "67",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "566--568",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/ISSCC49657.2024.10454567",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Energy efficiency; In-memory computing; Program
                 processors; Runtime; Solid state circuits;
                 Thermometers; Training",
}


bibtype: inproceedings
filename: fparith.bib
label: Wu:2024:CLB
author: Jiajun Wu and Mo Song and Jingmin Zhao and Hayden Kwok-Hay So
booktitle: 2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)
title: A Case for Low Bitwidth Floating Point Arithmetic on FPGA for Transformer Based DNN Inference
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 178--185
year: 2024
DOI: https://doi.org/10.1109/IPDPSW63119.2024.00045
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
keywords: Accuracy; Full stack; Hardware; Parallel processing; Throughput; Transformers; Vectors
acknowledgement: ack-nhfb
rawauthor: Jiajun Wu and Mo Song and Jingmin Zhao and Hayden Kwok-Hay So
rawbooktitle: {2024 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)}
rawtitle: A Case for Low Bitwidth Floating Point Arithmetic on {FPGA} for Transformer Based {DNN} Inference
entry:
@InProceedings{Wu:2024:CLB,
  author =       "Jiajun Wu and Mo Song and Jingmin Zhao and Hayden
                 Kwok-Hay So",
  booktitle =    "{2024 IEEE International Parallel and Distributed
                 Processing Symposium Workshops (IPDPSW)}",
  title =        "A Case for Low Bitwidth Floating Point Arithmetic on
                 {FPGA} for Transformer Based {DNN} Inference",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "178--185",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/IPDPSW63119.2024.00045",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Full stack; Hardware; Parallel processing;
                 Throughput; Transformers; Vectors",
}


bibtype: article
filename: fparith.bib
label: Wu:2024:FPS
journal: j-IEEE-J-SOLID-STATE-CIRCUITS
volume: 59
number: 1
pages: 196--207
year: 2024
CODEN: IJSCBC
DOI: https://doi.org/10.1109/JSSC.2023.3309966
ISSN: 0018-9200 (print), 1558-173X (electronic) OR 00189200 (print), 1558173X (electronic)
ISSNL: 0018-9200 OR 00189200
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Journal of Solid-State Circuits
acknowledgement: ack-nhfb
author:
Ping-Chun Wu and Jian-Wei Su and Li-Yang Hong and Jin-Sheng Ren and Chih-Han Chien and Ho-Yu Chen and Chao-En Ke and Hsu-Ming Hsiao and Sih-Han Li and Shyh-Shyuan Sheu and Wei-Chung Lo and Shih-Chieh Chang and Chung-Chuan Lo and Ren-Shuo Liu and Chih-Cheng Hsieh and Kea-Tiong Tang and Meng-Fan Chang

title:
A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips

keywords:
Artificial intelligence; Artificial intelligence (AI); Computational efficiency; compute-in-memory (CIM); Energy efficiency; floating-point (FP); Floating-point arithmetic; In-memory computing; inference; Inference mechanisms; Memory management; SRAM chips; static random access memory (SRAM); Time-domain analysis

rawauthor:
Ping-Chun Wu and Jian-Wei Su and Li-Yang Hong and Jin-Sheng Ren and Chih-Han Chien and Ho-Yu Chen and Chao-En Ke and Hsu-Ming Hsiao and Sih-Han Li and Shyh-Shyuan Sheu and Wei-Chung Lo and Shih-Chieh Chang and Chung-Chuan Lo and Ren-Shuo Liu and Chih-Cheng Hsieh and Kea-Tiong Tang and Meng-Fan Chang

rawtitle:
A Floating-Point {6T SRAM} In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced {AI} Edge Chips

entry:
@Article{Wu:2024:FPS,
  author =       "Ping-Chun Wu and Jian-Wei Su and Li-Yang Hong and
                 Jin-Sheng Ren and Chih-Han Chien and Ho-Yu Chen and
                 Chao-En Ke and Hsu-Ming Hsiao and Sih-Han Li and
                 Shyh-Shyuan Sheu and Wei-Chung Lo and Shih-Chieh Chang
                 and Chung-Chuan Lo and Ren-Shuo Liu and Chih-Cheng
                 Hsieh and Kea-Tiong Tang and Meng-Fan Chang",
  title =        "A Floating-Point {6T SRAM} In-Memory-Compute Macro
                 Using Hybrid-Domain Structure for Advanced {AI} Edge
                 Chips",
  journal =      j-IEEE-J-SOLID-STATE-CIRCUITS,
  volume =       "59",
  number =       "1",
  pages =        "196--207",
  year =         "2024",
  CODEN =        "IJSCBC",
  DOI =          "https://doi.org/10.1109/JSSC.2023.3309966",
  ISSN =         "0018-9200 (print), 1558-173X (electronic)",
  ISSN-L =       "0018-9200",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Journal of Solid-State Circuits",
  keywords =     "Artificial intelligence; Artificial intelligence (AI);
                 Computational efficiency; compute-in-memory (CIM);
                 Energy efficiency; floating-point (FP); Floating-point
                 arithmetic; In-memory computing; inference; Inference
                 mechanisms; Memory management; SRAM chips; static
                 random access memory (SRAM); Time-domain analysis",
}


bibtype: article
filename: fparith.bib
label: Wu:2024:SAM
title: A Survey on Approximate Multiplier Designs for Energy Efficiency: From Algorithms to Circuits
journal: j-TODAES
volume: 29
number: 1
pages: 23:1--23:??
month: jan
monthnumber: 1
year: 2024
CODEN: ATASFO
DOI: https://doi.org/10.1145/3610291
ISSN: 1084-4309 (print), 1557-7309 (electronic) OR 10844309 (print), 15577309 (electronic)
ISSNL: 1084-4309 OR 10844309
bibdate: Mon Jan 15 11:14:18 MST 2024
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/todaes.bib
bibtimestamp: 2024.01.15 11:14:18 MST
URL: https://dl.acm.org/doi/10.1145/3610291
fjournal: ACM Transactions on Design Automation of Electronic Systems
acknowledgement: ack-nhfb
ajournal: ACM Transact. Des. Automat. Electron. Syst.
articleno: 23
journalURL: https://dl.acm.org/loi/todaes
rawtitle: A Survey on Approximate Multiplier Designs for Energy Efficiency: From Algorithms to Circuits
author:
Ying Wu and Chuangtao Chen and Weihua Xiao and Xuan Wang and Chenyi Wen and Jie Han and Xunzhao Yin and Weikang Qian and Cheng Zhuo

abstract:
Given the stringent requirements of energy efficiency for Internet-of-Things edge devices, approximate multipliers, as a basic component of many processors and accelerators, have been constantly proposed and studied for decades, especially in error-resilient applications. The computation error and energy efficiency largely depend on how and where the approximation is introduced into a design. Thus, this article aims to provide a comprehensive review of the approximation techniques in multiplier designs ranging from algorithms and architectures to circuits. We have implemented representative approximate multiplier designs in each category to understand the impact of the design techniques on accuracy and efficiency. The designs can then be effectively deployed in high-level applications, such as machine learning, to gain energy efficiency at the cost of slight accuracy loss.

rawabstract:
Given the stringent requirements of energy efficiency for Internet-of-Things edge devices, approximate multipliers, as a basic component of many processors and accelerators, have been constantly proposed and studied for decades, especially in error-resilient applications. The computation error and energy efficiency largely depend on how and where the approximation is introduced into a design. Thus, this article aims to provide a comprehensive review of the approximation techniques in multiplier designs ranging from algorithms and architectures to circuits. We have implemented representative approximate multiplier designs in each category to understand the impact of the design techniques on accuracy and efficiency. The designs can then be effectively deployed in high-level applications, such as machine learning, to gain energy efficiency at the cost of slight accuracy loss.

rawauthor:
Ying Wu and Chuangtao Chen and Weihua Xiao and Xuan Wang and Chenyi Wen and Jie Han and Xunzhao Yin and Weikang Qian and Cheng Zhuo

entry:
@Article{Wu:2024:SAM,
  author =       "Ying Wu and Chuangtao Chen and Weihua Xiao and Xuan
                 Wang and Chenyi Wen and Jie Han and Xunzhao Yin and
                 Weikang Qian and Cheng Zhuo",
  title =        "A Survey on Approximate Multiplier Designs for Energy
                 Efficiency: From Algorithms to Circuits",
  journal =      j-TODAES,
  volume =       "29",
  number =       "1",
  pages =        "23:1--23:??",
  month =        jan,
  year =         "2024",
  CODEN =        "ATASFO",
  DOI =          "https://doi.org/10.1145/3610291",
  ISSN =         "1084-4309 (print), 1557-7309 (electronic)",
  ISSN-L =       "1084-4309",
  bibdate =      "Mon Jan 15 11:14:18 MST 2024",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/todaes.bib",
  URL =          "https://dl.acm.org/doi/10.1145/3610291",
  abstract =     "Given the stringent requirements of energy efficiency
                 for Internet-of-Things edge devices, approximate
                 multipliers, as a basic component of many processors
                 and accelerators, have been constantly proposed and
                 studied for decades, especially in error-resilient
                 applications. The computation error and energy
                 efficiency largely depend on how and where the
                 approximation is introduced into a design. Thus, this
                 article aims to provide a comprehensive review of the
                 approximation techniques in multiplier designs ranging
                 from algorithms and architectures to circuits. We have
                 implemented representative approximate multiplier
                 designs in each category to understand the impact of
                 the design techniques on accuracy and efficiency. The
                 designs can then be effectively deployed in high-level
                 applications, such as machine learning, to gain energy
                 efficiency at the cost of slight accuracy loss.",
  acknowledgement = ack-nhfb,
  ajournal =     "ACM Transact. Des. Automat. Electron. Syst.",
  articleno =    "23",
  fjournal =     "ACM Transactions on Design Automation of Electronic
                 Systems",
  journal-URL =  "https://dl.acm.org/loi/todaes",
}


bibtype: article
filename: fparith.bib
label: Xie:2024:FRO
author: Peichen Xie and Yanjie Gao and Jilong Xue
title: FPRev: Revealing the Order of Floating-Point Summation by Numerical Testing
journal: arXiv.org
pages: 1--20
day: 1
month: nov
monthnumber: 11
year: 2024
bibdate: Tue Jan 28 06:36:44 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.01.28 06:36:44 ???
URL: https://arxiv.org/abs/2411.00442v1
keywords: accurate floating-point summation
acknowledgement: ack-nhfb
rawauthor: Peichen Xie and Yanjie Gao and Jilong Xue
rawtitle: {FPRev}: Revealing the Order of Floating-Point Summation by Numerical Testing
abstract:
The order of floating-point summation is a key factor in numerical reproducibility. However, this critical information is generally unspecified and unknown for most summation-based functions in numerical libraries, making it challenging to migrate them to new environments reproducibly. This paper presents novel, non-intrusive, testing-based algorithms that can reveal the order of floating-point summation by treating functions as callable black boxes. By constructing well-designed input that can cause the swamping phenomenon of floating-point addition, we can infer the order of summation from the output. We introduce FPRev, a tool that implements these algorithms, and validate its efficiency through extensive experiments with popular numerical libraries on various CPUs and GPUs (including those with Tensor Cores). FPRev reveals the varying summation orders across different libraries and devices, and outperforms other methods in terms of time complexity. The source code of FPRev is at this article's URL.

rawabstract:
The order of floating-point summation is a key factor in numerical reproducibility. However, this critical information is generally unspecified and unknown for most summation-based functions in numerical libraries, making it challenging to migrate them to new environments reproducibly. This paper presents novel, non-intrusive, testing-based algorithms that can reveal the order of floating-point summation by treating functions as callable black boxes. By constructing well-designed input that can cause the swamping phenomenon of floating-point addition, we can infer the order of summation from the output. We introduce FPRev, a tool that implements these algorithms, and validate its efficiency through extensive experiments with popular numerical libraries on various CPUs and GPUs (including those with Tensor Cores). FPRev reveals the varying summation orders across different libraries and devices, and outperforms other methods in terms of time complexity. The source code of FPRev is at this article's URL.

entry:
@Article{Xie:2024:FRO,
  author =       "Peichen Xie and Yanjie Gao and Jilong Xue",
  title =        "{FPRev}: Revealing the Order of Floating-Point
                 Summation by Numerical Testing",
  journal =      "arXiv.org",
  volume =       "??",
  number =       "??",
  pages =        "1--20",
  day =          "1",
  month =        nov,
  year =         "2024",
  bibdate =      "Tue Jan 28 06:36:44 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://arxiv.org/abs/2411.00442v1",
  abstract =     "The order of floating-point summation is a key factor
                 in numerical reproducibility. However, this critical
                 information is generally unspecified and unknown for
                 most summation-based functions in numerical libraries,
                 making it challenging to migrate them to new
                 environments reproducibly. This paper presents novel,
                 non-intrusive, testing-based algorithms that can reveal
                 the order of floating-point summation by treating
                 functions as callable black boxes. By constructing
                 well-designed input that can cause the swamping
                 phenomenon of floating-point addition, we can infer the
                 order of summation from the output. We introduce FPRev,
                 a tool that implements these algorithms, and validate
                 its efficiency through extensive experiments with
                 popular numerical libraries on various CPUs and GPUs
                 (including those with Tensor Cores). FPRev reveals the
                 varying summation orders across different libraries and
                 devices, and outperforms other methods in terms of time
                 complexity. The source code of FPRev is at this
                 article's URL.",
  acknowledgement = ack-nhfb,
  keywords =     "accurate floating-point summation",
}


bibtype: inproceedings
filename: fparith.bib
label: Yusupov:2024:ICA
title: Improving the Computing Accuracy of the AI Ascend Processor: Research and Results
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1510--1513
year: 2024
DOI: https://doi.org/10.1109/PIERE62470.2024.10805020
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawtitle: Improving the Computing Accuracy of the {AI Ascend} Processor: Research and Results
author:
Firnafas XXX. Yusupov and Mukhiddin F. Ibragimov and Saidbek P. Babayazov and Kumushoy E. Niyazmetova and Xaitbayeva Z. Durdona and Umidbek P. Babayazov

booktitle:
2024 IEEE 3rd International Conference on Problems of Informatics, Electronics and Radio Engineering (PIERE)

keywords:
Accuracy; AI Ascend Processor; Algorithm Improvement; Approximation algorithms; Artificial intelligence; Computer architecture; Da Vinci Architecture; FP32 Accuracy; Graphics processing units; Hardware; Huawei; Informatics; Matrix Multiplication; Performance evaluation; Semiconductor device manufacture; Standards

rawauthor:
Firnafas XXX. Yusupov and Mukhiddin F. Ibragimov and Saidbek P. Babayazov and Kumushoy E. Niyazmetova and Xaitbayeva Z. Durdona and Umidbek P. Babayazov

rawbooktitle:
{2024 IEEE 3rd International Conference on Problems of Informatics, Electronics and Radio Engineering (PIERE)}

entry:
@InProceedings{Yusupov:2024:ICA,
  author =       "Firnafas XXX. Yusupov and Mukhiddin F. Ibragimov and
                 Saidbek P. Babayazov and Kumushoy E. Niyazmetova and
                 Xaitbayeva Z. Durdona and Umidbek P. Babayazov",
  booktitle =    "{2024 IEEE 3rd International Conference on Problems of
                 Informatics, Electronics and Radio Engineering
                 (PIERE)}",
  title =        "Improving the Computing Accuracy of the {AI Ascend}
                 Processor: Research and Results",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1510--1513",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/PIERE62470.2024.10805020",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; AI Ascend Processor; Algorithm Improvement;
                 Approximation algorithms; Artificial intelligence;
                 Computer architecture; Da Vinci Architecture; FP32
                 Accuracy; Graphics processing units; Hardware; Huawei;
                 Informatics; Matrix Multiplication; Performance
                 evaluation; Semiconductor device manufacture;
                 Standards",
}


bibtype: inproceedings
filename: fparith.bib
label: Zahid:2024:TGN
author: Anwar Hossain Zahid and Ignacio Laguna and Wei Le
title: Testing GPU Numerics: Finding Numerical Differences Between NVIDIA and AMD GPUs
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 547--557
year: 2024
DOI: https://doi.org/10.1109/SCW63240.2024.00077
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Anwar Hossain Zahid and Ignacio Laguna and Wei Le
rawtitle: Testing {GPU} Numerics: Finding Numerical Differences Between {NVIDIA} and {AMD} {GPUs}
booktitle:
SC24-W: Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis

keywords:
Codes; CUDA; Differential testing; floating-point; Graphics processing units; High performance computing; Hip; HIP; Libraries; Numerical simulation; Optimization; Production; random program generation; Robustness; Testing

rawbooktitle:
{SC24-W: Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis}

entry:
@InProceedings{Zahid:2024:TGN,
  author =       "Anwar Hossain Zahid and Ignacio Laguna and Wei Le",
  booktitle =    "{SC24-W: Workshops of the International Conference for
                 High Performance Computing, Networking, Storage and
                 Analysis}",
  title =        "Testing {GPU} Numerics: Finding Numerical Differences
                 Between {NVIDIA} and {AMD} {GPUs}",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "547--557",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/SCW63240.2024.00077",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Codes; CUDA; Differential testing; floating-point;
                 Graphics processing units; High performance computing;
                 Hip; HIP; Libraries; Numerical simulation;
                 Optimization; Production; random program generation;
                 Robustness; Testing",
}


bibtype: article
filename: fparith.bib
label: Zhang:2024:DFH
author: Tingting Zhang and Zijing Niu and Jie Han
title: A Design Framework for Hardware-Efficient Logarithmic Floating-Point Multipliers
journal: j-IEEE-TRANS-EMERG-TOP-COMPUT
volume: 12
number: 4
pages: 991--1001
year: 2024
DOI: https://doi.org/10.1109/TETC.2024.3365650
ISSN: 2168-6750 (print), 2376-4562 (electronic) OR 21686750 (print), 23764562 (electronic)
bibdate: Tue Sep 9 13:42:38 2025
bibtimestamp: 2025.09.09 13:42:38 ???
fjournal: IEEE Transactions on Emerging Topics in Computing
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245516
rawauthor: Tingting Zhang and Zijing Niu and Jie Han
rawtitle: A Design Framework for Hardware-Efficient Logarithmic Floating-Point Multipliers
keywords:
approximate computing; approximate multiplier; Artificial neural networks; Costs; error tolerance; Floating-point multiplier; Hardware; Image coding; JPEG compression; logarithmic multiplier; neural networks; Standards; Training; Transform coding

entry:
@Article{Zhang:2024:DFH,
  author =       "Tingting Zhang and Zijing Niu and Jie Han",
  title =        "A Design Framework for Hardware-Efficient Logarithmic
                 Floating-Point Multipliers",
  journal =      j-IEEE-TRANS-EMERG-TOP-COMPUT,
  volume =       "12",
  number =       "4",
  pages =        "991--1001",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/TETC.2024.3365650",
  ISSN =         "2168-6750 (print), 2376-4562 (electronic)",
  bibdate =      "Tue Sep 9 13:42:38 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetransemergtopcomput.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Emerging Topics in Computing",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245516",
  keywords =     "approximate computing; approximate multiplier;
                 Artificial neural networks; Costs; error tolerance;
                 Floating-point multiplier; Hardware; Image coding; JPEG
                 compression; logarithmic multiplier; neural networks;
                 Standards; Training; Transform coding",
}


bibtype: article
filename: fparith.bib
label: Zhang:2024:HSA
author: Zuoyan Zhang and Jinchen Xu and Jiangwei Hao and Yang Qu and Haotian He and Bei Zhou
title: Hierarchical search algorithm for error detection in floating-point arithmetic expressions
journal: j-J-SUPERCOMPUTING
volume: 80
number: 1
pages: 1183--1205
month: jan
monthnumber: 1
year: 2024
CODEN: JOSUED
DOI: https://doi.org/10.1007/s11227-023-05523-6
ISSN: 0920-8542 (print), 1573-0484 (electronic) OR 09208542 (print), 15730484 (electronic)
ISSNL: 0920-8542 OR 09208542
bibdate: Thu Feb 15 10:23:12 MST 2024
bibtimestamp: 2024.02.15 10:23:12 MST
URL: https://link.springer.com/article/10.1007/s11227-023-05523-6
fjournal: The Journal of Supercomputing
acknowledgement: ack-nhfb
ajournal: J. Supercomputing
journalURL: http://link.springer.com/journal/11227
rawauthor: Zuoyan Zhang and Jinchen Xu and Jiangwei Hao and Yang Qu and Haotian He and Bei Zhou
rawtitle: Hierarchical search algorithm for error detection in floating-point arithmetic expressions
entry:
@Article{Zhang:2024:HSA,
  author =       "Zuoyan Zhang and Jinchen Xu and Jiangwei Hao and Yang
                 Qu and Haotian He and Bei Zhou",
  title =        "Hierarchical search algorithm for error detection in
                 floating-point arithmetic expressions",
  journal =      j-J-SUPERCOMPUTING,
  volume =       "80",
  number =       "1",
  pages =        "1183--1205",
  month =        jan,
  year =         "2024",
  CODEN =        "JOSUED",
  DOI =          "https://doi.org/10.1007/s11227-023-05523-6",
  ISSN =         "0920-8542 (print), 1573-0484 (electronic)",
  ISSN-L =       "0920-8542",
  bibdate =      "Thu Feb 15 10:23:12 MST 2024",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/jsuper2020.bib",
  URL =          "https://link.springer.com/article/10.1007/s11227-023-05523-6",
  acknowledgement = ack-nhfb,
  ajournal =     "J. Supercomputing",
  fjournal =     "The Journal of Supercomputing",
  journal-URL =  "http://link.springer.com/journal/11227",
}


bibtype: inproceedings
filename: fparith.bib
label: Zhang:2024:IFP
booktitle: 2024 IEEE International Conference on Multimedia and Expo (ICME)
title: Integer or Floating Point? New Outlooks for Low-Bit Quantization on Large Language Models
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--6
year: 2024
DOI: https://doi.org/10.1109/ICME57554.2024.10688089
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawbooktitle: {2024 IEEE International Conference on Multimedia and Expo (ICME)}
rawtitle: Integer or Floating Point? {New} Outlooks for Low-Bit Quantization on Large Language Models
author:
Yijia Zhang and Lingran Zhao and Shijie Cao and Sicheng Zhang and Wenqiang Wang and Ting Cao and Fan Yang and Mao Yang and Shanghang Zhang and Ningyi Xu

keywords:
Costs; Floating Point; Graphics processing units; Hardware; Large Language Model; Large language models; Low-bit Quantization; Multimedia systems; Quantization (signal); Tensors

rawauthor:
Yijia Zhang and Lingran Zhao and Shijie Cao and Sicheng Zhang and Wenqiang Wang and Ting Cao and Fan Yang and Mao Yang and Shanghang Zhang and Ningyi Xu

entry:
@InProceedings{Zhang:2024:IFP,
  author =       "Yijia Zhang and Lingran Zhao and Shijie Cao and
                 Sicheng Zhang and Wenqiang Wang and Ting Cao and Fan
                 Yang and Mao Yang and Shanghang Zhang and Ningyi Xu",
  booktitle =    "{2024 IEEE International Conference on Multimedia and
                 Expo (ICME)}",
  title =        "Integer or Floating Point? {New} Outlooks for Low-Bit
                 Quantization on Large Language Models",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--6",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/ICME57554.2024.10688089",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Costs; Floating Point; Graphics processing units;
                 Hardware; Large Language Model; Large language models;
                 Low-bit Quantization; Multimedia systems; Quantization
                 (signal); Tensors",
}


bibtype: article
filename: fparith.bib
label: Zhao:2024:ETL
title: Efficient Ternary Logic Circuits Optimized by Ternary Arithmetic Algorithms
journal: j-IEEE-TRANS-EMERG-TOP-COMPUT
volume: 12
number: 3
pages: 826--839
year: 2024
DOI: https://doi.org/10.1109/TETC.2023.3321050
ISSN: 2168-6750 (print), 2376-4562 (electronic) OR 21686750 (print), 23764562 (electronic)
bibdate: Tue Sep 9 13:42:38 2025
bibtimestamp: 2025.09.09 13:42:38 ???
fjournal: IEEE Transactions on Emerging Topics in Computing
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245516
rawtitle: Efficient Ternary Logic Circuits Optimized by Ternary Arithmetic Algorithms
author:
Guangchao Zhao and Zhiwei Zeng and Xingli Wang and Abdelrahman G. Qoutb and Philippe Coquet and Eby G. Friedman and Beng Kang Tay and Mingqiang Huang

keywords:
Adders; Arithmetic; CMOS based ternary logic; Inverters; Logic gates; Multi-valued logic; Multivalued logic; Standards; ternary adders; ternary arithmetic circuits; ternary multipliers; Transistors

rawauthor:
Guangchao Zhao and Zhiwei Zeng and Xingli Wang and Abdelrahman G. Qoutb and Philippe Coquet and Eby G. Friedman and Beng Kang Tay and Mingqiang Huang

entry:
@Article{Zhao:2024:ETL,
  author =       "Guangchao Zhao and Zhiwei Zeng and Xingli Wang and
                 Abdelrahman G. Qoutb and Philippe Coquet and Eby G.
                 Friedman and Beng Kang Tay and Mingqiang Huang",
  title =        "Efficient Ternary Logic Circuits Optimized by Ternary
                 Arithmetic Algorithms",
  journal =      j-IEEE-TRANS-EMERG-TOP-COMPUT,
  volume =       "12",
  number =       "3",
  pages =        "826--839",
  year =         "2024",
  DOI =          "https://doi.org/10.1109/TETC.2023.3321050",
  ISSN =         "2168-6750 (print), 2376-4562 (electronic)",
  bibdate =      "Tue Sep 9 13:42:38 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetransemergtopcomput.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Emerging Topics in Computing",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6245516",
  keywords =     "Adders; Arithmetic; CMOS based ternary logic;
                 Inverters; Logic gates; Multi-valued logic; Multivalued
                 logic; Standards; ternary adders; ternary arithmetic
                 circuits; ternary multipliers; Transistors",
}


bibtype: techreport
filename: fparith.bib
label: Zimmermann:2024:NVD
author: Paul Zimmermann
title: Note on the Veltkamp / Dekker Algorithms with Directed Roundings
type: Report
number: hal-04480440
institution: Universite de Lorraine, CNRS, Inria, LORIA
address: Metz, France
pages: 826--839
day: 29
month: feb
monthnumber: 2
year: 2024
bibdate: Thu Aug 01 17:14:10 2024
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2024.08.01 17:14:10 ???
URL: https://inria.hal.science/hal-04480440
keywords: CARAMBA --- Cryptology, arithmetic: algebraic methods for better algorithms
acknowledgement: ack-nhfb
rawauthor: Paul Zimmermann
rawtitle: Note on the {Veltkamp\slash Dekker} Algorithms with Directed Roundings
abstract:
The Veltkamp / Dekker algorithms are very useful for double-double arithmetic, when no fused multiply-add is available in hardware. Their analysis is well-known for rounding to nearest-even. We study how they behave with directed roundings in radix 2.

rawabstract:
The Veltkamp\slash Dekker algorithms are very useful for double-double arithmetic, when no fused multiply-add is available in hardware. Their analysis is well-known for rounding to nearest-even. We study how they behave with directed roundings in radix 2.

entry:
@TechReport{Zimmermann:2024:NVD,
  author =       "Paul Zimmermann",
  title =        "Note on the {Veltkamp\slash Dekker} Algorithms with
                 Directed Roundings",
  type =         "Report",
  number =       "hal-04480440",
  institution =  "Universit{\'e} de Lorraine, CNRS, Inria, LORIA",
  address =      "Metz, France",
  day =          "29",
  month =        feb,
  year =         "2024",
  bibdate =      "Thu Aug 01 17:14:10 2024",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://inria.hal.science/hal-04480440",
  abstract =     "The Veltkamp\slash Dekker algorithms are very useful
                 for double-double arithmetic, when no fused
                 multiply-add is available in hardware. Their analysis
                 is well-known for rounding to nearest-even. We study
                 how they behave with directed roundings in radix 2.",
  acknowledgement = ack-nhfb,
  keywords =     "CARAMBA --- Cryptology, arithmetic: algebraic methods
                 for better algorithms",
}


bibtype: article
filename: fparith.bib
label: Zou:2024:PRE
author: Qinmeng Zou
title: Probabilistic Rounding Error Analysis of Modified Gram--Schmidt
journal: j-SIAM-J-MAT-ANA-APPL
volume: 45
number: 2
pages: 1076--1088
month: may
monthnumber: 5
year: 2024
CODEN: SJMAEL
DOI: https://doi.org/10.1137/23m1585817
ISSN: 0895-4798 (print), 1095-7162 (electronic) OR 08954798 (print), 10957162 (electronic)
ISSNL: 0895-4798 OR 08954798
bibdate: Fri May 31 08:23:04 2024
bibtimestamp: 2024.05.31 08:23:04 ???
fjournal: SIAM Journal on Matrix Analysis and Applications
acknowledgement: ack-nhfb
ajournal: SIAM J. Matrix Anal. Appl.
journalURL: http://epubs.siam.org/simax
rawauthor: Qinmeng Zou
rawtitle: Probabilistic Rounding Error Analysis of Modified {Gram--Schmidt}
bibsource:
https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/siamjmatanaappl.bib

entry:
@Article{Zou:2024:PRE,
  author =       "Qinmeng Zou",
  title =        "Probabilistic Rounding Error Analysis of Modified
                 {Gram--Schmidt}",
  journal =      j-SIAM-J-MAT-ANA-APPL,
  volume =       "45",
  number =       "2",
  pages =        "1076--1088",
  month =        may,
  year =         "2024",
  CODEN =        "SJMAEL",
  DOI =          "https://doi.org/10.1137/23m1585817",
  ISSN =         "0895-4798 (print), 1095-7162 (electronic)",
  ISSN-L =       "0895-4798",
  bibdate =      "Fri May 31 08:23:04 2024",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/siamjmatanaappl.bib",
  acknowledgement = ack-nhfb,
  ajournal =     "SIAM J. Matrix Anal. Appl.",
  fjournal =     "SIAM Journal on Matrix Analysis and Applications",
  journal-URL =  "http://epubs.siam.org/simax",
}


bibtype: misc
filename: fparith.bib
label: Advanpix:2025:MCT
author: Advanpix
title: Multiprecision Computing Toolbox User's Manual
pages: 1076--1088
day: 23
month: feb
monthnumber: 2
year: 2025
bibdate: Wed Aug 27 12:35:36 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.08.27 12:35:36 ???
URL: https://www.advanpix.com/documentation/users-manual/
acknowledgement: ack-nhfb
howpublished: Commercial Web site
rawauthor: {Advanpix}
rawtitle: Multiprecision Computing Toolbox User's Manual
entry:
@Misc{Advanpix:2025:MCT,
  author =       "{Advanpix}",
  title =        "Multiprecision Computing Toolbox User's Manual",
  howpublished = "Commercial Web site",
  day =          "23",
  month =        feb,
  year =         "2025",
  bibdate =      "Wed Aug 27 12:35:36 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://www.advanpix.com/documentation/users-manual/",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Ahlback:2025:FBA
author: Albin Ahlback and Fredrik Johansson
title: Fast Basecases for Arbitrary-Size Multiplication
crossref: IEEE:2025:PIS
pages: 53--60
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00018F
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Albin Ahlback and Fredrik Johansson
rawtitle: Fast Basecases for Arbitrary-Size Multiplication
entry:
@InProceedings{Ahlback:2025:FBA,
  author =       "Albin Ahlback and Fredrik Johansson",
  title =        "Fast Basecases for Arbitrary-Size Multiplication",
  crossref =     "IEEE:2025:PIS",
  pages =        "53--60",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00018F",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: article
filename: fparith.bib
label: Ahmadi-Pour:2025:FLF
author: Sallar Ahmadi-Pour and Sajjad Parvin and Chandan Kumar Jha and Rolf Drechsler
title: FV-LIDAC: Formally Verified Library of Input Data Aware Approximate Arithmetic Circuits
journal: j-TODAES
volume: 30
number: 4
pages: 64:1--64:??
month: jul
monthnumber: 7
year: 2025
CODEN: ATASFO
DOI: https://doi.org/10.1145/3744710
ISSN: 1084-4309 (print), 1557-7309 (electronic) OR 10844309 (print), 15577309 (electronic)
ISSNL: 1084-4309 OR 10844309
bibdate: Sat Jul 26 08:03:38 MDT 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/todaes.bib
bibtimestamp: 2025.07.26 08:03:38 MDT
fjournal: ACM Transactions on Design Automation of Electronic Systems
acknowledgement: ack-nhfb
ajournal: ACM Transact. Des. Automat. Electron. Syst.
articleno: 64
journalURL: https://dl.acm.org/loi/todaes
rawauthor: Sallar Ahmadi-Pour and Sajjad Parvin and Chandan Kumar Jha and Rolf Drechsler
rawtitle: {FV-LIDAC}: Formally Verified Library of Input Data Aware Approximate Arithmetic Circuits
abstract:
Approximate circuits have become ubiquitous in error-resilient applications. These circuits provide large reductions in area, power, and delay at the cost of erroneous computations. The error-resilient applications produce acceptable output quality, even ldots 

rawabstract:
Approximate circuits have become ubiquitous in error-resilient applications. These circuits provide large reductions in area, power, and delay at the cost of erroneous computations. The error-resilient applications produce acceptable output quality, even \ldots{}

entry:
@Article{Ahmadi-Pour:2025:FLF,
  author =       "Sallar Ahmadi-Pour and Sajjad Parvin and Chandan Kumar
                 Jha and Rolf Drechsler",
  title =        "{FV-LIDAC}: Formally Verified Library of Input Data
                 Aware Approximate Arithmetic Circuits",
  journal =      j-TODAES,
  volume =       "30",
  number =       "4",
  pages =        "64:1--64:??",
  month =        jul,
  year =         "2025",
  CODEN =        "ATASFO",
  DOI =          "https://doi.org/10.1145/3744710",
  ISSN =         "1084-4309 (print), 1557-7309 (electronic)",
  ISSN-L =       "1084-4309",
  bibdate =      "Sat Jul 26 08:03:38 MDT 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/todaes.bib",
  abstract =     "Approximate circuits have become ubiquitous in
                 error-resilient applications. These circuits provide
                 large reductions in area, power, and delay at the cost
                 of erroneous computations. The error-resilient
                 applications produce acceptable output quality, even
                 \ldots{}",
  acknowledgement = ack-nhfb,
  ajournal =     "ACM Transact. Des. Automat. Electron. Syst.",
  articleno =    "64",
  fjournal =     "ACM Transactions on Design Automation of Electronic
                 Systems",
  journal-URL =  "https://dl.acm.org/loi/todaes",
}


bibtype: article
filename: fparith.bib
label: Allred:2025:FNT
author: Taylor Allred and Xinyi Li and Ashton Wiersdorf and Ben Greenman and Ganesh Gopalakrishnan
title: FlowFPX: Nimble Tools for Debugging Floating-Point Exceptions
journal: Proceedings of the JuliaCon Conferences
volume: 7
number: 67
pages: 148:1--148:8
year: 2025
DOI: https://doi.org/10.21105/jcon.00148
bibdate: Wed Jan 22 13:56:37 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/julia.bib
bibtimestamp: 2025.01.22 13:56:37 ???
keywords: debugging; floating-point; Julia
acknowledgement: ack-nhfb
rawauthor: Taylor Allred and Xinyi Li and Ashton Wiersdorf and Ben Greenman and Ganesh Gopalakrishnan
rawtitle: {FlowFPX}: Nimble Tools for Debugging Floating-Point Exceptions
abstract:
Reliable numerical computations are central to scientific computing, but the floating-point arithmetic that enables large-scale models is error-prone. Numeric exceptions are a common occurrence and can propagate through code, leading to flawed results. This paper presents FlowFPX, a toolkit for systematically debugging floating-point exceptions by recording their flow, coalescing exception contexts, and fuzzing in select locations. These tools help scientists discover when exceptions happen and track down their origin, smoothing the way to a reliable codebase.

ORCID:
Allred, Taylor/0009-0000-7238-1816; Li, Xinyi/0009-0005-7276-7715; Wiersdorf, Ashton/0000-0001-5524-7930; Greenman, Ben/0000-0001-7078-9287; Gopalakrishnan, Ganesh/0000-0002-4161-9278

entry:
@Article{Allred:2025:FNT,
  author =       "Taylor Allred and Xinyi Li and Ashton Wiersdorf and
                 Ben Greenman and Ganesh Gopalakrishnan",
  title =        "{FlowFPX}: Nimble Tools for Debugging Floating-Point
                 Exceptions",
  journal =      "Proceedings of the {JuliaCon} Conferences",
  volume =       "7",
  number =       "67",
  pages =        "148:1--148:8",
  year =         "2025",
  DOI =          "https://doi.org/10.21105/jcon.00148",
  bibdate =      "Wed Jan 22 13:56:37 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/julia.bib",
  abstract =     "Reliable numerical computations are central to
                 scientific computing, but the floating-point arithmetic
                 that enables large-scale models is error-prone. Numeric
                 exceptions are a common occurrence and can propagate
                 through code, leading to flawed results. This paper
                 presents FlowFPX, a toolkit for systematically
                 debugging floating-point exceptions by recording their
                 flow, coalescing exception contexts, and fuzzing in
                 select locations. These tools help scientists discover
                 when exceptions happen and track down their origin,
                 smoothing the way to a reliable codebase.",
  acknowledgement = ack-nhfb,
  keywords =     "debugging; floating-point; Julia",
  ORCID-numbers = "Allred, Taylor/0009-0000-7238-1816; Li,
                 Xinyi/0009-0005-7276-7715; Wiersdorf,
                 Ashton/0000-0001-5524-7930; Greenman,
                 Ben/0000-0001-7078-9287; Gopalakrishnan,
                 Ganesh/0000-0002-4161-9278",
}


bibtype: inproceedings
filename: fparith.bib
label: Anonymous:2025:AI
author: Anonymous
title: Author Index
crossref: IEEE:2025:PIS
pages: 161--161
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00033
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: Author Index
entry:
@InProceedings{Anonymous:2025:AI,
  author =       "Anonymous",
  title =        "Author Index",
  crossref =     "IEEE:2025:PIS",
  pages =        "161--161",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00033",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Anonymous:2025:CP
author: Anonymous
title: Copyright page
crossref: IEEE:2025:PIS
pages: 1--1
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00003
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: Copyright page
entry:
@InProceedings{Anonymous:2025:CP,
  author =       "Anonymous",
  title =        "Copyright page",
  crossref =     "IEEE:2025:PIS",
  pages =        "1--1",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00003",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: misc
filename: fparith.bib
label: Anonymous:2025:IMPa
author: Anonymous
title: Intel 8087 Milestone plaque dedication summary
pages: 1--1
month: nov
monthnumber: 11
year: 2025
bibdate: Fri Nov 14 06:20:52 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.14 06:20:52 ???
URL: https://youtu.be/jCn24WbWRuQ
remark: Recorded in Haifa, Israel, in Hebrew, with English subtitles.
acknowledgement: ack-nhfb
howpublished: Video (2m)
rawauthor: Anonymous
rawtitle: {Intel 8087 Milestone} plaque dedication summary
entry:
@Misc{Anonymous:2025:IMPa,
  author =       "Anonymous",
  title =        "{Intel 8087 Milestone} plaque dedication summary",
  howpublished = "Video (2m)",
  month =        nov,
  year =         "2025",
  bibdate =      "Fri Nov 14 06:20:52 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://youtu.be/jCn24WbWRuQ",
  acknowledgement = ack-nhfb,
  remark =       "Recorded in Haifa, Israel, in Hebrew, with English
                 subtitles.",
}


bibtype: misc
filename: fparith.bib
label: Anonymous:2025:IMPb
author: Anonymous
title: Intel 8087 Milestone plaque dedication
pages: 1--1
month: nov
monthnumber: 11
year: 2025
bibdate: Fri Nov 14 06:20:52 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.14 06:20:52 ???
URL: https://youtu.be/N1mH3E3nIKI
acknowledgement: ack-nhfb
howpublished: Video (44m)
rawauthor: Anonymous
rawtitle: {Intel 8087 Milestone} plaque dedication
remark:
Recorded in Haifa, Israel, in Hebrew, with English subtitles. There is a companion plaque celebrating the birthplace of Silicon Valley, placed in May 2018, at 391 San Antonio Road, Los Altos, CA [about 6km southeast of Stanford University], the original location of Shockley Semiconductor Laboratory, now replaced by an office tower. Around the corner to the south is another plaque commemorating Moore's Law, published in 1965 cite Moore:1965:CMC.

entry:
@Misc{Anonymous:2025:IMPb,
  author =       "Anonymous",
  title =        "{Intel 8087 Milestone} plaque dedication",
  howpublished = "Video (44m)",
  month =        nov,
  year =         "2025",
  bibdate =      "Fri Nov 14 06:20:52 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://youtu.be/N1mH3E3nIKI",
  acknowledgement = ack-nhfb,
  remark =       "Recorded in Haifa, Israel, in Hebrew, with English
                 subtitles. There is a companion plaque celebrating the
                 birthplace of Silicon Valley, placed in May 2018, at
                 391 San Antonio Road, Los Altos, CA [about 6km
                 southeast of Stanford University], the original
                 location of Shockley Semiconductor Laboratory, now
                 replaced by an office tower. Around the corner to the
                 south is another plaque commemorating Moore's Law,
                 published in 1965 \cite{Moore:1965:CMC}.",
}


bibtype: inproceedings
filename: fparith.bib
label: Anonymous:2025:MCC
author: Anonymous
title: Message from Conference Chairs: ARITH 2025
crossref: IEEE:2025:PIS
pages: vii--vii
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00005
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: Message from {Conference Chairs: ARITH 2025}
entry:
@InProceedings{Anonymous:2025:MCC,
  author =       "Anonymous",
  title =        "Message from {Conference Chairs: ARITH 2025}",
  crossref =     "IEEE:2025:PIS",
  pages =        "vii--vii",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00005",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Anonymous:2025:OCA
author: Anonymous
title: Organizing Committee: ARITH 2025
crossref: IEEE:2025:PIS
pages: viii--viii
year: 2025
DOI: https://doi.ogr/10.1109/arith64983.2025.00006
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: {Organizing Committee: ARITH 2025}
entry:
@InProceedings{Anonymous:2025:OCA,
  author =       "Anonymous",
  title =        "{Organizing Committee: ARITH 2025}",
  crossref =     "IEEE:2025:PIS",
  pages =        "viii--viii",
  year =         "2025",
  DOI =          "https://doi.ogr/10.1109/arith64983.2025.00006",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Anonymous:2025:PCA
author: Anonymous
title: Program Committee: ARITH 2025
crossref: IEEE:2025:PIS
pages: xi--xi
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00008
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: {Program Committee: ARITH 2025}
entry:
@InProceedings{Anonymous:2025:PCA,
  author =       "Anonymous",
  title =        "{Program Committee: ARITH 2025}",
  crossref =     "IEEE:2025:PIS",
  pages =        "xi--xi",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00008",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Anonymous:2025:RLA
author: Anonymous
title: Reviewers List: ARITH 2025
crossref: IEEE:2025:PIS
pages: xii--xiv
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00009
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: {Reviewers List: ARITH 2025}
entry:
@InProceedings{Anonymous:2025:RLA,
  author =       "Anonymous",
  title =        "{Reviewers List: ARITH 2025}",
  crossref =     "IEEE:2025:PIS",
  pages =        "xii--xiv",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00009",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Anonymous:2025:SA
author: Anonymous
title: Sponsors: ARITH 2025
crossref: IEEE:2025:PIS
pages: xiv--xiv
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00010
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: {Sponsors: ARITH 2025}
entry:
@InProceedings{Anonymous:2025:SA,
  author =       "Anonymous",
  title =        "{Sponsors: ARITH 2025}",
  crossref =     "IEEE:2025:PIS",
  pages =        "xiv--xiv",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00010",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Anonymous:2025:SCA
author: Anonymous
title: Steering Committee: ARITH 2025
crossref: IEEE:2025:PIS
pages: ix--x
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00007
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: {Steering Committee: ARITH 2025}
entry:
@InProceedings{Anonymous:2025:SCA,
  author =       "Anonymous",
  title =        "{Steering Committee: ARITH 2025}",
  crossref =     "IEEE:2025:PIS",
  pages =        "ix--x",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00007",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Anonymous:2025:TC
author: Anonymous
title: Table of contents
crossref: IEEE:2025:PIS
pages: iv--vi
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00004
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: Table of contents
entry:
@InProceedings{Anonymous:2025:TC,
  author =       "Anonymous",
  title =        "Table of contents",
  crossref =     "IEEE:2025:PIS",
  pages =        "iv--vi",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00004",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Anonymous:2025:TPPa
author: Anonymous
title: [Title page 1: Proceedings 2025 IEEE 32nd Symposium on Computer Arithmetic: ARITH 2025
crossref: IEEE:2025:PIS
pages: 1--1
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00001
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: {[Title} page 1: Proceedings {2025 IEEE 32nd Symposium on Computer Arithmetic: ARITH 2025}
entry:
@InProceedings{Anonymous:2025:TPPa,
  author =       "Anonymous",
  title =        "{[Title} page 1: Proceedings {2025 IEEE 32nd Symposium
                 on Computer Arithmetic: ARITH 2025}",
  crossref =     "IEEE:2025:PIS",
  pages =        "1--1",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00001",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Anonymous:2025:TPPb
author: Anonymous
title: [Title page 2: Proceedings 2025 IEEE 32nd Symposium on Computer Arithmetic: ARITH 2025
crossref: IEEE:2025:PIS
pages: 1--1
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00002
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Anonymous
rawtitle: {[Title} page 2: Proceedings {2025 IEEE 32nd Symposium on Computer Arithmetic: ARITH 2025}
entry:
@InProceedings{Anonymous:2025:TPPb,
  author =       "Anonymous",
  title =        "{[Title} page 2: Proceedings {2025 IEEE 32nd Symposium
                 on Computer Arithmetic: ARITH 2025}",
  crossref =     "IEEE:2025:PIS",
  pages =        "1--1",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00002",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: manual
filename: fparith.bib
label: Arm:2025:AAR
author: Arm
title: Arm Architecture Reference Manual for A-profile architecture
number: ARM DDI 0487
organization: Arm Limited
address: Cambridge, UK
pages: xl + 14694
day: 30
month: apr
monthnumber: 4
year: 2025
bibdate: Mon Jul 28 11:29:22 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.07.28 11:29:22 ???
URL: https://developer.arm.com/documentation/ddi0487/lb
keywords: correct rounding; double rounding; round-to-odd mode (RO(x))
acknowledgement: ack-nhfb
rawauthor: {Arm}
rawtitle: {Arm} Architecture Reference Manual for {A}-profile architecture
remark:
Section A1.5.8.6 Round to Odd says:par ``Round to Odd is not defined by IEEE 754.par Round to Odd rounds the exact result of a floating-point operation to a value that is representable in the destination format. If the result of the rounding is inexact, the least significant bit of the mantissa is forced to 1.par The following instructions use Round to Odd:par * BFloat16 instructions defined in BFloat16 behaviors for instructions that compute sum-of-products.par * FCVTXN, FCVTXN2, FCVTX, and FCVTXNT, for which Round to Odd rounding can avoid double rounding errors when a floating-point value is converted to a lower precision destination format through an intermediate precision format.''

entry:
@Manual{Arm:2025:AAR,
  author =       "{Arm}",
  title =        "{Arm} Architecture Reference Manual for {A}-profile
                 architecture",
  number =       "ARM DDI 0487",
  organization = "Arm Limited",
  address =      "Cambridge, UK",
  pages =        "xl + 14694",
  day =          "30",
  month =        apr,
  year =         "2025",
  bibdate =      "Mon Jul 28 11:29:22 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://developer.arm.com/documentation/ddi0487/lb",
  acknowledgement = ack-nhfb,
  keywords =     "correct rounding; double rounding; round-to-odd mode
                 (RO(x))",
  remark =       "Section A1.5.8.6 Round to Odd says:\par ``Round to Odd
                 is not defined by IEEE 754.\par

                 Round to Odd rounds the exact result of a
                 floating-point operation to a value that is
                 representable in the destination format. If the result
                 of the rounding is inexact, the least significant bit
                 of the mantissa is forced to 1.\par

                 The following instructions use Round to Odd:\par

                 * BFloat16 instructions defined in BFloat16 behaviors
                 for instructions that compute sum-of-products.\par

                 * FCVTXN, FCVTXN2, FCVTX, and FCVTXNT, for which Round
                 to Odd rounding can avoid double rounding errors when a
                 floating-point value is converted to a lower precision
                 destination format through an intermediate precision
                 format.''",
}


bibtype: article
filename: fparith.bib
label: Banks:2025:GCHa
author: Jess Banks and Jorge Garza-Vargas and Nikhil Srivastava
title: Global Convergence of Hessenberg Shifted QR II: Finite Arithmetic
journal: j-SIAM-J-MAT-ANA-APPL
volume: 46
number: 2
pages: 1168--1211
year: 2025
CODEN: SJMAEL
DOI: https://doi.org/10.1137/23M1557532
ISSN: 0895-4798 (print), 1095-7162 (electronic) OR 08954798 (print), 10957162 (electronic)
ISSNL: 0895-4798 OR 08954798
bibdate: Thu Oct 16 12:49:41 MDT 2025
bibtimestamp: 2025.10.16 12:49:41 MDT
URL: https://epubs.siam.org/doi/10.1137/23M1557532
fjournal: SIAM Journal on Matrix Analysis and Applications
acknowledgement: ack-nhfb
journalURL: http://epubs.siam.org/simax
rawauthor: Jess Banks and Jorge Garza-Vargas and Nikhil Srivastava
rawtitle: Global Convergence of {Hessenberg} Shifted {QR} {II}: Finite Arithmetic
bibsource:
http://epubs.siam.org/sam-bin/dbq/toc/SIMAX/46/2; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/siamjmatanaappl.bib

entry:
@Article{Banks:2025:GCHa,
  author =       "Jess Banks and Jorge Garza-Vargas and Nikhil
                 Srivastava",
  title =        "Global Convergence of {Hessenberg} Shifted {QR} {II}:
                 Finite Arithmetic",
  journal =      j-SIAM-J-MAT-ANA-APPL,
  volume =       "46",
  number =       "2",
  pages =        "1168--1211",
  month =        "????",
  year =         "2025",
  CODEN =        "SJMAEL",
  DOI =          "https://doi.org/10.1137/23M1557532",
  ISSN =         "0895-4798 (print), 1095-7162 (electronic)",
  ISSN-L =       "0895-4798",
  bibdate =      "Thu Oct 16 12:49:41 MDT 2025",
  bibsource =    "http://epubs.siam.org/sam-bin/dbq/toc/SIMAX/46/2;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/siamjmatanaappl.bib",
  URL =          "https://epubs.siam.org/doi/10.1137/23M1557532",
  acknowledgement = ack-nhfb,
  fjournal =     "SIAM Journal on Matrix Analysis and Applications",
  journal-URL =  "http://epubs.siam.org/simax",
}


bibtype: inproceedings
filename: fparith.bib
label: Bazzi:2025:RPI
author: Jinane Bazzi and Mohammed E. Fouda and Ahmed Eltawil
booktitle: 2025 IEEE International Symposium on Circuits and Systems (ISCAS)
title: Reconfigurable Precision INT4-8 / FP8 Digital Compute-in-Memory Macro for AI Acceleration
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--5
year: 2025
DOI: https://doi.org/10.1109/ISCAS56072.2025.11044064
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Jinane Bazzi and Mohammed E. Fouda and Ahmed Eltawil
rawbooktitle: {2025 IEEE International Symposium on Circuits and Systems (ISCAS)}
rawtitle: Reconfigurable Precision {INT4-8\slash FP8} Digital Compute-in-Memory Macro for {AI} Acceleration
keywords:
Artificial neural networks; CMOS technology; Computational efficiency; Computational modeling; Compute-in-memory; Computer architecture; deep neural network; Energy efficiency; floating-point; In-memory computing; Integrated circuit modeling; multiply-accumulate; reconfigurable macro; Resource management; Throughput

entry:
@InProceedings{Bazzi:2025:RPI,
  author =       "Jinane Bazzi and Mohammed E. Fouda and Ahmed Eltawil",
  booktitle =    "{2025 IEEE International Symposium on Circuits and
                 Systems (ISCAS)}",
  title =        "Reconfigurable Precision {INT4-8\slash FP8} Digital
                 Compute-in-Memory Macro for {AI} Acceleration",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--5",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ISCAS56072.2025.11044064",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Artificial neural networks; CMOS technology;
                 Computational efficiency; Computational modeling;
                 Compute-in-memory; Computer architecture; deep neural
                 network; Energy efficiency; floating-point; In-memory
                 computing; Integrated circuit modeling;
                 multiply-accumulate; reconfigurable macro; Resource
                 management; Throughput",
}


bibtype: inproceedings
filename: fparith.bib
label: Bertoni:2025:MMM
author: Colleen Bertoni and Thomas Applencourt and Longfei Gao and Ti Leggett
booktitle: 2025 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)
title: Millions of Matrix-Multiplications: GEMM Variations on Aurora
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 850--856
year: 2025
DOI: https://doi.org/10.1109/IPDPSW66978.2025.00135
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Colleen Bertoni and Thomas Applencourt and Longfei Gao and Ti Leggett
rawbooktitle: {2025 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)}
rawtitle: Millions of Matrix-Multiplications: {GEMM} Variations on {Aurora}
keywords:
Aurora; Benchmark testing; Gaussian distribution; GEMM; Graphics processing units; Ion radiation effects; Kernel; Lower bound; Magnetosphere; Manufacturing; Particle measurements; Supercomputers; Variation

entry:
@InProceedings{Bertoni:2025:MMM,
  author =       "Colleen Bertoni and Thomas Applencourt and Longfei Gao
                 and Ti Leggett",
  booktitle =    "{2025 IEEE International Parallel and Distributed
                 Processing Symposium Workshops (IPDPSW)}",
  title =        "Millions of Matrix-Multiplications: {GEMM} Variations
                 on {Aurora}",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "850--856",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/IPDPSW66978.2025.00135",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Aurora; Benchmark testing; Gaussian distribution;
                 GEMM; Graphics processing units; Ion radiation effects;
                 Kernel; Lower bound; Magnetosphere; Manufacturing;
                 Particle measurements; Supercomputers; Variation",
}


bibtype: inproceedings
filename: fparith.bib
label: Bouarah:2025:HFP
author: Romain Bouarah and Florent De Dinechin
title: Hardware Fixed-Point 2D and 3D norms
crossref: IEEE:2025:PIS
pages: 29--36
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00015
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Romain Bouarah and Florent {De Dinechin}
rawtitle: Hardware Fixed-Point {2D} and {3D} norms
entry:
@InProceedings{Bouarah:2025:HFP,
  author =       "Romain Bouarah and Florent {De Dinechin}",
  title =        "Hardware Fixed-Point {2D} and {3D} norms",
  crossref =     "IEEE:2025:PIS",
  pages =        "29--36",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00015",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: article
filename: fparith.bib
label: Bunger:2025:IEB
author: Florian Bunger
title: Improved Error Bounds for Floating-Point Quotients
journal: j-IEEE-TRANS-COMPUT
volume: 74
number: 11
pages: 3559--3567
month: nov
monthnumber: 11
year: 2025
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2025.3585341
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Oct 15 16:45:16 2025
bibtimestamp: 2025.10.15 16:45:16 ???
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Florian B{\"u}nger
rawtitle: Improved Error Bounds for Floating-Point Quotients
keywords:
Artificial intelligence; Computers; Data mining; Floating-point quotients; Gold; IEEE 754 standard; Roundoff errors; Standards; Surveys; Taylor series; Training; Wilkinson-type relative error estimates; Zirconium

entry:
@Article{Bunger:2025:IEB,
  author =       "Florian B{\"u}nger",
  title =        "Improved Error Bounds for Floating-Point Quotients",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "74",
  number =       "11",
  pages =        "3559--3567",
  month =        nov,
  year =         "2025",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2025.3585341",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Oct 15 16:45:16 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2020.bib",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "Artificial intelligence; Computers; Data mining;
                 Floating-point quotients; Gold; IEEE 754 standard;
                 Roundoff errors; Standards; Surveys; Taylor series;
                 Training; Wilkinson-type relative error estimates;
                 Zirconium",
}


bibtype: inproceedings
filename: fparith.bib
label: Caprioli:2025:FFC
author: Paul Caprioli
title: On the Flop and Flap Counts of the 2,8-Split-Radix FFT
crossref: IEEE:2025:PIS
pages: 45--52
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00017
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Paul Caprioli
rawtitle: On the Flop and Flap Counts of the 2,8-Split-Radix {FFT}
entry:
@InProceedings{Caprioli:2025:FFC,
  author =       "Paul Caprioli",
  title =        "On the Flop and Flap Counts of the 2,8-Split-Radix
                 {FFT}",
  crossref =     "IEEE:2025:PIS",
  pages =        "45--52",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00017",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Chen:2025:FBA
title: FPGA-Based Approximate Multiplier for FP8
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 01--09
year: 2025
DOI: https://doi.org/10.1109/FCCM62733.2025.00079
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawtitle: {FPGA}-Based Approximate Multiplier for {FP8}
author:
Ruiqi Chen and Yangxintong Lyu and Han Bao and Jiayu Liu and Yanxiang Zhu and Shidi Tang and Ming Ling and Bruno Da Silva

booktitle:
2025 IEEE 33rd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)

keywords:
Approximate computing; Approximation methods; Artificial neural networks; Benchmark testing; Codes; Dynamic range; Field programmable gate arrays; FP8; FPGA; L-mul; Layout; multiplier; Power demand; Resource management; Table lookup

rawauthor:
Ruiqi Chen and Yangxintong Lyu and Han Bao and Jiayu Liu and Yanxiang Zhu and Shidi Tang and Ming Ling and Bruno {Da Silva}

rawbooktitle:
{2025 IEEE 33rd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)}

entry:
@InProceedings{Chen:2025:FBA,
  author =       "Ruiqi Chen and Yangxintong Lyu and Han Bao and Jiayu
                 Liu and Yanxiang Zhu and Shidi Tang and Ming Ling and
                 Bruno {Da Silva}",
  booktitle =    "{2025 IEEE 33rd Annual International Symposium on
                 Field-Programmable Custom Computing Machines (FCCM)}",
  title =        "{FPGA}-Based Approximate Multiplier for {FP8}",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "01--09",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/FCCM62733.2025.00079",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Approximate computing; Approximation methods;
                 Artificial neural networks; Benchmark testing; Codes;
                 Dynamic range; Field programmable gate arrays; FP8;
                 FPGA; L-mul; Layout; multiplier; Power demand; Resource
                 management; Table lookup",
}


bibtype: inproceedings
filename: fparith.bib
label: Corbineau:2025:CRD
author: Selene Corbineau and Paul Zimmermann
title: Correct Rounding in Double Extended Precision
crossref: IEEE:2025:PIS
pages: 117--124
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00027
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: S{\'e}l{\`e}ne Corbineau and Paul Zimmermann
rawtitle: Correct Rounding in Double Extended Precision
entry:
@InProceedings{Corbineau:2025:CRD,
  author =       "S{\'e}l{\`e}ne Corbineau and Paul Zimmermann",
  title =        "Correct Rounding in Double Extended Precision",
  crossref =     "IEEE:2025:PIS",
  pages =        "117--124",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00027",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Crafton:2025:FPF
booktitle: 2025 62nd ACM/IEEE Design Automation Conference (DAC)
title: Finding the Pareto Frontier of Low-Precision Data Formats and MAC Architecture for LLM Inference
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--7
year: 2025
DOI: https://doi.org/10.1109/DAC63849.2025.11132989
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawbooktitle: {2025 62nd ACM/IEEE Design Automation Conference (DAC)}
author:
Brian Crafton and Xiaochen Peng and Xiaoyu Sun and Ashwin Lele and Bo Zhang and Win-San Khwa and Kerem Akarvardar

keywords:
Accuracy; Artificial intelligence; Design automation; Noise; Pareto optimization; Quantization (signal)

rawauthor:
Brian Crafton and Xiaochen Peng and Xiaoyu Sun and Ashwin Lele and Bo Zhang and Win-San Khwa and Kerem Akarvardar

rawtitle:
Finding the {Pareto} Frontier of Low-Precision Data Formats and {MAC} Architecture for {LLM} Inference

entry:
@InProceedings{Crafton:2025:FPF,
  author =       "Brian Crafton and Xiaochen Peng and Xiaoyu Sun and
                 Ashwin Lele and Bo Zhang and Win-San Khwa and Kerem
                 Akarvardar",
  booktitle =    "{2025 62nd ACM/IEEE Design Automation Conference
                 (DAC)}",
  title =        "Finding the {Pareto} Frontier of Low-Precision Data
                 Formats and {MAC} Architecture for {LLM} Inference",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--7",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/DAC63849.2025.11132989",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Artificial intelligence; Design automation;
                 Noise; Pareto optimization; Quantization (signal)",
}


bibtype: article
filename: fparith.bib
label: Cui:2025:PES
author: Mengqi Cui and Jinchen Xu and Yuchang Zhou and Hongru Yang and Liguang Ji and Bei Zhou
title: PESA: error sensitivity analysis tool for floating-point computational programs
journal: j-J-SUPERCOMPUTING
volume: 81
number: 3
pages: ??--??
month: feb
monthnumber: 2
year: 2025
CODEN: JOSUED
DOI: https://doi.org/10.1007/s11227-025-06962-z
ISSN: 0920-8542 (print), 1573-0484 (electronic) OR 09208542 (print), 15730484 (electronic)
ISSNL: 0920-8542 OR 09208542
bibdate: Wed Feb 19 09:44:27 MST 2025
bibtimestamp: 2025.02.19 09:44:27 MST
URL: https://link.springer.com/article/10.1007/s11227-025-06962-z
fjournal: The Journal of Supercomputing
acknowledgement: ack-nhfb
ajournal: J. Supercomputing
articleno: 477
journalURL: http://link.springer.com/journal/11227
rawauthor: Mengqi Cui and Jinchen Xu and Yuchang Zhou and Hongru Yang and Liguang Ji and Bei Zhou
rawtitle: {PESA}: error sensitivity analysis tool for floating-point computational programs
entry:
@Article{Cui:2025:PES,
  author =       "Mengqi Cui and Jinchen Xu and Yuchang Zhou and Hongru
                 Yang and Liguang Ji and Bei Zhou",
  title =        "{PESA}: error sensitivity analysis tool for
                 floating-point computational programs",
  journal =      j-J-SUPERCOMPUTING,
  volume =       "81",
  number =       "3",
  pages =        "??--??",
  month =        feb,
  year =         "2025",
  CODEN =        "JOSUED",
  DOI =          "https://doi.org/10.1007/s11227-025-06962-z",
  ISSN =         "0920-8542 (print), 1573-0484 (electronic)",
  ISSN-L =       "0920-8542",
  bibdate =      "Wed Feb 19 09:44:27 MST 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/jsuper2020.bib",
  URL =          "https://link.springer.com/article/10.1007/s11227-025-06962-z",
  acknowledgement = ack-nhfb,
  ajournal =     "J. Supercomputing",
  articleno =    "477",
  fjournal =     "The Journal of Supercomputing",
  journal-URL =  "http://link.springer.com/journal/11227",
}


bibtype: misc
filename: fparith.bib
label: Darcy:2025:FJ
author: Joseph Darcy
title: Float16.java
pages: ??--??
year: 2025
bibdate: Mon Mar 10 13:45:31 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.03.10 13:45:31 ???
acknowledgement: ack-nhfb
howpublished: Web site
rawauthor: Joseph Darcy
rawtitle: Float16.java
URL:
https://github.com/openjdk/jdk/blob/dbdbbd473061d7e8077ed07ccc6b03065a8c2ffc/src/jdk.incubator.vector/share/classes/jdk/incubator/vector/Float16.java#L1240

remark:
The code comments provide an informal analysis that Float16 fused multiply-add (FMA) can be correctly implemented in IEEE 754 Binary64 arithmetic, including for NaN, Infinity, and signed zero arguments.

entry:
@Misc{Darcy:2025:FJ,
  author =       "Joseph Darcy",
  title =        "Float16.java",
  howpublished = "Web site",
  year =         "2025",
  bibdate =      "Mon Mar 10 13:45:31 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://github.com/openjdk/jdk/blob/dbdbbd473061d7e8077ed07ccc6b03065a8c2ffc/src/jdk.incubator.vector/share/classes/jdk/incubator/vector/Float16.java#L1240",
  acknowledgement = ack-nhfb,
  remark =       "The code comments provide an informal analysis that
                 Float16 fused multiply-add (FMA) can be correctly
                 implemented in IEEE 754 Binary64 arithmetic, including
                 for NaN, Infinity, and signed zero arguments.",
}


bibtype: inproceedings
filename: fparith.bib
label: Desrentes:2025:DWD
author: Oregane Desrentes and Benoit Dupont De Dinechin and Florent De Dinechin
title: Double-Word Decomposition in a Combined FP16, BF16 and FP32 Dot Product Add Operator
crossref: IEEE:2025:PIS
pages: 73--80
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00021
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Or{\'e}gane Desrentes and Beno{\^\i}t Dupont {De Dinechin} and Florent {De Dinechin}
rawtitle: Double-Word Decomposition in a Combined {FP16}, {BF16} and {FP32} Dot Product Add Operator
keywords:
ARITH 2025; ARITH-32; BF16; Deep learning; Digital arithmetic; Dot product; Dynamic range; FP16; FP32; Matrix decomposition; Software; Standards; Vectors

entry:
@InProceedings{Desrentes:2025:DWD,
  author =       "Or{\'e}gane Desrentes and Beno{\^\i}t Dupont {De
                 Dinechin} and Florent {De Dinechin}",
  title =        "Double-Word Decomposition in a Combined {FP16}, {BF16}
                 and {FP32} Dot Product Add Operator",
  crossref =     "IEEE:2025:PIS",
  pages =        "73--80",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00021",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32; BF16; Deep learning; Digital
                 arithmetic; Dot product; Dynamic range; FP16; FP32;
                 Matrix decomposition; Software; Standards; Vectors",
}


bibtype: inproceedings
filename: fparith.bib
label: Devi:2025:PFS
author: Dantu Nandini Devi and Madhav Rao
booktitle: 2025 IEEE International Symposium on Circuits and Systems (ISCAS)
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--5
year: 2025
DOI: https://doi.org/10.1109/ISCAS56072.2025.11043892
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Dantu Nandini Devi and Madhav Rao
rawbooktitle: {2025 IEEE International Symposium on Circuits and Systems (ISCAS)}
title:
Precision-Factored Systolic Arrays: Balancing Accuracy and Efficiency in Floating-Point Computations for CNNs

keywords:
Accuracy; Approximate computing; Approximate Computing; Delays; Floating point for-mats; Genetic algorithms; Image processing; Kernel; Multipliers; Non-Sorting Genetic Algorithm II (NSGA II); Optimization; Power demand; Silicon; Systolic arrays; VGG-11 Kernels

rawtitle:
Precision-Factored Systolic Arrays: Balancing Accuracy and Efficiency in Floating-Point Computations for {CNNs}

entry:
@InProceedings{Devi:2025:PFS,
  author =       "Dantu Nandini Devi and Madhav Rao",
  booktitle =    "{2025 IEEE International Symposium on Circuits and
                 Systems (ISCAS)}",
  title =        "Precision-Factored Systolic Arrays: Balancing Accuracy
                 and Efficiency in Floating-Point Computations for
                 {CNNs}",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--5",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ISCAS56072.2025.11043892",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Approximate computing; Approximate
                 Computing; Delays; Floating point for-mats; Genetic
                 algorithms; Image processing; Kernel; Multipliers;
                 Non-Sorting Genetic Algorithm II (NSGA II);
                 Optimization; Power demand; Silicon; Systolic arrays;
                 VGG-11 Kernels",
}


bibtype: article
filename: fparith.bib
label: Dexter:2025:SRI
author: Gregory Dexter and Christos Boutsikas and Linkai Ma and Ilse C. F. Ipsen and Petros Drineas
title: Stochastic Rounding Implicitly Regularizes Tall-and-Thin Matrices
journal: j-SIAM-J-MAT-ANA-APPL
volume: 46
number: 1
pages: 341--369
year: 2025
CODEN: SJMAEL
DOI: https://doi.org/10.1137/24M1647679
ISSN: 0895-4798 (print), 1095-7162 (electronic) OR 08954798 (print), 10957162 (electronic)
ISSNL: 0895-4798 OR 08954798
bibdate: Thu Oct 16 12:49:38 MDT 2025
bibtimestamp: 2025.10.16 12:49:38 MDT
URL: https://epubs.siam.org/doi/10.1137/24M1647679
fjournal: SIAM Journal on Matrix Analysis and Applications
acknowledgement: ack-nhfb
journalURL: http://epubs.siam.org/simax
rawauthor: Gregory Dexter and Christos Boutsikas and Linkai Ma and Ilse C. F. Ipsen and Petros Drineas
rawtitle: Stochastic Rounding Implicitly Regularizes Tall-and-Thin Matrices
bibsource:
http://epubs.siam.org/sam-bin/dbq/toc/SIMAX/46/1; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/siamjmatanaappl.bib

entry:
@Article{Dexter:2025:SRI,
  author =       "Gregory Dexter and Christos Boutsikas and Linkai Ma
                 and Ilse C. F. Ipsen and Petros Drineas",
  title =        "Stochastic Rounding Implicitly Regularizes
                 Tall-and-Thin Matrices",
  journal =      j-SIAM-J-MAT-ANA-APPL,
  volume =       "46",
  number =       "1",
  pages =        "341--369",
  month =        "????",
  year =         "2025",
  CODEN =        "SJMAEL",
  DOI =          "https://doi.org/10.1137/24M1647679",
  ISSN =         "0895-4798 (print), 1095-7162 (electronic)",
  ISSN-L =       "0895-4798",
  bibdate =      "Thu Oct 16 12:49:38 MDT 2025",
  bibsource =    "http://epubs.siam.org/sam-bin/dbq/toc/SIMAX/46/1;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/siamjmatanaappl.bib",
  URL =          "https://epubs.siam.org/doi/10.1137/24M1647679",
  acknowledgement = ack-nhfb,
  fjournal =     "SIAM Journal on Matrix Analysis and Applications",
  journal-URL =  "http://epubs.siam.org/simax",
}


bibtype: article
filename: fparith.bib
label: ElArar:2025:PEA
author: El-Mehdi El Arar and Massimiliano Fasi and Silviu-Ioan Filip and Mantas Mikaitis
title: Probabilistic Error Analysis of Limited-Precision Stochastic Rounding
journal: j-SIAM-J-SCI-COMP
volume: 47
number: 5
pages: B1227--B1249
year: 2025
CODEN: SJOCE3
DOI: https://doi.org/10.1137/24M1681458
ISSN: 1064-8275 (print), 1095-7197 (electronic) OR 10648275 (print), 10957197 (electronic)
ISSNL: 1064-8275 OR 10648275
bibdate: Sat Oct 18 11:20:14 MDT 2025
bibtimestamp: 2025.10.18 11:20:14 MDT
URL: https://epubs.siam.org/doi/10.1137/24M1681458
fjournal: SIAM Journal on Scientific Computing
keywords: stochastic rounding
acknowledgement: ack-nhfb
journalURL: http://epubs.siam.org/sisc
rawauthor: El-Mehdi {El Arar} and Massimiliano Fasi and Silviu-Ioan Filip and Mantas Mikaitis
rawtitle: Probabilistic Error Analysis of Limited-Precision Stochastic Rounding
bibsource:
http://epubs.siam.org/toc/sjoce3/47/5; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/siamjscicomput.bib

entry:
@Article{ElArar:2025:PEA,
  author =       "El-Mehdi {El Arar} and Massimiliano Fasi and
                 Silviu-Ioan Filip and Mantas Mikaitis",
  title =        "Probabilistic Error Analysis of Limited-Precision
                 Stochastic Rounding",
  journal =      j-SIAM-J-SCI-COMP,
  volume =       "47",
  number =       "5",
  pages =        "B1227--B1249",
  month =        "????",
  year =         "2025",
  CODEN =        "SJOCE3",
  DOI =          "https://doi.org/10.1137/24M1681458",
  ISSN =         "1064-8275 (print), 1095-7197 (electronic)",
  ISSN-L =       "1064-8275",
  bibdate =      "Sat Oct 18 11:20:14 MDT 2025",
  bibsource =    "http://epubs.siam.org/toc/sjoce3/47/5;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/siamjscicomput.bib",
  URL =          "https://epubs.siam.org/doi/10.1137/24M1681458",
  acknowledgement = ack-nhfb,
  fjournal =     "SIAM Journal on Scientific Computing",
  journal-URL =  "http://epubs.siam.org/sisc",
  keywords =     "stochastic rounding",
}


bibtype: inproceedings
filename: fparith.bib
label: Fitzgibbon:2025:SRF
author: Andrew Fitzgibbon and Stephen Felix
title: On Stochastic Rounding with Few Random Bits
crossref: IEEE:2025:PIS
pages: 133--140
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00029
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Andrew Fitzgibbon and Stephen Felix
rawtitle: On Stochastic Rounding with Few Random Bits
entry:
@InProceedings{Fitzgibbon:2025:SRF,
  author =       "Andrew Fitzgibbon and Stephen Felix",
  title =        "On Stochastic Rounding with Few Random Bits",
  crossref =     "IEEE:2025:PIS",
  pages =        "133--140",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00029",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: techreport
filename: fparith.bib
label: Fog:2025:PFP
author: Agner Fog
title: Parallel floating point exception tracking and NaN propagation
type: Report
institution: Technical University of Denmark
address: Lyngby, Denmark
pages: 11
day: 9
month: may
monthnumber: 5
year: 2025
bibdate: Fri Oct 10 07:58:02 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.10 07:58:02 ???
URL: https://www.agner.org/optimize/nan_propagation.pdf
acknowledgement: ack-nhfb
rawauthor: Agner Fog
rawtitle: Parallel floating point exception tracking and {NaN} propagation
abstract:
The most common methods for detecting errors and exceptions in floating point computing are based on either exception trapping or a global status register. Both methods are relying on sequential logic. These methods are inefficient in modern systems that use out-of-order execution and single-instruction-multiple-data (SIMD) parallelism for improving performance. It would be more efficient to implement a system that attaches the status after an exception to the result register and lets this information follow the same data path and the same form of parallelism as the normal data flow. This can be achieved either by attaching metadata tags to the result or by generating NaN results containing diagnostic payloads. These metadata tags or NaN payloads can propagate through subsequent calculations. Such a system would be more efficient than traps and global status flags.par Advantages and disadvantages of each solution are discussed, and examples of experimental implementations are presented here.

rawabstract:
The most common methods for detecting errors and exceptions in floating point computing are based on either exception trapping or a global status register. Both methods are relying on sequential logic. These methods are inefficient in modern systems that use out-of-order execution and single-instruction-multiple-data (SIMD) parallelism for improving performance. It would be more efficient to implement a system that attaches the status after an exception to the result register and lets this information follow the same data path and the same form of parallelism as the normal data flow. This can be achieved either by attaching metadata tags to the result or by generating NaN results containing diagnostic payloads. These metadata tags or NaN payloads can propagate through subsequent calculations. Such a system would be more efficient than traps and global status flags.\par Advantages and disadvantages of each solution are discussed, and examples of experimental implementations are presented here.

entry:
@TechReport{Fog:2025:PFP,
  author =       "Agner Fog",
  title =        "Parallel floating point exception tracking and {NaN}
                 propagation",
  type =         "Report",
  institution =  "Technical University of Denmark",
  address =      "Lyngby, Denmark",
  pages =        "11",
  day =          "9",
  month =        may,
  year =         "2025",
  bibdate =      "Fri Oct 10 07:58:02 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://www.agner.org/optimize/nan_propagation.pdf",
  abstract =     "The most common methods for detecting errors and
                 exceptions in floating point computing are based on
                 either exception trapping or a global status register.
                 Both methods are relying on sequential logic. These
                 methods are inefficient in modern systems that use
                 out-of-order execution and
                 single-instruction-multiple-data (SIMD) parallelism for
                 improving performance. It would be more efficient to
                 implement a system that attaches the status after an
                 exception to the result register and lets this
                 information follow the same data path and the same form
                 of parallelism as the normal data flow. This can be
                 achieved either by attaching metadata tags to the
                 result or by generating NaN results containing
                 diagnostic payloads. These metadata tags or NaN
                 payloads can propagate through subsequent calculations.
                 Such a system would be more efficient than traps and
                 global status flags.\par

                 Advantages and disadvantages of each solution are
                 discussed, and examples of experimental implementations
                 are presented here.",
  acknowledgement = ack-nhfb,
}


bibtype: article
filename: fparith.bib
label: Fornt:2025:MGE
journal: j-IEEE-TRANS-COMPUT
volume: 74
number: 2
pages: 582--596
year: 2025
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2024.3500369
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Oct 1 06:40:18 2025
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
author:
Jordi Fornt and Enrico Reggiani and Pau Fontova-Muste and Narcis Rodas and Alessandro Pappalardo and Osman Sabri Unsal and Adrian Cristal Kestelman and Josep Altet and Francesc Moll and Jaume Abella

title:
Mix-GEMM: Extending RISC-V CPUs for Energy-Efficient Mixed-Precision DNN Inference Using Binary Segmentation

bibsource:
https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2020.bib; https://www.math.utah.edu/pub/tex/bib/risc-v.bib

keywords:
Artificial neural networks; binary segmentation; Computational modeling; Computer architecture; Computers; Deep neural networks; energy efficiency; Energy efficiency; neural accelerators; Pipelines; Program processors; Quantization (signal); RISC-V extensions; Single instruction multiple data; Software

rawauthor:
Jordi Fornt and Enrico Reggiani and Pau Fontova-Must{\'e} and Narc{\'\i}s Rodas and Alessandro Pappalardo and Osman Sabri Unsal and Adri{\'a}n Cristal Kestelman and Josep Altet and Francesc Moll and Jaume Abella

rawtitle:
{Mix-GEMM}: Extending {RISC-V CPUs} for Energy-Efficient Mixed-Precision {DNN} Inference Using Binary Segmentation

entry:
@Article{Fornt:2025:MGE,
  author =       "Jordi Fornt and Enrico Reggiani and Pau
                 Fontova-Must{\'e} and Narc{\'\i}s Rodas and Alessandro
                 Pappalardo and Osman Sabri Unsal and Adri{\'a}n Cristal
                 Kestelman and Josep Altet and Francesc Moll and Jaume
                 Abella",
  title =        "{Mix-GEMM}: Extending {RISC-V CPUs} for
                 Energy-Efficient Mixed-Precision {DNN} Inference Using
                 Binary Segmentation",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "74",
  number =       "2",
  pages =        "582--596",
  year =         "2025",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2024.3500369",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2020.bib;
                 https://www.math.utah.edu/pub/tex/bib/risc-v.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "Artificial neural networks; binary segmentation;
                 Computational modeling; Computer architecture;
                 Computers; Deep neural networks; energy efficiency;
                 Energy efficiency; neural accelerators; Pipelines;
                 Program processors; Quantization (signal); RISC-V
                 extensions; Single instruction multiple data;
                 Software",
}


bibtype: article
filename: fparith.bib
label: Gao:2025:PPA
author: Jianhua Gao and Zhi Zhou and Xingze Huang and Juan Wang and Yizhuo Wang and Weixing Ji
title: PTPS: Precision-Aware Task Partitioning and Scheduling for SpMV on CPU-FPGA Heterogeneous Platforms
journal: j-IEEE-TRANS-CAD-ICS
volume: 44
number: 10
pages: 3804--3815
year: 2025
CODEN: ITCSDI
DOI: https://doi.org/10.1109/TCAD.2025.3554144
ISSN: 0278-0070 (print), 1937-4151 (electronic) OR 02780070 (print), 19374151 (electronic)
ISSNL: 0278-0070 OR 02780070
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=43
rawauthor: Jianhua Gao and Zhi Zhou and Xingze Huang and Juan Wang and Yizhuo Wang and Weixing Ji
keywords:
Arrays; Central Processing Unit; Computational efficiency; Costs; Field programmable gate arrays; FPGA; Graphics processing units; heterogeneous architecture; Memory management; mixed precision; Optimization; Sparse matrices; SpMV; task scheduling; Vectors

rawtitle:
{PTPS}: Precision-Aware Task Partitioning and Scheduling for {SpMV} on {CPU-FPGA} Heterogeneous Platforms

entry:
@Article{Gao:2025:PPA,
  author =       "Jianhua Gao and Zhi Zhou and Xingze Huang and Juan
                 Wang and Yizhuo Wang and Weixing Ji",
  title =        "{PTPS}: Precision-Aware Task Partitioning and
                 Scheduling for {SpMV} on {CPU-FPGA} Heterogeneous
                 Platforms",
  journal =      j-IEEE-TRANS-CAD-ICS,
  volume =       "44",
  number =       "10",
  pages =        "3804--3815",
  year =         "2025",
  CODEN =        "ITCSDI",
  DOI =          "https://doi.org/10.1109/TCAD.2025.3554144",
  ISSN =         "0278-0070 (print), 1937-4151 (electronic)",
  ISSN-L =       "0278-0070",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Computer-Aided Design of
                 Integrated Circuits and Systems",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=43",
  keywords =     "Arrays; Central Processing Unit; Computational
                 efficiency; Costs; Field programmable gate arrays;
                 FPGA; Graphics processing units; heterogeneous
                 architecture; Memory management; mixed precision;
                 Optimization; Sparse matrices; SpMV; task scheduling;
                 Vectors",
}


bibtype: inproceedings
filename: fparith.bib
label: Garcia:2025:HAT
author: Remi Garcia and Leo Pradels and Silviu-Ioan Filip and Olivier Sentieys
title: Hardware-Aware Training for Multiplierless Convolutional Neural Networks
crossref: IEEE:2025:PIS
pages: 9--16
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00012
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: R{\'e}mi Garcia and L{\'e}o Pradels and Silviu-Ioan Filip and Olivier Sentieys
rawtitle: Hardware-Aware Training for Multiplierless Convolutional Neural Networks
entry:
@InProceedings{Garcia:2025:HAT,
  author =       "R{\'e}mi Garcia and L{\'e}o Pradels and Silviu-Ioan
                 Filip and Olivier Sentieys",
  title =        "Hardware-Aware Training for Multiplierless
                 Convolutional Neural Networks",
  crossref =     "IEEE:2025:PIS",
  pages =        "9--16",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00012",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: techreport
filename: fparith.bib
label: Gladman:2025:AMFa
author: Brian Gladman and Vincenzo Innocente and John Mather and Paul Zimmermann
title: Accuracy of Mathematical Functions in Single, Double, Double Extended, and Quadruple Precision
pages: 27
day: 10
month: feb
monthnumber: 2
year: 2025
bibdate: Mon Feb 10 10:00:22 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.02.10 10:00:22 ???
URL: https://members.loria.fr/PZimmermann/papers/accuracy.pdf
acknowledgement: ack-nhfb
rawauthor: Brian Gladman and Vincenzo Innocente and John Mather and Paul Zimmermann
rawtitle: Accuracy of Mathematical Functions in Single, Double, Double Extended, and Quadruple Precision
remark:
Tabular comparison of AMD, Apple, ARM, CUDA, FreeBSD, GNU, Intel, LLVM, Microsoft Musl, Newlib, OpenLibm, RadeonOpenCompute (ROCm), and RedHat -lm libraries for correct rounding, versus results from MPFR.

entry:
@TechReport{Gladman:2025:AMFa,
  author =       "Brian Gladman and Vincenzo Innocente and John Mather
                 and Paul Zimmermann",
  title =        "Accuracy of Mathematical Functions in Single, Double,
                 Double Extended, and Quadruple Precision",
  institution =  "????",
  pages =        "27",
  day =          "10",
  month =        feb,
  year =         "2025",
  bibdate =      "Mon Feb 10 10:00:22 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://members.loria.fr/PZimmermann/papers/accuracy.pdf",
  acknowledgement = ack-nhfb,
  remark =       "Tabular comparison of AMD, Apple, ARM, CUDA, FreeBSD,
                 GNU, Intel, LLVM, Microsoft Musl, Newlib, OpenLibm,
                 RadeonOpenCompute (ROCm), and RedHat -lm libraries for
                 correct rounding, versus results from MPFR.",
}


bibtype: techreport
filename: fparith.bib
label: Gladman:2025:AMFb
author: Brian Gladman and Vincenzo Innocente and John Mather and Paul Zimmermann
title: Accuracy of Mathematical Functions in Single, Double, Double Extended, and Quadruple Precision
pages: 29
day: 27
month: aug
monthnumber: 8
year: 2025
bibdate: Wed Aug 27 11:11:51 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.08.27 11:11:51 ???
URL: https://members.loria.fr/PZimmermann/papers/accuracy.pdf
acknowledgement: ack-nhfb
rawauthor: Brian Gladman and Vincenzo Innocente and John Mather and Paul Zimmermann
rawtitle: Accuracy of Mathematical Functions in Single, Double, Double Extended, and Quadruple Precision
remark:
Tabular comparison of AMD, Apple, ARM, CUDA, FreeBSD, GNU, Intel, LLVM, Microsoft Musl, Newlib, OpenLibm, RadeonOpenCompute (ROCm), and RedHat -lm libraries for correct rounding, versus results from MPFR. The e-mail announcement reports: ``Main changes in this update: * we have added compoundn, pown and rootn; * GNU libc is the first library to provide all new C23 functions; * GNU libc now provides 31 correctly-rounded functions in single precision.''

entry:
@TechReport{Gladman:2025:AMFb,
  author =       "Brian Gladman and Vincenzo Innocente and John Mather
                 and Paul Zimmermann",
  title =        "Accuracy of Mathematical Functions in Single, Double,
                 Double Extended, and Quadruple Precision",
  institution =  "????",
  pages =        "29",
  day =          "27",
  month =        aug,
  year =         "2025",
  bibdate =      "Wed Aug 27 11:11:51 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://members.loria.fr/PZimmermann/papers/accuracy.pdf",
  acknowledgement = ack-nhfb,
  remark =       "Tabular comparison of AMD, Apple, ARM, CUDA, FreeBSD,
                 GNU, Intel, LLVM, Microsoft Musl, Newlib, OpenLibm,
                 RadeonOpenCompute (ROCm), and RedHat -lm libraries for
                 correct rounding, versus results from MPFR. The e-mail
                 announcement reports: ``Main changes in this update: *
                 we have added compoundn, pown and rootn; * GNU libc is
                 the first library to provide all new C23 functions; *
                 GNU libc now provides 31 correctly-rounded functions in
                 single precision.''",
}


bibtype: inproceedings
filename: fparith.bib
label: Gorgin:2025:GMA
author: Saeid Gorgin and Amirhossein Sadr and Dara Rahmati and Jungrae Kim
title: A Generic Modulo- $ (2^n pm delta ) $ Addition Algorithm via Two-Valued Digit Encoding
crossref: IEEE:2025:PIS
pages: 85--92
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00023
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Saeid Gorgin and Amirhossein Sadr and Dara Rahmati and Jungrae Kim
rawtitle: A Generic Modulo- $ (2^n \pm \delta) $ Addition Algorithm via Two-Valued Digit Encoding
entry:
@InProceedings{Gorgin:2025:GMA,
  author =       "Saeid Gorgin and Amirhossein Sadr and Dara Rahmati and
                 Jungrae Kim",
  title =        "A Generic Modulo- $ (2^n \pm \delta) $ Addition
                 Algorithm via Two-Valued Digit Encoding",
  crossref =     "IEEE:2025:PIS",
  pages =        "85--92",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00023",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: article
filename: fparith.bib
label: Graillat:2025:CDF
author: Stef Graillat and Theo Mary
title: Condense and Distill: Fast Distillation of Large Floating-Point Sums via Condensation
journal: j-SIAM-J-SCI-COMP
volume: 47
number: 2
pages: B583--B594
year: 2025
CODEN: SJOCE3
DOI: https://doi.org/10.1137/24M1647217
ISSN: 1064-8275 (print), 1095-7197 (electronic) OR 10648275 (print), 10957197 (electronic)
ISSNL: 1064-8275 OR 10648275
bibdate: Sat Oct 18 11:20:04 MDT 2025
bibtimestamp: 2025.10.18 11:20:04 MDT
URL: https://epubs.siam.org/doi/10.1137/24M1647217
fjournal: SIAM Journal on Scientific Computing
acknowledgement: ack-nhfb
journalURL: http://epubs.siam.org/sisc
rawauthor: Stef Graillat and Theo Mary
rawtitle: Condense and Distill: Fast Distillation of Large Floating-Point Sums via Condensation
bibsource:
http://epubs.siam.org/toc/sjoce3/47/2; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/siamjscicomput.bib

entry:
@Article{Graillat:2025:CDF,
  author =       "Stef Graillat and Theo Mary",
  title =        "Condense and Distill: Fast Distillation of Large
                 Floating-Point Sums via Condensation",
  journal =      j-SIAM-J-SCI-COMP,
  volume =       "47",
  number =       "2",
  pages =        "B583--B594",
  month =        "????",
  year =         "2025",
  CODEN =        "SJOCE3",
  DOI =          "https://doi.org/10.1137/24M1647217",
  ISSN =         "1064-8275 (print), 1095-7197 (electronic)",
  ISSN-L =       "1064-8275",
  bibdate =      "Sat Oct 18 11:20:04 MDT 2025",
  bibsource =    "http://epubs.siam.org/toc/sjoce3/47/2;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/siamjscicomput.bib",
  URL =          "https://epubs.siam.org/doi/10.1137/24M1647217",
  acknowledgement = ack-nhfb,
  fjournal =     "SIAM Journal on Scientific Computing",
  journal-URL =  "http://epubs.siam.org/sisc",
}


bibtype: techreport
filename: fparith.bib
label: Graillat:2025:EFCa
author: Stef Graillat and Jean-Michel Muller
type: Report
number: hal-04575249
institution: Sorbonne Universite, CNRS, LIP6 and CNR, Laboratoire LIP, Universite de Lyon
address: Paris, France and Lyon, France
pages: 29
day: 17
month: may
monthnumber: 5
year: 2025
bibdate: Mon Jul 14 06:27:51 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.07.14 06:27:51 ???
URL: https://hal.science/hal-04575249v2
remark: The appendix supplies C implementations of the complicated formal algorithms.
acknowledgement: ack-nhfb
rawauthor: Stef Graillat and Jean-Michel Muller
title:
Emulation of the FMA and the correctly-rounded sum of three numbers in rounding-to-nearest floating-point arithmetic

abstract:
We present algorithms that allow one to emulate the fused multiply-add (FMA) instruction and the correctly-rounded sum of three numbers (ADD3) in binary floating-point arithmetic, using only rounding-to-nearest floating- point additions, multiplications, and comparisons. We then introduce variants of these algorithm that make it possible to compute the error of an ADD3 or FMA operation.

keywords:
ADD3; double-word arithmetic; Error-free transforms; Floating-point arithmetic; FMA; fused multiply-add; triple-word arithmetic

rawabstract:
We present algorithms that allow one to emulate the fused multiply-add (FMA) instruction and the correctly-rounded sum of three numbers (ADD3) in binary floating-point arithmetic, using only rounding-to-nearest floating- point additions, multiplications, and comparisons. We then introduce variants of these algorithm that make it possible to compute the error of an ADD3 or FMA operation.

rawtitle:
Emulation of the {FMA} and the correctly-rounded sum of three numbers in rounding-to-nearest floating-point arithmetic

entry:
@TechReport{Graillat:2025:EFCa,
  author =       "Stef Graillat and Jean-Michel Muller",
  title =        "Emulation of the {FMA} and the correctly-rounded sum
                 of three numbers in rounding-to-nearest floating-point
                 arithmetic",
  type =         "Report",
  number =       "hal-04575249",
  institution =  "Sorbonne Universit{\'e}, CNRS, LIP6 and CNR,
                 Laboratoire LIP, Universit{\'e} de Lyon",
  address =      "Paris, France and Lyon, France",
  pages =        "29",
  day =          "17",
  month =        may,
  year =         "2025",
  bibdate =      "Mon Jul 14 06:27:51 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://hal.science/hal-04575249v2",
  abstract =     "We present algorithms that allow one to emulate the
                 fused multiply-add (FMA) instruction and the
                 correctly-rounded sum of three numbers (ADD3) in binary
                 floating-point arithmetic, using only
                 rounding-to-nearest floating- point additions,
                 multiplications, and comparisons. We then introduce
                 variants of these algorithm that make it possible to
                 compute the error of an ADD3 or FMA operation.",
  acknowledgement = ack-nhfb,
  keywords =     "ADD3; double-word arithmetic; Error-free transforms;
                 Floating-point arithmetic; FMA; fused multiply-add;
                 triple-word arithmetic",
  remark =       "The appendix supplies C implementations of the
                 complicated formal algorithms.",
}


bibtype: article
filename: fparith.bib
label: Graillat:2025:EFCb
author: Stef Graillat and Jean-Michel Muller
journal: j-NUM-MATH
volume: 157
number: 5
pages: 1615--1641
month: oct
monthnumber: 10
year: 2025
CODEN: NUMMA7
DOI: https://doi.org/10.1007/s00211-025-01487-2
ISSN: 0029-599X (print), 0945-3245 (electronic) OR 0029599X (print), 09453245 (electronic)
ISSNL: 0029-599X OR 0029599X
bibdate: Wed Oct 15 05:40:30 MDT 2025
bibtimestamp: 2025.10.15 05:40:30 MDT
URL: https://link.springer.com/article/10.1007/s00211-025-01487-2
fjournal: Numerische Mathematik
acknowledgement: ack-nhfb
ajournal: Num. Math.
journalURL: http://link.springer.com/journal/211
rawauthor: Stef Graillat and Jean-Michel Muller
title:
Emulation of the FMA and the correctly-rounded sum of three numbers in rounding-to-nearest floating-point arithmetic

bibsource:
https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/nummath2020.bib

rawtitle:
Emulation of the {FMA} and the correctly-rounded sum of three numbers in rounding-to-nearest floating-point arithmetic

entry:
@Article{Graillat:2025:EFCb,
  author =       "Stef Graillat and Jean-Michel Muller",
  title =        "Emulation of the {FMA} and the correctly-rounded sum
                 of three numbers in rounding-to-nearest floating-point
                 arithmetic",
  journal =      j-NUM-MATH,
  volume =       "157",
  number =       "5",
  pages =        "1615--1641",
  month =        oct,
  year =         "2025",
  CODEN =        "NUMMA7",
  DOI =          "https://doi.org/10.1007/s00211-025-01487-2",
  ISSN =         "0029-599X (print), 0945-3245 (electronic)",
  ISSN-L =       "0029-599X",
  bibdate =      "Wed Oct 15 05:40:30 MDT 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/nummath2020.bib",
  URL =          "https://link.springer.com/article/10.1007/s00211-025-01487-2",
  acknowledgement = ack-nhfb,
  ajournal =     "Num. Math.",
  fjournal =     "Numerische Mathematik",
  journal-URL =  "http://link.springer.com/journal/211",
  online-date =  "09 September 2025",
}


bibtype: techreport
filename: fparith.bib
label: Graillat:2025:EFF
author: Stef Graillat and Jean-Michel Muller
type: Report
number: hal-04624238
institution: Sorbonne Universite, CNRS, LIP6 and CNR, Laboratoire LIP, Universite de Lyon
address: Paris, France and Lyon, France
pages: 21
day: 25
month: jun
monthnumber: 6
year: 2025
bibdate: Mon Jul 14 06:27:51 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.07.14 06:27:51 ???
URL: https://hal.science/hal-04624238v1
acknowledgement: ack-nhfb
rawauthor: Stef Graillat and Jean-Michel Muller
title:
Emulation of 3Sum, 4Sum, the FMA and the FD2 instructions in rounded-to-nearest floating-point arithmetic

abstract:
We give high level algorithms that make it possible to compute the rounded-to-nearest sum of 3 or 4 floating-point numbers in binary floating-point arithmetic. They can easily be adapted to emulate the FMA ($ a b + c $ correctly rounded) and FD2 ($ a b + c d $ correctly rounded) instructions.

keywords:
accurate floating-point summation; double-word arithmetic; Error-free transforms; FD2; Floating-point arithmetic; FMA; fused dot-product; fused multiply-add; Sum3; Sum4

rawabstract:
We give high level algorithms that make it possible to compute the rounded-to-nearest sum of 3 or 4 floating-point numbers in binary floating-point arithmetic. They can easily be adapted to emulate the FMA ($ a b + c $ correctly rounded) and FD2 ($ a b + c d $ correctly rounded) instructions.

rawtitle:
Emulation of {3Sum}, {4Sum}, the {FMA} and the {FD2} instructions in rounded-to-nearest floating-point arithmetic

entry:
@TechReport{Graillat:2025:EFF,
  author =       "Stef Graillat and Jean-Michel Muller",
  title =        "Emulation of {3Sum}, {4Sum}, the {FMA} and the {FD2}
                 instructions in rounded-to-nearest floating-point
                 arithmetic",
  type =         "Report",
  number =       "hal-04624238",
  institution =  "Sorbonne Universit{\'e}, CNRS, LIP6 and CNR,
                 Laboratoire LIP, Universit{\'e} de Lyon",
  address =      "Paris, France and Lyon, France",
  pages =        "21",
  day =          "25",
  month =        jun,
  year =         "2025",
  bibdate =      "Mon Jul 14 06:27:51 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://hal.science/hal-04624238v1",
  abstract =     "We give high level algorithms that make it possible to
                 compute the rounded-to-nearest sum of 3 or 4
                 floating-point numbers in binary floating-point
                 arithmetic. They can easily be adapted to emulate the
                 FMA ($ a b + c $ correctly rounded) and FD2 ($ a b + c
                 d $ correctly rounded) instructions.",
  acknowledgement = ack-nhfb,
  keywords =     "accurate floating-point summation; double-word
                 arithmetic; Error-free transforms; FD2; Floating-point
                 arithmetic; FMA; fused dot-product; fused multiply-add;
                 Sum3; Sum4",
}


bibtype: inproceedings
filename: fparith.bib
label: Haghi:2025:DTQ
booktitle: 2025 62nd ACM/IEEE Design Automation Conference (DAC)
title: DM-Tune: Quantizing Diffusion Models with Mixture-of-Gaussian Guided Noise Tuning
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--7
year: 2025
DOI: https://doi.org/10.1109/DAC63849.2025.11132501
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawbooktitle: {2025 62nd ACM/IEEE Design Automation Conference (DAC)}
rawtitle: {DM-Tune}: Quantizing Diffusion Models with Mixture-of-{Gaussian} Guided Noise Tuning
author:
Pouya Haghi and Ali Falahati and Zahra Azad and Chunshu Wu and Ruibing Song and Chuan Liu and Ang Li and Tong Geng

keywords:
Diffusion models; Diffusion Models; Diversity reception; GPU; Graphics processing units; Image quality; Image synthesis; Kernel; Mixed-precision; Noise; Quantization; Quantization (signal); Runtime; Text to image

rawauthor:
Pouya Haghi and Ali Falahati and Zahra Azad and Chunshu Wu and Ruibing Song and Chuan Liu and Ang Li and Tong Geng

entry:
@InProceedings{Haghi:2025:DTQ,
  author =       "Pouya Haghi and Ali Falahati and Zahra Azad and
                 Chunshu Wu and Ruibing Song and Chuan Liu and Ang Li
                 and Tong Geng",
  booktitle =    "{2025 62nd ACM/IEEE Design Automation Conference
                 (DAC)}",
  title =        "{DM-Tune}: Quantizing Diffusion Models with
                 Mixture-of-{Gaussian} Guided Noise Tuning",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--7",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/DAC63849.2025.11132501",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Diffusion models; Diffusion Models; Diversity
                 reception; GPU; Graphics processing units; Image
                 quality; Image synthesis; Kernel; Mixed-precision;
                 Noise; Quantization; Quantization (signal); Runtime;
                 Text to image",
}


bibtype: article
filename: fparith.bib
label: Haq:2025:MIF
author: Sami Ul Haq and Aiman H. El-Maleh and Ali Alsuwaiyan
title: Multiple-Input Floating-Point Adders: A Comprehensive Review
journal: j-IEEE-ACCESS
volume: 13
pages: 91012--91024
year: 2025
DOI: https://doi.org/10.1109/ACCESS.2025.3572430
ISSN: 2169-3536 OR 21693536
ISSNL: 2169-3536 OR 21693536
bibdate: Tue Sep 30 17:30:28 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.09.30 17:30:28 ???
fjournal: IEEE Access
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639
rawauthor: Sami Ul Haq and Aiman H. El-Maleh and Ali Alsuwaiyan
rawtitle: Multiple-Input Floating-Point Adders: A Comprehensive Review
keywords:
Adders; Complexity theory; Computational modeling; Computer architecture; floating-point adders; Floating-point arithmetic; Hardware; high-performance computing; Machine learning; multiple-input floating-point adders; Reviews; Standards; Throughput

entry:
@Article{Haq:2025:MIF,
  author =       "Sami Ul Haq and Aiman H. El-Maleh and Ali Alsuwaiyan",
  title =        "Multiple-Input Floating-Point Adders: A Comprehensive
                 Review",
  journal =      j-IEEE-ACCESS,
  volume =       "13",
  pages =        "91012--91024",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ACCESS.2025.3572430",
  ISSN =         "2169-3536",
  ISSN-L =       "2169-3536",
  bibdate =      "Tue Sep 30 17:30:28 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Access",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639",
  keywords =     "Adders; Complexity theory; Computational modeling;
                 Computer architecture; floating-point adders;
                 Floating-point arithmetic; Hardware; high-performance
                 computing; Machine learning; multiple-input
                 floating-point adders; Reviews; Standards; Throughput",
}


bibtype: article
filename: fparith.bib
label: Hsu:2025:NFP
title: A 22 nm Floating-Point ReRAM Compute-in-Memory Macro Using Residue-Shared ADC for AI Edge Device
journal: j-IEEE-J-SOLID-STATE-CIRCUITS
volume: 60
number: 1
pages: 171--183
year: 2025
CODEN: IJSCBC
DOI: https://doi.org/10.1109/JSSC.2024.3470211
ISSN: 0018-9200 (print), 1558-173X (electronic) OR 00189200 (print), 1558173X (electronic)
ISSNL: 0018-9200 OR 00189200
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Journal of Solid-State Circuits
acknowledgement: ack-nhfb
author:
Hung-Hsi Hsu and Tai-Hao Wen and Win-San Khwa and Wei-Hsing Huang and Zhao-En Ke and Yu-Hsiang Chin and Hua-Jin Wen and Yu-Chen Chang and Wei-Ting Hsu and Ashwin Sanjay Lele and Bo Zhang and Ping-Sheng Wu and Chung-Chuan Lo and Ren-Shuo Liu and Chih-Cheng Hsieh and Kea-Tiong Tang and Shih-Hsin Teng and Chung-Cheng Chou and Yu-Der Chih and Tsung-Yung Jonathan Chang and Meng-Fan Chang

keywords:
Accuracy; Artificial intelligence; Artificial intelligence (AI); Common Information Model (computing); Companies; compute-in-memory (CIM); Energy consumption; floating-point (FP); In-memory computing; Kernel; multiply-and-accumulate (MAC); Neural networks; Nonvolatile memory; residue analog-to-digital converter (ADC); resistive random access memory (ReRAM); System-on-chip

rawauthor:
Hung-Hsi Hsu and Tai-Hao Wen and Win-San Khwa and Wei-Hsing Huang and Zhao-En Ke and Yu-Hsiang Chin and Hua-Jin Wen and Yu-Chen Chang and Wei-Ting Hsu and Ashwin Sanjay Lele and Bo Zhang and Ping-Sheng Wu and Chung-Chuan Lo and Ren-Shuo Liu and Chih-Cheng Hsieh and Kea-Tiong Tang and Shih-Hsin Teng and Chung-Cheng Chou and Yu-Der Chih and Tsung-Yung Jonathan Chang and Meng-Fan Chang

rawtitle:
A 22 nm Floating-Point {ReRAM} Compute-in-Memory Macro Using Residue-Shared {ADC} for {AI} Edge Device

entry:
@Article{Hsu:2025:NFP,
  author =       "Hung-Hsi Hsu and Tai-Hao Wen and Win-San Khwa and
                 Wei-Hsing Huang and Zhao-En Ke and Yu-Hsiang Chin and
                 Hua-Jin Wen and Yu-Chen Chang and Wei-Ting Hsu and
                 Ashwin Sanjay Lele and Bo Zhang and Ping-Sheng Wu and
                 Chung-Chuan Lo and Ren-Shuo Liu and Chih-Cheng Hsieh
                 and Kea-Tiong Tang and Shih-Hsin Teng and Chung-Cheng
                 Chou and Yu-Der Chih and Tsung-Yung Jonathan Chang and
                 Meng-Fan Chang",
  title =        "A 22 nm Floating-Point {ReRAM} Compute-in-Memory Macro
                 Using Residue-Shared {ADC} for {AI} Edge Device",
  journal =      j-IEEE-J-SOLID-STATE-CIRCUITS,
  volume =       "60",
  number =       "1",
  pages =        "171--183",
  year =         "2025",
  CODEN =        "IJSCBC",
  DOI =          "https://doi.org/10.1109/JSSC.2024.3470211",
  ISSN =         "0018-9200 (print), 1558-173X (electronic)",
  ISSN-L =       "0018-9200",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Journal of Solid-State Circuits",
  keywords =     "Accuracy; Artificial intelligence; Artificial
                 intelligence (AI); Common Information Model
                 (computing); Companies; compute-in-memory (CIM); Energy
                 consumption; floating-point (FP); In-memory computing;
                 Kernel; multiply-and-accumulate (MAC); Neural networks;
                 Nonvolatile memory; residue analog-to-digital converter
                 (ADC); resistive random access memory (ReRAM);
                 System-on-chip",
}


bibtype: inproceedings
filename: fparith.bib
label: Hubner:2025:AVO
author: Paul Hubner and Andong Hu and Ivy Peng and Stefano Markidis
booktitle: 2025 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)
title: Apple vs. Oranges: Evaluating the Apple Silicon M-Series SoCs for HPC Performance and Efficiency
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 45--54
year: 2025
DOI: https://doi.org/10.1109/IPDPSW66978.2025.00013
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Paul H{\"u}bner and Andong Hu and Ivy Peng and Stefano Markidis
rawbooktitle: {2025 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)}
keywords:
Apple Silicon M-Series GPU Performance; ARM-based SoC; Bandwidth; Graphics processing units; M1; M2; M3; M4 Architecture; Memory architecture; Memory management; Metals; Power demand; Power measurement; Reviews; Semiconductor device measurement; Silicon

rawtitle:
{Apple} vs. Oranges: Evaluating the {Apple} Silicon {M}-Series {SoCs} for {HPC} Performance and Efficiency

entry:
@InProceedings{Hubner:2025:AVO,
  author =       "Paul H{\"u}bner and Andong Hu and Ivy Peng and Stefano
                 Markidis",
  booktitle =    "{2025 IEEE International Parallel and Distributed
                 Processing Symposium Workshops (IPDPSW)}",
  title =        "{Apple} vs. Oranges: Evaluating the {Apple} Silicon
                 {M}-Series {SoCs} for {HPC} Performance and
                 Efficiency",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "45--54",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/IPDPSW66978.2025.00013",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Apple Silicon M-Series GPU Performance; ARM-based SoC;
                 Bandwidth; Graphics processing units; M1; M2; M3; M4
                 Architecture; Memory architecture; Memory management;
                 Metals; Power demand; Power measurement; Reviews;
                 Semiconductor device measurement; Silicon",
}


bibtype: article
filename: fparith.bib
label: Imbach:2025:FER
author: Remi Imbach and Guillaume Moroz
title: Fast evaluation and root finding for polynomials with floating-point coefficients
journal: j-J-SYMBOLIC-COMP
volume: 127
pages: ??--??
month: mar
monthnumber: 3
year: 2025
CODEN: JSYCEH
DOI: https://doi.org/10.1016/j.jsc.2024.102372
ISSN: 0747-7171 (print), 1095-855X (electronic) OR 07477171 (print), 1095855X (electronic)
ISSNL: 0747-7171 OR 07477171
bibdate: Fri Sep 6 08:44:41 MDT 2024
bibtimestamp: 2024.09.06 08:44:41 MDT
URL: http://www.sciencedirect.com/science/article/pii/S0747717124000762
fjournal: Journal of Symbolic Computation
acknowledgement: ack-nhfb
articleno: 102372
journalURL: http://www.sciencedirect.com/science/journal/07477171
rawauthor: R{\'e}mi Imbach and Guillaume Moroz
rawtitle: Fast evaluation and root finding for polynomials with floating-point coefficients
entry:
@Article{Imbach:2025:FER,
  author =       "R{\'e}mi Imbach and Guillaume Moroz",
  title =        "Fast evaluation and root finding for polynomials with
                 floating-point coefficients",
  journal =      j-J-SYMBOLIC-COMP,
  volume =       "127",
  number =       "??",
  pages =        "??--??",
  month =        mar # "\slash " # apr,
  year =         "2025",
  CODEN =        "JSYCEH",
  DOI =          "https://doi.org/10.1016/j.jsc.2024.102372",
  ISSN =         "0747-7171 (print), 1095-855X (electronic)",
  ISSN-L =       "0747-7171",
  bibdate =      "Fri Sep 6 08:44:41 MDT 2024",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/jsymcomp.bib",
  URL =          "http://www.sciencedirect.com/science/article/pii/S0747717124000762",
  acknowledgement = ack-nhfb,
  articleno =    "102372",
  fjournal =     "Journal of Symbolic Computation",
  journal-URL =  "http://www.sciencedirect.com/science/journal/07477171",
}


bibtype: inproceedings
filename: fparith.bib
label: Islamoglu:2025:MRV
title: MXDOTP: a RISC-V ISA Extension for Enabling Microscaling (MX) Floating-Point Dot Products
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 81--84
year: 2025
DOI: https://doi.org/10.1109/ASAP65064.2025.00021
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/risc-v.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawtitle: {MXDOTP}: a {RISC-V ISA} Extension for Enabling Microscaling ({MX}) Floating-Point Dot Products
author:
Gamze Islamoglu and Luca Bertaccini and Arpan Suravi Prasad and Francesco Conti and Angelo Garofalo and Luca Benini

booktitle:
2025 IEEE 36th International Conference on Application-specific Systems, Architectures and Processors (ASAP)

keywords:
Artificial intelligence; Energy efficiency; FinFETs; Kernel; Linear algebra; Program processors; Registers; Semantics; Software; Systems architecture

rawauthor:
Gamze {\.I}slamo{\u{g}}lu and Luca Bertaccini and Arpan Suravi Prasad and Francesco Conti and Angelo Garofalo and Luca Benini

rawbooktitle:
{2025 IEEE 36th International Conference on Application-specific Systems, Architectures and Processors (ASAP)}

entry:
@InProceedings{Islamoglu:2025:MRV,
  author =       "Gamze {\.I}slamo{\u{g}}lu and Luca Bertaccini and
                 Arpan Suravi Prasad and Francesco Conti and Angelo
                 Garofalo and Luca Benini",
  booktitle =    "{2025 IEEE 36th International Conference on
                 Application-specific Systems, Architectures and
                 Processors (ASAP)}",
  title =        "{MXDOTP}: a {RISC-V ISA} Extension for Enabling
                 Microscaling ({MX}) Floating-Point Dot Products",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "81--84",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ASAP65064.2025.00021",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/risc-v.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Artificial intelligence; Energy efficiency; FinFETs;
                 Kernel; Linear algebra; Program processors; Registers;
                 Semantics; Software; Systems architecture",
}


bibtype: inproceedings
filename: fparith.bib
label: Jeannerod:2025:FR
author: Claude-Pierre Jeannerod and Paul Zimmermann
title: FastTwoSum revisited
crossref: IEEE:2025:PIS
pages: 141--148
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00030
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Claude-Pierre Jeannerod and Paul Zimmermann
rawtitle: {FastTwoSum} revisited
entry:
@InProceedings{Jeannerod:2025:FR,
  author =       "Claude-Pierre Jeannerod and Paul Zimmermann",
  title =        "{FastTwoSum} revisited",
  crossref =     "IEEE:2025:PIS",
  pages =        "141--148",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00030",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Joseph:2025:FPC
author: Nimmy Joseph and Joji Daniel and Padmakumar K and Jayalekshmi L
booktitle: 2025 6th International Conference on Control, Communication and Computing (ICCC)
title: Floating-Point CORDIC Processor in Hyperbolic Coordinate System
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--6
year: 2025
DOI: https://doi.org/10.1109/ICCC64910.2025.11077237
bibdate: Mon Oct 27 10:32:44 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/cordic.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.27 10:32:44 ???
keywords: Cordic; FPU; Hardware; ISA; Process control; Processor; Vectors
acknowledgement: ack-nhfb
rawauthor: Nimmy Joseph and Joji Daniel and Padmakumar K and Jayalekshmi L
rawbooktitle: {2025 6th International Conference on Control, Communication and Computing (ICCC)}
rawtitle: Floating-Point {CORDIC} Processor in Hyperbolic Coordinate System
entry:
@InProceedings{Joseph:2025:FPC,
  author =       "Nimmy Joseph and Joji Daniel and Padmakumar K and
                 Jayalekshmi L",
  booktitle =    "{2025 6th International Conference on Control,
                 Communication and Computing (ICCC)}",
  title =        "Floating-Point {CORDIC} Processor in Hyperbolic
                 Coordinate System",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--6",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ICCC64910.2025.11077237",
  bibdate =      "Mon Oct 27 10:32:44 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/cordic.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Cordic; FPU; Hardware; ISA; Process control;
                 Processor; Vectors",
}


bibtype: inproceedings
filename: fparith.bib
label: Joshi:2025:DIF
title: Design and Implementation of FP32 MAC for DNN
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1397--1402
year: 2025
DOI: https://doi.org/10.1109/ICICV64824.2025.11085483
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/risc-v.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawtitle: Design and Implementation of {FP32 MAC} for {DNN}
author:
Rajaswini P. Joshi and Anand N and Saurabh Kesari and Shashank Singh and Ravi Ranjan and Jayaraj U. Kidav

booktitle:
2025 6th International Conference on Intelligent Communication Technologies and Virtual Mobile Networks (ICICV)

keywords:
Adders; Artificial neural networks; Computer architecture; Dadda multiplier; Deep learning; DNN acceleration; Field programmable gate arrays; FP32 MAC unit; FPGA; Hardware acceleration; IEEE 754 floating-point; Kogge-Stone adder; Logic; Low latency communication; Pipeline processing; RISC-V processor; Throughput

rawauthor:
Rajaswini P. Joshi and Anand N and Saurabh Kesari and Shashank Singh and Ravi Ranjan and Jayaraj U. Kidav

rawbooktitle:
{2025 6th International Conference on Intelligent Communication Technologies and Virtual Mobile Networks (ICICV)}

entry:
@InProceedings{Joshi:2025:DIF,
  author =       "Rajaswini P. Joshi and Anand N and Saurabh Kesari and
                 Shashank Singh and Ravi Ranjan and Jayaraj U. Kidav",
  booktitle =    "{2025 6th International Conference on Intelligent
                 Communication Technologies and Virtual Mobile Networks
                 (ICICV)}",
  title =        "Design and Implementation of {FP32 MAC} for {DNN}",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1397--1402",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ICICV64824.2025.11085483",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/risc-v.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Adders; Artificial neural networks; Computer
                 architecture; Dadda multiplier; Deep learning; DNN
                 acceleration; Field programmable gate arrays; FP32 MAC
                 unit; FPGA; Hardware acceleration; IEEE 754
                 floating-point; Kogge-Stone adder; Logic; Low latency
                 communication; Pipeline processing; RISC-V processor;
                 Throughput",
}


bibtype: misc
filename: fparith.bib
label: Kashiwagi:2025:KCL
author: Masahide Kashiwagi
title: tt kv --- a C++ Library for Verified Numerical Computation
pages: 1397--1402
day: 15
month: mar
monthnumber: 3
year: 2025
bibdate: Wed Aug 27 12:31:38 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.08.27 12:31:38 ???
URL: http://verifiedby.me/kv/index-e.html
acknowledgement: ack-nhfb
howpublished: Web site.
rawauthor: Masahide Kashiwagi
rawtitle: {\tt kv} --- a {C++} Library for Verified Numerical Computation
entry:
@Misc{Kashiwagi:2025:KCL,
  author =       "Masahide Kashiwagi",
  title =        "{\tt kv} --- a {C++} Library for Verified Numerical
                 Computation",
  howpublished = "Web site.",
  day =          "15",
  month =        mar,
  year =         "2025",
  bibdate =      "Wed Aug 27 12:31:38 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://verifiedby.me/kv/index-e.html",
  acknowledgement = ack-nhfb,
}


bibtype: inproceedings
filename: fparith.bib
label: Khwa:2025:WWM
booktitle: 2025 IEEE International Solid-State Circuits Conference (ISSCC)
volume: 68
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--3
year: 2025
DOI: https://doi.org/10.1109/ISSCC49661.2025.10904606
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawbooktitle: {2025 IEEE International Solid-State Circuits Conference (ISSCC)}
author:
Win-San Khwa and Ping-Chun Wu and Jian-Wei Su and Chiao-Yen Cheng and Jun-Ming Hsu and Yu-Chen Chen and Le-Jung Hsieh and Jyun-Cheng Bai and Yu-Sheng Kao and Tsung-Han Lou and Ashwin Sanjay Lele and Jui-Jen Wu and Jen-Chun Tien and Chung-Chuan Lo and Ren-Shuo Liu and Chih-Cheng Hsieh and Kea-Tiong Tang and Meng-Fan Chang

title:
14.2 A 16nm 216kb, 188.4TOPS/W and 133.5TFLOPS/W Microscaling Multi-Mode Gain-Cell CIM Macro Edge-AI Devices

keywords:
Accuracy; Adders; Common Information Model (computing); Costs; Data transfer; Energy consumption; Hardware; Memory management; Micromechanical devices; Transistors

rawauthor:
Win-San Khwa and Ping-Chun Wu and Jian-Wei Su and Chiao-Yen Cheng and Jun-Ming Hsu and Yu-Chen Chen and Le-Jung Hsieh and Jyun-Cheng Bai and Yu-Sheng Kao and Tsung-Han Lou and Ashwin Sanjay Lele and Jui-Jen Wu and Jen-Chun Tien and Chung-Chuan Lo and Ren-Shuo Liu and Chih-Cheng Hsieh and Kea-Tiong Tang and Meng-Fan Chang

rawtitle:
14.2 A 16nm 216kb, {188.4TOPS/W} and {133.5TFLOPS/W} Microscaling Multi-Mode Gain-Cell {CIM} Macro {Edge-AI} Devices

entry:
@InProceedings{Khwa:2025:WWM,
  author =       "Win-San Khwa and Ping-Chun Wu and Jian-Wei Su and
                 Chiao-Yen Cheng and Jun-Ming Hsu and Yu-Chen Chen and
                 Le-Jung Hsieh and Jyun-Cheng Bai and Yu-Sheng Kao and
                 Tsung-Han Lou and Ashwin Sanjay Lele and Jui-Jen Wu and
                 Jen-Chun Tien and Chung-Chuan Lo and Ren-Shuo Liu and
                 Chih-Cheng Hsieh and Kea-Tiong Tang and Meng-Fan
                 Chang",
  booktitle =    "{2025 IEEE International Solid-State Circuits
                 Conference (ISSCC)}",
  title =        "14.2 A 16nm 216kb, {188.4TOPS/W} and {133.5TFLOPS/W}
                 Microscaling Multi-Mode Gain-Cell {CIM} Macro {Edge-AI}
                 Devices",
  volume =       "68",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--3",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ISSCC49661.2025.10904606",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Adders; Common Information Model
                 (computing); Costs; Data transfer; Energy consumption;
                 Hardware; Memory management; Micromechanical devices;
                 Transistors",
}


bibtype: inproceedings
filename: fparith.bib
label: Kim:2025:MFM
booktitle: 2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--3
year: 2025
DOI: https://doi.org/10.23919/VLSITechnologyandCir65189.2025.11075163
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawbooktitle: {2025 Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)}
author:
Seah Kim and Jerry Zhao and Roger Hsiao and Yufeng Chi and Vighnesh Iyer and Vikram Jain and Borivoje Nikolic and Yakun Sophia Shao

title:
MAVERIC: a 16nm 72 FPS, 10 mJ / Frame Heterogeneous Robotics SoC with 4 Cores and 13 INT8 / FP32 Accelerators

keywords:
Depth measurement; Energy efficiency; Gold; Maximum likelihood estimation; Processor scheduling; Robots; Simultaneous localization and mapping; Three-dimensional displays; Very large scale integration

rawauthor:
Seah Kim and Jerry Zhao and Roger Hsiao and Yufeng Chi and Vighnesh Iyer and Vikram Jain and Borivoje Nikoli{\'c} and Yakun Sophia Shao

rawtitle:
{MAVERIC}: a 16nm 72 {FPS}, {10 mJ\slash Frame} Heterogeneous Robotics {SoC} with 4 Cores and 13 {INT8\slash FP32} Accelerators

entry:
@InProceedings{Kim:2025:MFM,
  author =       "Seah Kim and Jerry Zhao and Roger Hsiao and Yufeng Chi
                 and Vighnesh Iyer and Vikram Jain and Borivoje
                 Nikoli{\'c} and Yakun Sophia Shao",
  booktitle =    "{2025 Symposium on VLSI Technology and Circuits (VLSI
                 Technology and Circuits)}",
  title =        "{MAVERIC}: a 16nm 72 {FPS}, {10 mJ\slash Frame}
                 Heterogeneous Robotics {SoC} with 4 Cores and 13
                 {INT8\slash FP32} Accelerators",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--3",
  year =         "2025",
  DOI =          "https://doi.org/10.23919/VLSITechnologyandCir65189.2025.11075163",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Depth measurement; Energy efficiency; Gold; Maximum
                 likelihood estimation; Processor scheduling; Robots;
                 Simultaneous localization and mapping;
                 Three-dimensional displays; Very large scale
                 integration",
}


bibtype: article
filename: fparith.bib
label: Kim:2025:SRF
journal: j-IEEE-TRANS-COMPUT
volume: 74
number: 2
pages: 740--748
month: feb
monthnumber: 2
year: 2025
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2024.3500380
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Fri Mar 14 07:34:19 2025
bibtimestamp: 2025.03.14 07:34:19 ???
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
author:
Kevin Kim and Katherine Parry and David Harris and Cedar Turek and Alessandro Maiuolo and Rose Thompson and James Stine

title:
Shared Recurrence Floating-Point Divide / Sqrt and Integer Divide / Remainder With Early Termination

keywords:
Adders; Approximation algorithms; Art; Computer architecture; Computers; Division; early termination; Hardware; Logic; Optical wavelength conversion; Reduced instruction set computing; remainder; RISC-V64 floating-point unit; square root; SRT; subnormal arithmetic; Three-dimensional displays

rawauthor:
Kevin Kim and Katherine Parry and David Harris and Cedar Turek and Alessandro Maiuolo and Rose Thompson and James Stine

rawtitle:
Shared Recurrence Floating-Point Divide\slash Sqrt and Integer Divide\slash Remainder With Early Termination

entry:
@Article{Kim:2025:SRF,
  author =       "Kevin Kim and Katherine Parry and David Harris and
                 Cedar Turek and Alessandro Maiuolo and Rose Thompson
                 and James Stine",
  title =        "Shared Recurrence Floating-Point Divide\slash Sqrt and
                 Integer Divide\slash Remainder With Early Termination",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "74",
  number =       "2",
  pages =        "740--748",
  month =        feb,
  year =         "2025",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2024.3500380",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Fri Mar 14 07:34:19 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2020.bib;
                 https://www.math.utah.edu/pub/tex/bib/risc-v.bib",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "Adders; Approximation algorithms; Art; Computer
                 architecture; Computers; Division; early termination;
                 Hardware; Logic; Optical wavelength conversion; Reduced
                 instruction set computing; remainder; RISC-V64
                 floating-point unit; square root; SRT; subnormal
                 arithmetic; Three-dimensional displays",
}


bibtype: inproceedings
filename: fparith.bib
label: Koizumi:2025:TOA
author: Toru Koizumi and Ryota Shioya and Takuya Yamauchi and Tomoya Adachi and Ken Namura and Jun Makino
title: Trailing-Ones Anticipation for Reducing the Latency of the Rounding Incrementer in FP FMA Units
crossref: IEEE:2025:PIS
pages: 21--28
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00014
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Toru Koizumi and Ryota Shioya and Takuya Yamauchi and Tomoya Adachi and Ken Namura and Jun Makino
rawtitle: Trailing-Ones Anticipation for Reducing the Latency of the Rounding Incrementer in {FP} {FMA} Units
entry:
@InProceedings{Koizumi:2025:TOA,
  author =       "Toru Koizumi and Ryota Shioya and Takuya Yamauchi and
                 Tomoya Adachi and Ken Namura and Jun Makino",
  title =        "Trailing-Ones Anticipation for Reducing the Latency of
                 the Rounding Incrementer in {FP} {FMA} Units",
  crossref =     "IEEE:2025:PIS",
  pages =        "21--28",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00014",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Kokane:2025:LLP
author: Omkar Kokane and Mukul Lokhande and Gopal Raut and Adam Teman and Santosh Kumar Vishvakarma
booktitle: 2025 IEEE International Symposium on Circuits and Systems (ISCAS)
title: LPRE: Logarithmic Posit-enabled Reconfigurable edge-AI Engine
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--5
year: 2025
DOI: https://doi.org/10.1109/ISCAS56072.2025.11043622
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Omkar Kokane and Mukul Lokhande and Gopal Raut and Adam Teman and Santosh Kumar Vishvakarma
rawbooktitle: {2025 IEEE International Symposium on Circuits and Systems (ISCAS)}
rawtitle: {LPRE}: Logarithmic Posit-enabled Reconfigurable {edge-AI} Engine
keywords:
Accuracy; Bandwidth; Edge-AI accelerators; Engines; Fixed-point arithmetic; Hardware; Index Terms Posit MAC; Indexes; License plate recognition; Multi-layer perceptrons; Quantization; Quantization (signal); Real-time systems; Reconfigurable computing; Throughput

entry:
@InProceedings{Kokane:2025:LLP,
  author =       "Omkar Kokane and Mukul Lokhande and Gopal Raut and
                 Adam Teman and Santosh Kumar Vishvakarma",
  booktitle =    "{2025 IEEE International Symposium on Circuits and
                 Systems (ISCAS)}",
  title =        "{LPRE}: Logarithmic Posit-enabled Reconfigurable
                 {edge-AI} Engine",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--5",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ISCAS56072.2025.11043622",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Bandwidth; Edge-AI accelerators; Engines;
                 Fixed-point arithmetic; Hardware; Index Terms Posit
                 MAC; Indexes; License plate recognition; Multi-layer
                 perceptrons; Quantization; Quantization (signal);
                 Real-time systems; Reconfigurable computing;
                 Throughput",
}


bibtype: article
filename: fparith.bib
label: Kokosinski:2025:FAA
author: Zbigniew Kokosinski and Pawel Gepner and Nataliia Gavkalova
title: Fast and accurate approximation algorithms for computing floating point square root
journal: j-NUMER-ALGORITHMS
volume: 99
number: 4
pages: 1791--1804
month: aug
monthnumber: 8
year: 2025
CODEN: NUALEG
DOI: https://doi.org/10.1007/s11075-024-01932-7
ISSN: 1017-1398 (print), 1572-9265 (electronic) OR 10171398 (print), 15729265 (electronic)
ISSNL: 1017-1398 OR 10171398
bibdate: Wed Jul 16 11:11:45 MDT 2025
bibtimestamp: 2025.07.16 11:11:45 MDT
URL: https://link.springer.com/article/10.1007/s11075-024-01932-7
fjournal: Numerical Algorithms
acknowledgement: ack-nhfb
ajournal: Numer. Algorithms
journalURL: http://link.springer.com/journal/11075
rawauthor: Zbigniew Kokosi{\'n}ski and Pawe{\l} Gepner and Nataliia Gavkalova
rawtitle: Fast and accurate approximation algorithms for computing floating point square root
bibsource:
https://www.math.utah.edu/pub/tex/bib/elefunt.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/numeralgorithms.bib

entry:
@Article{Kokosinski:2025:FAA,
  author =       "Zbigniew Kokosi{\'n}ski and Pawe{\l} Gepner and
                 Nataliia Gavkalova",
  title =        "Fast and accurate approximation algorithms for
                 computing floating point square root",
  journal =      j-NUMER-ALGORITHMS,
  volume =       "99",
  number =       "4",
  pages =        "1791--1804",
  month =        aug,
  year =         "2025",
  CODEN =        "NUALEG",
  DOI =          "https://doi.org/10.1007/s11075-024-01932-7",
  ISSN =         "1017-1398 (print), 1572-9265 (electronic)",
  ISSN-L =       "1017-1398",
  bibdate =      "Wed Jul 16 11:11:45 MDT 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/elefunt.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/numeralgorithms.bib",
  URL =          "https://link.springer.com/article/10.1007/s11075-024-01932-7",
  acknowledgement = ack-nhfb,
  ajournal =     "Numer. Algorithms",
  fjournal =     "Numerical Algorithms",
  journal-URL =  "http://link.springer.com/journal/11075",
}


bibtype: article
filename: fparith.bib
label: Kriemann:2025:HLR
author: Ronald Kriemann
title: Hierarchical Low-Rank Arithmetic with Floating Point Compression
journal: j-SIAM-J-SCI-COMP
volume: 47
number: 4
pages: B763--B784
year: 2025
CODEN: SJOCE3
DOI: https://doi.org/10.1137/24M1649009
ISSN: 1064-8275 (print), 1095-7197 (electronic) OR 10648275 (print), 10957197 (electronic)
ISSNL: 1064-8275 OR 10648275
bibdate: Sat Oct 18 11:20:11 MDT 2025
bibtimestamp: 2025.10.18 11:20:11 MDT
URL: https://epubs.siam.org/doi/10.1137/24M1649009
fjournal: SIAM Journal on Scientific Computing
keywords: data compression; hierarchical matrices; low-rank arithmetic; mixed precision; posit arithmetic
acknowledgement: ack-nhfb
journalURL: http://epubs.siam.org/sisc
rawauthor: Ronald Kriemann
rawtitle: Hierarchical Low-Rank Arithmetic with Floating Point Compression
bibsource:
http://epubs.siam.org/toc/sjoce3/47/4; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/siamjscicomput.bib

entry:
@Article{Kriemann:2025:HLR,
  author =       "Ronald Kriemann",
  title =        "Hierarchical Low-Rank Arithmetic with Floating Point
                 Compression",
  journal =      j-SIAM-J-SCI-COMP,
  volume =       "47",
  number =       "4",
  pages =        "B763--B784",
  month =        "????",
  year =         "2025",
  CODEN =        "SJOCE3",
  DOI =          "https://doi.org/10.1137/24M1649009",
  ISSN =         "1064-8275 (print), 1095-7197 (electronic)",
  ISSN-L =       "1064-8275",
  bibdate =      "Sat Oct 18 11:20:11 MDT 2025",
  bibsource =    "http://epubs.siam.org/toc/sjoce3/47/4;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/siamjscicomput.bib",
  URL =          "https://epubs.siam.org/doi/10.1137/24M1649009",
  acknowledgement = ack-nhfb,
  fjournal =     "SIAM Journal on Scientific Computing",
  journal-URL =  "http://epubs.siam.org/sisc",
  keywords =     "data compression; hierarchical matrices; low-rank
                 arithmetic; mixed precision; posit arithmetic",
}


bibtype: inproceedings
filename: fparith.bib
label: Kulkarni:2025:MCN
author: Bhargav Kulkarni and Pavel Panchekha
title: Mixing Condition Numbers and Oracles for Accurate Floating-point Debugging
crossref: IEEE:2025:PIS
pages: 101--108
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00025
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Bhargav Kulkarni and Pavel Panchekha
rawtitle: Mixing Condition Numbers and Oracles for Accurate Floating-point Debugging
entry:
@InProceedings{Kulkarni:2025:MCN,
  author =       "Bhargav Kulkarni and Pavel Panchekha",
  title =        "Mixing Condition Numbers and Oracles for Accurate
                 Floating-point Debugging",
  crossref =     "IEEE:2025:PIS",
  pages =        "101--108",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00025",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Larsson-Edefors:2025:IEF
author: Per Larsson-Edefors and Erik Borjeson
title: Implementation Evaluation of Fixed-Point Multipliers for Complex Numbers
crossref: IEEE:2025:PIS
pages: 81--84
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00022
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Per Larsson-Edefors and Erik B{\"o}rjeson
rawtitle: Implementation Evaluation of Fixed-Point Multipliers for Complex Numbers
entry:
@InProceedings{Larsson-Edefors:2025:IEF,
  author =       "Per Larsson-Edefors and Erik B{\"o}rjeson",
  title =        "Implementation Evaluation of Fixed-Point Multipliers
                 for Complex Numbers",
  crossref =     "IEEE:2025:PIS",
  pages =        "81--84",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00022",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: article
filename: fparith.bib
label: Leng:2025:HPH
author: Yuhan Leng and Gaoyuan Zou and Hansheng Wang and Panruo Wu and Shaoshuai Zhang
title: High Performance Householder QR Factorization on Emerging GPU Architectures Using Tensor Cores
journal: j-IEEE-TRANS-PAR-DIST-SYS
volume: 36
number: 3
pages: 422--436
year: 2025
CODEN: ITDSEO
DOI: https://doi.org/10.1109/TPDS.2024.3522776
ISSN: 1045-9219 (print), 1558-2183 (electronic) OR 10459219 (print), 15582183 (electronic)
ISSNL: 1045-9219 OR 10459219
bibdate: Wed Oct 1 06:40:18 2025
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Transactions on Parallel and Distributed Systems
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=71
rawauthor: Yuhan Leng and Gaoyuan Zou and Hansheng Wang and Panruo Wu and Shaoshuai Zhang
bibsource:
https://www.math.utah.edu/pub/bibnet/authors/h/householder-alston-s.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib

keywords:
Accuracy; Computer architecture; GPGPU; Graphics processing units; HPC; Matrix decomposition; mixed-precision algorithms; Numerical analysis; numerical linear algebra; Parallel processing; Reflection; Sparse matrices; tensor cores; Tensors; Vectors

rawtitle:
High Performance {Householder} {QR} Factorization on Emerging {GPU} Architectures Using {Tensor Cores}

entry:
@Article{Leng:2025:HPH,
  author =       "Yuhan Leng and Gaoyuan Zou and Hansheng Wang and
                 Panruo Wu and Shaoshuai Zhang",
  title =        "High Performance {Householder} {QR} Factorization on
                 Emerging {GPU} Architectures Using {Tensor Cores}",
  journal =      j-IEEE-TRANS-PAR-DIST-SYS,
  volume =       "36",
  number =       "3",
  pages =        "422--436",
  year =         "2025",
  CODEN =        "ITDSEO",
  DOI =          "https://doi.org/10.1109/TPDS.2024.3522776",
  ISSN =         "1045-9219 (print), 1558-2183 (electronic)",
  ISSN-L =       "1045-9219",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/h/householder-alston-s.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Parallel and Distributed
                 Systems",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=71",
  keywords =     "Accuracy; Computer architecture; GPGPU; Graphics
                 processing units; HPC; Matrix decomposition;
                 mixed-precision algorithms; Numerical analysis;
                 numerical linear algebra; Parallel processing;
                 Reflection; Sparse matrices; tensor cores; Tensors;
                 Vectors",
}


bibtype: article
filename: fparith.bib
label: Liu:2025:ADR
journal: j-TOSEM
volume: 34
number: 7
pages: 203:1--203:32
month: sep
monthnumber: 9
year: 2025
CODEN: ATSMER
DOI: https://doi.org/10.1145/3715104
ISSN: 1049-331X (print), 1557-7392 (electronic) OR 1049331X (print), 15577392 (electronic)
ISSNL: 1049-331X OR 1049331X
bibdate: Tue Sep 30 09:27:41 MDT 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/tosem.bib
bibtimestamp: 2025.09.30 09:27:41 MDT
fjournal: ACM Transactions on Software Engineering and Methodology
acknowledgement: ack-nhfb
ajournal: ACM Trans. Softw. Eng. Methodol.
articleno: 203
journalURL: https://dl.acm.org/loi/tosem
author:
Jiawei Liu and Xufan Zhang and Lurong Xu and Chunrong Fang and Mingzheng Gu and Weisi Luo and Dong Chai and Jiang Wang and Zhihong Zhao and Zhenyu Chen

title:
Automated Detection and Repair of Floating-point Precision Problems in Convolutional Neural Network Operators

abstract:
Convolutional Neural Network (CNN) operators, mostly based on mathematical linear computations, are of vital importance to developing CNN-based software. Existing studies reveal that these operators are prone to floating-point precision problems (FPPs). In a CNN-based application, such problems can be propagated and result in catastrophic consequences. Thus, it is highly desired to detect and repair the FPPs in CNN operators. Considering the FPPs in CNN operators are mainly caused by accumulated floating-point errors and diverse floating-point tensors instead of wrong codes or bad implementations, it requires much time cost and is difficult to tackle these FPPs.par In this article, we propose the first method for the automated detection and repair of FPPs in CNN operators from the perspective of floating-point tensors. To generate diverse tensors with floating-point numbers, we design two levels of mutation rules, namely computation-level mutation and input-level mutation, containing a total of five mutation methods. To detect the FPPs caused by the accumulated floating-point errors, our method uses a weight matrix to guide the progressive mutation. To repair the detected FPPs, our method transforms the error-prone floating-point tensors based on the mathematical rewriting of the floating-point linear computational properties without destroying the original computation. Experimental results show that our methods can detect and repair FPPs in CNN operators effectively and efficiently and could reduce 93.32% to 100% of the FPPs in CNN operators. We conduct a case study on six different widely used CNN models and confirm that the proposed FPP method is generalizable and effective across a variety of tasks and architectures. Our detection and repair method offers an intuitive way to handle FPPs during development, allowing users to continue building and fine-tuning their models without being slowed down by numerical precision errors. We believe that our method could open up a new way to enhance the quality of CNN operators and CNN-based software.

rawabstract:
Convolutional Neural Network (CNN) operators, mostly based on mathematical linear computations, are of vital importance to developing CNN-based software. Existing studies reveal that these operators are prone to floating-point precision problems (FPPs). In a CNN-based application, such problems can be propagated and result in catastrophic consequences. Thus, it is highly desired to detect and repair the FPPs in CNN operators. Considering the FPPs in CNN operators are mainly caused by accumulated floating-point errors and diverse floating-point tensors instead of wrong codes or bad implementations, it requires much time cost and is difficult to tackle these FPPs.\par In this article, we propose the first method for the automated detection and repair of FPPs in CNN operators from the perspective of floating-point tensors. To generate diverse tensors with floating-point numbers, we design two levels of mutation rules, namely computation-level mutation and input-level mutation, containing a total of five mutation methods. To detect the FPPs caused by the accumulated floating-point errors, our method uses a weight matrix to guide the progressive mutation. To repair the detected FPPs, our method transforms the error-prone floating-point tensors based on the mathematical rewriting of the floating-point linear computational properties without destroying the original computation. Experimental results show that our methods can detect and repair FPPs in CNN operators effectively and efficiently and could reduce 93.32\% to 100\% of the FPPs in CNN operators. We conduct a case study on six different widely used CNN models and confirm that the proposed FPP method is generalizable and effective across a variety of tasks and architectures. Our detection and repair method offers an intuitive way to handle FPPs during development, allowing users to continue building and fine-tuning their models without being slowed down by numerical precision errors. We believe that our method could open up a new way to enhance the quality of CNN operators and CNN-based software.

rawauthor:
Jiawei Liu and Xufan Zhang and Lurong Xu and Chunrong Fang and Mingzheng Gu and Weisi Luo and Dong Chai and Jiang Wang and Zhihong Zhao and Zhenyu Chen

rawtitle:
Automated Detection and Repair of Floating-point Precision Problems in Convolutional Neural Network Operators

entry:
@Article{Liu:2025:ADR,
  author =       "Jiawei Liu and Xufan Zhang and Lurong Xu and Chunrong
                 Fang and Mingzheng Gu and Weisi Luo and Dong Chai and
                 Jiang Wang and Zhihong Zhao and Zhenyu Chen",
  title =        "Automated Detection and Repair of Floating-point
                 Precision Problems in Convolutional Neural Network
                 Operators",
  journal =      j-TOSEM,
  volume =       "34",
  number =       "7",
  pages =        "203:1--203:32",
  month =        sep,
  year =         "2025",
  CODEN =        "ATSMER",
  DOI =          "https://doi.org/10.1145/3715104",
  ISSN =         "1049-331X (print), 1557-7392 (electronic)",
  ISSN-L =       "1049-331X",
  bibdate =      "Tue Sep 30 09:27:41 MDT 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/tosem.bib",
  abstract =     "Convolutional Neural Network (CNN) operators, mostly
                 based on mathematical linear computations, are of vital
                 importance to developing CNN-based software. Existing
                 studies reveal that these operators are prone to
                 floating-point precision problems (FPPs). In a
                 CNN-based application, such problems can be propagated
                 and result in catastrophic consequences. Thus, it is
                 highly desired to detect and repair the FPPs in CNN
                 operators. Considering the FPPs in CNN operators are
                 mainly caused by accumulated floating-point errors and
                 diverse floating-point tensors instead of wrong codes
                 or bad implementations, it requires much time cost and
                 is difficult to tackle these FPPs.\par

                 In this article, we propose the first method for the
                 automated detection and repair of FPPs in CNN operators
                 from the perspective of floating-point tensors. To
                 generate diverse tensors with floating-point numbers,
                 we design two levels of mutation rules, namely
                 computation-level mutation and input-level mutation,
                 containing a total of five mutation methods. To detect
                 the FPPs caused by the accumulated floating-point
                 errors, our method uses a weight matrix to guide the
                 progressive mutation. To repair the detected FPPs, our
                 method transforms the error-prone floating-point
                 tensors based on the mathematical rewriting of the
                 floating-point linear computational properties without
                 destroying the original computation. Experimental
                 results show that our methods can detect and repair
                 FPPs in CNN operators effectively and efficiently and
                 could reduce 93.32\% to 100\% of the FPPs in CNN
                 operators. We conduct a case study on six different
                 widely used CNN models and confirm that the proposed
                 FPP method is generalizable and effective across a
                 variety of tasks and architectures. Our detection and
                 repair method offers an intuitive way to handle FPPs
                 during development, allowing users to continue building
                 and fine-tuning their models without being slowed down
                 by numerical precision errors. We believe that our
                 method could open up a new way to enhance the quality
                 of CNN operators and CNN-based software.",
  acknowledgement = ack-nhfb,
  ajournal =     "ACM Trans. Softw. Eng. Methodol.",
  articleno =    "203",
  fjournal =     "ACM Transactions on Software Engineering and
                 Methodology",
  journal-URL =  "https://dl.acm.org/loi/tosem",
}


bibtype: article
filename: fparith.bib
label: Liu:2025:DMP
title: A 3-D Multi-Precision Scalable Systolic FMA Architecture
journal: j-IEEE-TRANS-CIRCUITS-SYST-1
volume: 72
number: 1
pages: 265--276
year: 2025
DOI: https://doi.org/10.1109/TCSI.2024.3497724
ISSN: 1549-8328 (print), 1558-0806 (electronic) OR 15498328 (print), 15580806 (electronic)
ISSNL: 1549-8328 OR 15498328
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Transactions on Circuits and Systems I: Regular Papers
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=8919
rawtitle: A {3-D} Multi-Precision Scalable Systolic {FMA} Architecture
author:
Haotian Liu and Xicheng Lu and Xiaoyu Yu and Kai Li and Kaiyuan Yang and Haihang Xia and Sizhao Li and Tiantai Deng

keywords:
Accuracy; Arithmetic circuits and systems; Arrays; Computer architecture; digital ASICs; digital circuit design; Energy efficiency; Field programmable gate arrays; FPGAs; Hardware; Parallel processing; Systolic arrays; Three-dimensional displays; Vectors

rawauthor:
Haotian Liu and Xicheng Lu and Xiaoyu Yu and Kai Li and Kaiyuan Yang and Haihang Xia and Sizhao Li and Tiantai Deng

entry:
@Article{Liu:2025:DMP,
  author =       "Haotian Liu and Xicheng Lu and Xiaoyu Yu and Kai Li
                 and Kaiyuan Yang and Haihang Xia and Sizhao Li and
                 Tiantai Deng",
  title =        "A {3-D} Multi-Precision Scalable Systolic {FMA}
                 Architecture",
  journal =      j-IEEE-TRANS-CIRCUITS-SYST-1,
  volume =       "72",
  number =       "1",
  pages =        "265--276",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/TCSI.2024.3497724",
  ISSN =         "1549-8328 (print), 1558-0806 (electronic)",
  ISSN-L =       "1549-8328",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Circuits and Systems I: Regular
                 Papers",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=8919",
  keywords =     "Accuracy; Arithmetic circuits and systems; Arrays;
                 Computer architecture; digital ASICs; digital circuit
                 design; Energy efficiency; Field programmable gate
                 arrays; FPGAs; Hardware; Parallel processing; Systolic
                 arrays; Three-dimensional displays; Vectors",
}


bibtype: article
filename: fparith.bib
label: Liu:2025:LPM
title: Low-Power Multiplier Designs by Leveraging Correlations of $ 2 times 2 $ Encoded Partial Products
journal: j-IEEE-TRANS-COMPUT
volume: 74
number: 11
pages: 3888--3896
month: nov
monthnumber: 11
year: 2025
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2025.3604478
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Oct 15 16:45:16 2025
bibtimestamp: 2025.10.15 16:45:16 ???
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawtitle: Low-Power Multiplier Designs by Leveraging Correlations of $ 2 \times 2 $ Encoded Partial Products
author:
Ao Liu and Siting Liu and Hui Wang and Qin Wang and Fabrizio Lombardi and Zhigang Mao and Honglan Jiang

keywords:
Adders; Artificial neural networks; Computer architecture; Correlation; Delays; Encoding; full adder; Hardware; Low-power; multiple-precision; partial product; Quantization (signal); recursive multiplier; Training; Vectors

rawauthor:
Ao Liu and Siting Liu and Hui Wang and Qin Wang and Fabrizio Lombardi and Zhigang Mao and Honglan Jiang

entry:
@Article{Liu:2025:LPM,
  author =       "Ao Liu and Siting Liu and Hui Wang and Qin Wang and
                 Fabrizio Lombardi and Zhigang Mao and Honglan Jiang",
  title =        "Low-Power Multiplier Designs by Leveraging
                 Correlations of $ 2 \times 2 $ Encoded Partial
                 Products",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "74",
  number =       "11",
  pages =        "3888--3896",
  month =        nov,
  year =         "2025",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2025.3604478",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Oct 15 16:45:16 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2020.bib",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "Adders; Artificial neural networks; Computer
                 architecture; Correlation; Delays; Encoding; full
                 adder; Hardware; Low-power; multiple-precision; partial
                 product; Quantization (signal); recursive multiplier;
                 Training; Vectors",
}


bibtype: article
filename: fparith.bib
label: Lyu:2025:EMB
author: Fei Lyu and Yuanyong Luo and Weiqiang Liu
journal: j-IEEE-TRANS-COMPUT
volume: 74
number: 5
pages: 1800--1813
year: 2025
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2025.3543676
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Aug 13 17:23:44 2025
bibtimestamp: 2025.08.13 17:23:44 ???
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Fei Lyu and Yuanyong Luo and Weiqiang Liu
title:
An Efficient Methodology for Binary Logarithmic Computations of Floating-Point Numbers With Normalized Output Within One ulp of Accuracy

keywords:
Accuracy; Binary logarithmic operation; Computational efficiency; Computer architecture; Computers; floating-point number; Graphics processing units; Hardware; hardware implementation; Libraries; Linear programming; Mathematical models; polynomial approximation method; Polynomials

rawtitle:
An Efficient Methodology for Binary Logarithmic Computations of Floating-Point Numbers With Normalized Output Within One ulp of Accuracy

entry:
@Article{Lyu:2025:EMB,
  author =       "Fei Lyu and Yuanyong Luo and Weiqiang Liu",
  title =        "An Efficient Methodology for Binary Logarithmic
                 Computations of Floating-Point Numbers With Normalized
                 Output Within One ulp of Accuracy",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "74",
  number =       "5",
  pages =        "1800--1813",
  year =         "2025",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2025.3543676",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Aug 13 17:23:44 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2020.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "Accuracy; Binary logarithmic operation; Computational
                 efficiency; Computer architecture; Computers;
                 floating-point number; Graphics processing units;
                 Hardware; hardware implementation; Libraries; Linear
                 programming; Mathematical models; polynomial
                 approximation method; Polynomials",
}


bibtype: article
filename: fparith.bib
label: Ma:2025:STF
author: Dongyu Ma and Zeyu Liang and Luming Yin and Hongliang Liang
title: Symbolic testing of floating-point bugs and exceptions
journal: j-J-SYST-SOFTW
volume: 219
pages: ??--??
month: jan
monthnumber: 1
year: 2025
CODEN: JSSODM
DOI: https://doi.org/10.1016/j.jss.2024.112226; https://doi.org/10.2139/ssrn.4797965
ISSN: 0164-1212 (print), 1873-1228 (electronic) OR 01641212 (print), 18731228 (electronic)
ISSNL: 0164-1212 OR 01641212
bibdate: Thu Nov 7 07:42:59 MST 2024
bibtimestamp: 2024.11.07 07:42:59 MST
fjournal: Journal of Systems and Software
acknowledgement: ack-nhfb
articleno: 112226
journalURL: http://www.sciencedirect.com/science/journal/01641212
rawauthor: Dongyu Ma and Zeyu Liang and Luming Yin and Hongliang Liang
rawtitle: Symbolic testing of floating-point bugs and exceptions
bibsource:
https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/jsystsoftw2020.bib

URL:
http://www.sciencedirect.com/science/article/pii/S016412122400270X; https://papers.ssrn.com/sol3/papers.cfm?abstract_id=4797965

keywords:
CVE (Common Vulnerabilities and Exposures) bug reports; floating-point arithmetic; GNU Scientific Library (GSL); interval arithmetic; LLVM/CLang compiler system; MuPDF (viewing and converting PDF (Portable Document Format) files); SoX (audio editing); symbolic execution

entry:
@Article{Ma:2025:STF,
  author =       "Dongyu Ma and Zeyu Liang and Luming Yin and Hongliang
                 Liang",
  title =        "Symbolic testing of floating-point bugs and
                 exceptions",
  journal =      j-J-SYST-SOFTW,
  volume =       "219",
  number =       "??",
  pages =        "??--??",
  month =        jan,
  year =         "2025",
  CODEN =        "JSSODM",
  DOI =          "https://doi.org/10.1016/j.jss.2024.112226;
                 https://doi.org/10.2139/ssrn.4797965",
  ISSN =         "0164-1212 (print), 1873-1228 (electronic)",
  ISSN-L =       "0164-1212",
  bibdate =      "Thu Nov 7 07:42:59 MST 2024",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/jsystsoftw2020.bib",
  URL =          "http://www.sciencedirect.com/science/article/pii/S016412122400270X;
                 https://papers.ssrn.com/sol3/papers.cfm?abstract_id=4797965",
  acknowledgement = ack-nhfb,
  articleno =    "112226",
  fjournal =     "Journal of Systems and Software",
  journal-URL =  "http://www.sciencedirect.com/science/journal/01641212",
  keywords =     "CVE (Common Vulnerabilities and Exposures) bug
                 reports; floating-point arithmetic; GNU Scientific
                 Library (GSL); interval arithmetic; LLVM/CLang compiler
                 system; MuPDF (viewing and converting PDF (Portable
                 Document Format) files); SoX (audio editing); symbolic
                 execution",
}


bibtype: article
filename: fparith.bib
label: Mary:2025:EAM
author: Theo Mary and Mantas Mikaitis
title: Error Analysis of Matrix Multiplication with Narrow Range Floating-Point Arithmetic
journal: j-SIAM-J-SCI-COMP
volume: 47
number: 4
pages: B785--B800
year: 2025
CODEN: SJOCE3
DOI: https://doi.org/10.1137/24M1685109
ISSN: 1064-8275 (print), 1095-7197 (electronic) OR 10648275 (print), 10957197 (electronic)
ISSNL: 1064-8275 OR 10648275
bibdate: Sat Oct 18 11:20:11 MDT 2025
bibtimestamp: 2025.10.18 11:20:11 MDT
URL: https://epubs.siam.org/doi/10.1137/24M1685109
fjournal: SIAM Journal on Scientific Computing
acknowledgement: ack-nhfb
journalURL: http://epubs.siam.org/sisc
rawauthor: Theo Mary and Mantas Mikaitis
rawtitle: Error Analysis of Matrix Multiplication with Narrow Range Floating-Point Arithmetic
bibsource:
http://epubs.siam.org/toc/sjoce3/47/4; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/siamjscicomput.bib

entry:
@Article{Mary:2025:EAM,
  author =       "Theo Mary and Mantas Mikaitis",
  title =        "Error Analysis of Matrix Multiplication with Narrow
                 Range Floating-Point Arithmetic",
  journal =      j-SIAM-J-SCI-COMP,
  volume =       "47",
  number =       "4",
  pages =        "B785--B800",
  month =        "????",
  year =         "2025",
  CODEN =        "SJOCE3",
  DOI =          "https://doi.org/10.1137/24M1685109",
  ISSN =         "1064-8275 (print), 1095-7197 (electronic)",
  ISSN-L =       "1064-8275",
  bibdate =      "Sat Oct 18 11:20:11 MDT 2025",
  bibsource =    "http://epubs.siam.org/toc/sjoce3/47/4;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/siamjscicomput.bib",
  URL =          "https://epubs.siam.org/doi/10.1137/24M1685109",
  acknowledgement = ack-nhfb,
  fjournal =     "SIAM Journal on Scientific Computing",
  journal-URL =  "http://epubs.siam.org/sisc",
}


bibtype: article
filename: fparith.bib
label: Mirzaei-Teshnizi:2025:PMM
author: Shahab Mirzaei-Teshnizi and Parviz Keshavarzi
title: Parallel Modular Multiplication Using Variable Length Algorithms
journal: j-IEEE-TRANS-COMPUT
volume: 74
number: 1
pages: 143--154
month: jan
monthnumber: 1
year: 2025
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2024.3475574
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Fri Mar 14 07:34:19 2025
bibtimestamp: 2025.03.14 07:34:19 ???
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Shahab Mirzaei-Teshnizi and Parviz Keshavarzi
rawtitle: Parallel Modular Multiplication Using Variable Length Algorithms
keywords:
Adders; Canonic signed digit (CSD); Clocks; Computers; Costs; Elliptic curve cryptography; Field programmable gate arrays; FPGA; Hardware; high-speed arithmetic; Interleaved modular multiplication; Montgomery multiplication; Partitioning algorithms; Symbols; Throughput

entry:
@Article{Mirzaei-Teshnizi:2025:PMM,
  author =       "Shahab Mirzaei-Teshnizi and Parviz Keshavarzi",
  title =        "Parallel Modular Multiplication Using Variable Length
                 Algorithms",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "74",
  number =       "1",
  pages =        "143--154",
  month =        jan,
  year =         "2025",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2024.3475574",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Fri Mar 14 07:34:19 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2020.bib",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "Adders; Canonic signed digit (CSD); Clocks; Computers;
                 Costs; Elliptic curve cryptography; Field programmable
                 gate arrays; FPGA; Hardware; high-speed arithmetic;
                 Interleaved modular multiplication; Montgomery
                 multiplication; Partitioning algorithms; Symbols;
                 Throughput",
}


bibtype: inproceedings
filename: fparith.bib
label: Moustafa:2025:EMP
author: Samir Moustafa and Nils Kriege and Wilfried N. Gansterer
booktitle: 2025 IEEE 41st International Conference on Data Engineering (ICDE)
title: Efficient Mixed Precision Quantization in Graph Neural Networks
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 4038--4052
year: 2025
DOI: https://doi.org/10.1109/ICDE65448.2025.00301
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Samir Moustafa and Nils Kriege and Wilfried N. Gansterer
rawbooktitle: {2025 IEEE 41st International Conference on Data Engineering (ICDE)}
rawtitle: Efficient Mixed Precision Quantization in Graph Neural Networks
keywords:
Accuracy; Computational efficiency; Computer architecture; Data engineering; Deep architecture; Graph neural networks; Message passing; Navigation; Quantization; Quantization (signal); Training

entry:
@InProceedings{Moustafa:2025:EMP,
  author =       "Samir Moustafa and Nils Kriege and Wilfried N.
                 Gansterer",
  booktitle =    "{2025 IEEE 41st International Conference on Data
                 Engineering (ICDE)}",
  title =        "Efficient Mixed Precision Quantization in Graph Neural
                 Networks",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "4038--4052",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ICDE65448.2025.00301",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Computational efficiency; Computer
                 architecture; Data engineering; Deep architecture;
                 Graph neural networks; Message passing; Navigation;
                 Quantization; Quantization (signal); Training",
}


bibtype: article
filename: fparith.bib
label: Nesam:2025:DRU
author: J. Jean Jenifer Nesam and S. Sankar Ganesh
journal: j-IEEE-ACCESS
volume: 13
pages: 63969--63980
year: 2025
DOI: https://doi.org/10.1109/ACCESS.2025.3559226
ISSN: 2169-3536 OR 21693536
ISSNL: 2169-3536 OR 21693536
bibdate: Tue Sep 30 17:30:28 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.09.30 17:30:28 ???
fjournal: IEEE Access
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639
rawauthor: J. Jean Jenifer Nesam and S. Sankar Ganesh
title:
Design of Radix-8 Unsigned Bit Pair Recoding Algorithm-Based Floating-Point Multiplier for Neural Network Computations

keywords:
Adders; Area efficient multiplier; Artificial intelligence; Artificial neural networks; bit pair recoding (BPR) algorithm; booth encoding algorithm; Complexity theory; Decoding; Delays; Encoding; error analysis; fast multiplication; Image coding; low power multiplier; multipliers for neural networks; partial product reduction; Resists; Standards

rawtitle:
Design of Radix-8 Unsigned Bit Pair Recoding Algorithm-Based Floating-Point Multiplier for Neural Network Computations

entry:
@Article{Nesam:2025:DRU,
  author =       "J. Jean Jenifer Nesam and S. Sankar Ganesh",
  title =        "Design of Radix-8 Unsigned Bit Pair Recoding
                 Algorithm-Based Floating-Point Multiplier for Neural
                 Network Computations",
  journal =      j-IEEE-ACCESS,
  volume =       "13",
  pages =        "63969--63980",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ACCESS.2025.3559226",
  ISSN =         "2169-3536",
  ISSN-L =       "2169-3536",
  bibdate =      "Tue Sep 30 17:30:28 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Access",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639",
  keywords =     "Adders; Area efficient multiplier; Artificial
                 intelligence; Artificial neural networks; bit pair
                 recoding (BPR) algorithm; booth encoding algorithm;
                 Complexity theory; Decoding; Delays; Encoding; error
                 analysis; fast multiplication; Image coding; low power
                 multiplier; multipliers for neural networks; partial
                 product reduction; Resists; Standards",
}


bibtype: inproceedings
filename: fparith.bib
label: Nguyen:2025:REA
author: Thanh Son Nguyen and Alexey Solovyev and Mark G. Arnold and Ganesh Gopalakrishnan
title: Rigorous Error Analysis for Logarithmic Number Systems
crossref: IEEE:2025:PIS
pages: 125--132
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00028
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Thanh Son Nguyen and Alexey Solovyev and Mark G. Arnold and Ganesh Gopalakrishnan
rawtitle: Rigorous Error Analysis for Logarithmic Number Systems
entry:
@InProceedings{Nguyen:2025:REA,
  author =       "Thanh Son Nguyen and Alexey Solovyev and Mark G.
                 Arnold and Ganesh Gopalakrishnan",
  title =        "Rigorous Error Analysis for Logarithmic Number
                 Systems",
  crossref =     "IEEE:2025:PIS",
  pages =        "125--132",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00028",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: book
filename: fparith.bib
label: Overton:2025:NCI
author: Michael L. Overton
publisher: pub-SIAM
address: pub-SIAM:adr
edition: Second
pages: xx + 126
year: 2025
DOI: https://doi.org/10.1137/1.9781611978414
ISBN: 1-61197-840-8 (print), 1-61197-841-6 (e-book) OR 1611978408 (print), 1611978416 (ebook)
LCCN: QA297
bibdate: Thu Jul 03 08:34:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.07.03 08:34:40 ???
URL: https://bookstore.siam.org/OT205; https://epubs.siam.org/doi/10.1137/1.9781611978414
acknowledgement: ack-nhfb
rawauthor: Michael L. Overton
title:
Numerical Computing with IEEE Floating Point Arithmetic: Including One Theorem, One Rule of Thumb, and One Hundred and Six Exercises

ISBN13:
978-1-61197-840-7 (print), 978-1-61197-841-4 (e-book) OR 9781611978407 (print), 9781611978414 (ebook)

TOC:
Preface / ix Acknowledgments / xi 1 Introduction / 1 2 The Real Numbers / 5 3 Computer Representation of Numbers / 9 4 IEEE Floating Point Representation / 17 5 Rounding / 27 6 Correctly Rounded Floating Point Operations / 35 7 Exceptions / 45 8 Floating Point Microprocessors / 53 9 Programming Languages / 57 10 Floating Point in C / 63 11 Cancellation / 75 12 Conditioning of Problems / 81 13 Stability of Algorithms / 87 14 Higher Precision Computations / 99 15 Lower Precision Computations / 103 16 Conclusion / 111 A Letter from Professor Donald E. Knuth / 113 Bibliography / 117 Index / 125

rawtitle:
Numerical Computing with {IEEE} Floating Point Arithmetic: Including One Theorem, One Rule of Thumb, and One Hundred and Six Exercises

rawTOC:
Preface / ix \\ Acknowledgments / xi \\ 1 Introduction / 1 \\ 2 The Real Numbers / 5 \\ 3 Computer Representation of Numbers / 9 \\ 4 IEEE Floating Point Representation / 17 \\ 5 Rounding / 27 \\ 6 Correctly Rounded Floating Point Operations / 35 \\ 7 Exceptions / 45 \\ 8 Floating Point Microprocessors / 53 \\ 9 Programming Languages / 57 \\ 10 Floating Point in C / 63 \\ 11 Cancellation / 75 \\ 12 Conditioning of Problems / 81 \\ 13 Stability of Algorithms / 87 \\ 14 Higher Precision Computations / 99 \\ 15 Lower Precision Computations / 103 \\ 16 Conclusion / 111 \\ A Letter from Professor Donald E. Knuth / 113 \\ Bibliography / 117 \\ Index / 125

entry:
@Book{Overton:2025:NCI,
  author =       "Michael L. Overton",
  title =        "Numerical Computing with {IEEE} Floating Point
                 Arithmetic: Including One Theorem, One Rule of Thumb,
                 and One Hundred and Six Exercises",
  publisher =    pub-SIAM,
  address =      pub-SIAM:adr,
  edition =      "Second",
  pages =        "xx + 126",
  year =         "2025",
  DOI =          "https://doi.org/10.1137/1.9781611978414",
  ISBN =         "1-61197-840-8 (print), 1-61197-841-6 (e-book)",
  ISBN-13 =      "978-1-61197-840-7 (print), 978-1-61197-841-4
                 (e-book)",
  LCCN =         "QA297",
  bibdate =      "Thu Jul 03 08:34:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://bookstore.siam.org/OT205;
                 https://epubs.siam.org/doi/10.1137/1.9781611978414",
  acknowledgement = ack-nhfb,
  tableofcontents = "Preface / ix \\
                 Acknowledgments / xi \\
                 1 Introduction / 1 \\
                 2 The Real Numbers / 5 \\
                 3 Computer Representation of Numbers / 9 \\
                 4 IEEE Floating Point Representation / 17 \\
                 5 Rounding / 27 \\
                 6 Correctly Rounded Floating Point Operations / 35 \\
                 7 Exceptions / 45 \\
                 8 Floating Point Microprocessors / 53 \\
                 9 Programming Languages / 57 \\
                 10 Floating Point in C / 63 \\
                 11 Cancellation / 75 \\
                 12 Conditioning of Problems / 81 \\
                 13 Stability of Algorithms / 87 \\
                 14 Higher Precision Computations / 99 \\
                 15 Lower Precision Computations / 103 \\
                 16 Conclusion / 111 \\
                 A Letter from Professor Donald E. Knuth / 113 \\
                 Bibliography / 117 \\
                 Index / 125",
}


bibtype: article
filename: fparith.bib
label: Ozaki:2025:ALP
author: Katsuhisa Ozaki
title: Accuracy of Low-Precision Elementary and Special Functions Using Verified Numerical Computations
journal: Journal of Advanced Simulation in Science and Engineering
volume: 12
number: 1
pages: 113--130
year: 2025
bibdate: Wed Aug 27 11:15:20 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.08.27 11:15:20 ???
URL: https://www.jstage.jst.go.jp/article/jasse/12/1/12_113/_pdf/-char/ja
acknowledgement: ack-nhfb
ajournal: J. Adv. Simulat. Sci. Eng.
journalURL: https://www.jstage.jst.go.jp/browse/jasse
rawauthor: Katsuhisa Ozaki
rawtitle: Accuracy of Low-Precision Elementary and Special Functions Using Verified Numerical Computations
entry:
@Article{Ozaki:2025:ALP,
  author =       "Katsuhisa Ozaki",
  title =        "Accuracy of Low-Precision Elementary and Special
                 Functions Using Verified Numerical Computations",
  journal =      "Journal of Advanced Simulation in Science and
                 Engineering",
  volume =       "12",
  number =       "1",
  pages =        "113--130",
  year =         "2025",
  bibdate =      "Wed Aug 27 11:15:20 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://www.jstage.jst.go.jp/article/jasse/12/1/12_113/_pdf/-char/ja",
  acknowledgement = ack-nhfb,
  ajournal =     "J. Adv. Simulat. Sci. Eng.",
  journal-URL =  "https://www.jstage.jst.go.jp/browse/jasse",
}


bibtype: inproceedings
filename: fparith.bib
label: Peric:2025:SAA
title: SQNR Approximation Analysis of the FP24 Format of Laplacian Source in a Wide Variance Range
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--4
year: 2025
DOI: https://doi.org/10.1109/ICEST66328.2025.11098267
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawtitle: {SQNR} Approximation Analysis of the {FP24} Format of {Laplacian} Source in a Wide Variance Range
author:
Sofija Z. Peric and Zoran H. Peric and Bojan D. Denic and Milan R. Dincic and Aleksandra Z. Jovanovic and Marko S. Andbar elkovic

booktitle:
2025 60th International Scientific Conference on Information, Communication and Energy Systems and Technologies (ICEST)

keywords:
Accuracy; Complexity theory; Computational efficiency; Floating-point format; Laplace equations; Laplacian source; Noise; Performance evaluation; Piecewise-uniform quantization; Probability distribution; Quantization (signal); SQNR

rawauthor:
Sofija Z. Peri{\'c} and Zoran H. Peri{\'c} and Bojan D. Deni{\'c} and Milan R. Din{\v{c}}i{\'c} and Aleksandra Z. Jovanovi{\'c} and Marko S. An{\dbar}elkovi{\'c}

rawbooktitle:
{2025 60th International Scientific Conference on Information, Communication and Energy Systems and Technologies (ICEST)}

entry:
@InProceedings{Peric:2025:SAA,
  author =       "Sofija Z. Peri{\'c} and Zoran H. Peri{\'c} and Bojan
                 D. Deni{\'c} and Milan R. Din{\v{c}}i{\'c} and
                 Aleksandra Z. Jovanovi{\'c} and Marko S.
                 An{\dbar}elkovi{\'c}",
  booktitle =    "{2025 60th International Scientific Conference on
                 Information, Communication and Energy Systems and
                 Technologies (ICEST)}",
  title =        "{SQNR} Approximation Analysis of the {FP24} Format of
                 {Laplacian} Source in a Wide Variance Range",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--4",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ICEST66328.2025.11098267",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Complexity theory; Computational efficiency;
                 Floating-point format; Laplace equations; Laplacian
                 source; Noise; Performance evaluation;
                 Piecewise-uniform quantization; Probability
                 distribution; Quantization (signal); SQNR",
}


bibtype: inproceedings
filename: fparith.bib
label: Ptrot:2025:ESH
author: Frederic Petrot
title: Experimental Software and Hardware Evaluation of Ad-Hoc Constant Division Routines
crossref: IEEE:2025:PIS
pages: 69--72
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00020
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Fr{\'e}d{\'e}ric P{\'e}trot
rawtitle: Experimental Software and Hardware Evaluation of Ad-Hoc Constant Division Routines
entry:
@InProceedings{Ptrot:2025:ESH,
  author =       "Fr{\'e}d{\'e}ric P{\'e}trot",
  title =        "Experimental Software and Hardware Evaluation of
                 Ad-Hoc Constant Division Routines",
  crossref =     "IEEE:2025:PIS",
  pages =        "69--72",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00020",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Pun:2025:RES
title: Range Extension with Supernormals for Mixed-Precision 8-bit DNN Training
crossref: IEEE:2025:PIS
pages: 1--4
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00013
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawtitle: Range Extension with Supernormals for Mixed-Precision 8-bit {DNN} Training
author:
Shing Wai Pun and Bozhang Bao and Silviu-Ioan Filip and Guy Lemieux and John V. Kim and Nazar Misyats and Nirvik Pande and Victor Ravain and Robert Sherrick

rawauthor:
Shing Wai Pun and Bozhang Bao and Silviu-Ioan Filip and Guy Lemieux and John V. Kim and Nazar Misyats and Nirvik Pande and Victor Ravain and Robert Sherrick

entry:
@InProceedings{Pun:2025:RES,
  author =       "Shing Wai Pun and Bozhang Bao and Silviu-Ioan Filip
                 and Guy Lemieux and John V. Kim and Nazar Misyats and
                 Nirvik Pande and Victor Ravain and Robert Sherrick",
  title =        "Range Extension with Supernormals for Mixed-Precision
                 8-bit {DNN} Training",
  crossref =     "IEEE:2025:PIS",
  pages =        "1--4",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00013",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Ramamoorthy:2025:AMP
author: Arnav Ramamoorthy and Kiran Kumar Gunnam
booktitle: 2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)
title: Adaptive Multi-Precision Inference for Large-Scale AI Using IEEE P3109 FP8
volume: 1
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--2
year: 2025
DOI: https://doi.org/10.1109/ISVLSI65124.2025.11130212
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Arnav Ramamoorthy and Kiran Kumar Gunnam
rawbooktitle: {2025 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)}
rawtitle: Adaptive Multi-Precision Inference for Large-Scale {AI} Using {IEEE P3109 FP8}
keywords:
Accuracy; Adaptation models; adaptive precision; Artificial intelligence; dynamic quantization; FP8; Industries; performance-accuracy trade-off; Quantization (signal); Real-time systems; Tensors; Throughput; transformer inference; Transformers; Very large scale integration

entry:
@InProceedings{Ramamoorthy:2025:AMP,
  author =       "Arnav Ramamoorthy and Kiran Kumar Gunnam",
  booktitle =    "{2025 IEEE Computer Society Annual Symposium on VLSI
                 (ISVLSI)}",
  title =        "Adaptive Multi-Precision Inference for Large-Scale
                 {AI} Using {IEEE P3109 FP8}",
  volume =       "1",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--2",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ISVLSI65124.2025.11130212",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Adaptation models; adaptive precision;
                 Artificial intelligence; dynamic quantization; FP8;
                 Industries; performance-accuracy trade-off;
                 Quantization (signal); Real-time systems; Tensors;
                 Throughput; transformer inference; Transformers; Very
                 large scale integration",
}


bibtype: article
filename: fparith.bib
label: Rathor:2025:AFE
author: Mahendra Rathor
title: ALOHA-FP2I: Efficient Algorithms and Hardware for Multi-Mode Rounding of Floating Point to Integer
journal: j-TECS
volume: 24
number: 1
pages: 12:1--12:26
month: jan
monthnumber: 1
year: 2025
DOI: https://doi.org/10.1145/3701560
ISSN: 1539-9087 (print), 1558-3465 (electronic) OR 15399087 (print), 15583465 (electronic)
ISSNL: 1539-9087 OR 15399087
bibdate: Thu Jan 2 07:31:47 MST 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/tecs.bib
bibtimestamp: 2025.01.02 07:31:47 MST
URL: https://dl.acm.org/doi/10.1145/3701560
fjournal: ACM Transactions on Embedded Computing Systems
acknowledgement: ack-nhfb
ajournal: ACM Trans. Embed. Comput. Syst.
articleno: 12
journalURL: https://dl.acm.org/loi/tecs
rawauthor: Mahendra Rathor
abstract:
Modern technology is relying on hardware accelerators to achieve enhanced performance of computing systems. In the modern computing paradigm, floating point representation of numbers has gained popularity owing to its wide dynamic range. Rounding of floating point numbers to integer is used in modern processor architectures e.g., ARM and Intel's architecture (IA) as well as in specific applications such as multimedia. However, the academic literature lacks discussion on hardware designs for rounding binary floating point numbers to integer in different rounding modes. This article presents novel efficient algorithms and hardware architecture designs for rounding binary floating point numbers to the integer for the following rounding modes: round towards zero, round up (towards positive infinity), round down (towards negative infinity), round to the nearest integer, and round to nearest even. The article also proposes an integrated multi-mode rounding (IMR) algorithm and hardware design which can be configured to a specific rounding mode among the above-mentioned five modes. This article proposes a mantissa bit of rounding (MBR) to determine the condition of rounding for the various modes. The MBR is identified on the basis of the dynamic range and precision features of floating point representation. To the best of our knowledge, we present the individual as well as an integrated hardware design for the various rounding modes for the first time in the literature. The proposed designs have been implemented on an FPGA platform to analyze the design metrics such as area, delay, and power. The results imply that the proposed designs are suitable to aid the intended hardware accelerators as they are efficient in terms of the design parameters. Moreover, this article presents the integration of the proposed rounding hardware design with the compression processor and evaluates the integration overhead which is found to be nominal (<1%).

rawabstract:
Modern technology is relying on hardware accelerators to achieve enhanced performance of computing systems. In the modern computing paradigm, floating point representation of numbers has gained popularity owing to its wide dynamic range. Rounding of floating point numbers to integer is used in modern processor architectures e.g., ARM and Intel's architecture (IA) as well as in specific applications such as multimedia. However, the academic literature lacks discussion on hardware designs for rounding binary floating point numbers to integer in different rounding modes. This article presents novel efficient algorithms and hardware architecture designs for rounding binary floating point numbers to the integer for the following rounding modes: round towards zero, round up (towards positive infinity), round down (towards negative infinity), round to the nearest integer, and round to nearest even. The article also proposes an integrated multi-mode rounding (IMR) algorithm and hardware design which can be configured to a specific rounding mode among the above-mentioned five modes. This article proposes a mantissa bit of rounding (MBR) to determine the condition of rounding for the various modes. The MBR is identified on the basis of the dynamic range and precision features of floating point representation. To the best of our knowledge, we present the individual as well as an integrated hardware design for the various rounding modes for the first time in the literature. The proposed designs have been implemented on an FPGA platform to analyze the design metrics such as area, delay, and power. The results imply that the proposed designs are suitable to aid the intended hardware accelerators as they are efficient in terms of the design parameters. Moreover, this article presents the integration of the proposed rounding hardware design with the compression processor and evaluates the integration overhead which is found to be nominal (<1\%).

rawtitle:
{ALOHA-FP2I}: Efficient Algorithms and Hardware for Multi-Mode Rounding of Floating Point to Integer

entry:
@Article{Rathor:2025:AFE,
  author =       "Mahendra Rathor",
  title =        "{ALOHA-FP2I}: Efficient Algorithms and Hardware for
                 Multi-Mode Rounding of Floating Point to Integer",
  journal =      j-TECS,
  volume =       "24",
  number =       "1",
  pages =        "12:1--12:26",
  month =        jan,
  year =         "2025",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1145/3701560",
  ISSN =         "1539-9087 (print), 1558-3465 (electronic)",
  ISSN-L =       "1539-9087",
  bibdate =      "Thu Jan 2 07:31:47 MST 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/tecs.bib",
  URL =          "https://dl.acm.org/doi/10.1145/3701560",
  abstract =     "Modern technology is relying on hardware accelerators
                 to achieve enhanced performance of computing systems.
                 In the modern computing paradigm, floating point
                 representation of numbers has gained popularity owing
                 to its wide dynamic range. Rounding of floating point
                 numbers to integer is used in modern processor
                 architectures e.g., ARM and Intel's architecture (IA)
                 as well as in specific applications such as multimedia.
                 However, the academic literature lacks discussion on
                 hardware designs for rounding binary floating point
                 numbers to integer in different rounding modes. This
                 article presents novel efficient algorithms and
                 hardware architecture designs for rounding binary
                 floating point numbers to the integer for the following
                 rounding modes: round towards zero, round up (towards
                 positive infinity), round down (towards negative
                 infinity), round to the nearest integer, and round to
                 nearest even. The article also proposes an integrated
                 multi-mode rounding (IMR) algorithm and hardware design
                 which can be configured to a specific rounding mode
                 among the above-mentioned five modes. This article
                 proposes a mantissa bit of rounding (MBR) to determine
                 the condition of rounding for the various modes. The
                 MBR is identified on the basis of the dynamic range and
                 precision features of floating point representation. To
                 the best of our knowledge, we present the individual as
                 well as an integrated hardware design for the various
                 rounding modes for the first time in the literature.
                 The proposed designs have been implemented on an FPGA
                 platform to analyze the design metrics such as area,
                 delay, and power. The results imply that the proposed
                 designs are suitable to aid the intended hardware
                 accelerators as they are efficient in terms of the
                 design parameters. Moreover, this article presents the
                 integration of the proposed rounding hardware design
                 with the compression processor and evaluates the
                 integration overhead which is found to be nominal
                 (<1\%).",
  acknowledgement = ack-nhfb,
  ajournal =     "ACM Trans. Embed. Comput. Syst.",
  articleno =    "12",
  fjournal =     "ACM Transactions on Embedded Computing Systems",
  journal-URL =  "https://dl.acm.org/loi/tecs",
}


bibtype: article
filename: fparith.bib
label: Reisch:2025:MSM
author: Cordula Reisch and Hendrik Ranocha
journal: j-SIAM-REVIEW
volume: 67
number: 3
pages: 624--641
year: 2025
CODEN: SIREAD
DOI: https://doi.org/10.1137/23M1563967
ISSN: 0036-1445 (print), 1095-7200 (electronic) OR 00361445 (print), 10957200 (electronic)
ISSNL: 0036-1445 OR 00361445
bibdate: Fri Oct 17 07:24:40 MDT 2025
bibtimestamp: 2025.10.17 07:24:40 MDT
URL: https://epubs.siam.org/doi/10.1137/23M1563967
fjournal: SIAM Review
acknowledgement: ack-nhfb
journalURL: http://epubs.siam.org/sirev
rawauthor: Cordula Reisch and Hendrik Ranocha
title:
Modeling Still Matters: a Surprising Instance of Catastrophic Floating Point Errors in Mathematical Biology and Numerical Methods for ODEs

bibsource:
http://epubs.siam.org/toc/siread/67/3; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/julia.bib; https://www.math.utah.edu/pub/tex/bib/matlab.bib; https://www.math.utah.edu/pub/tex/bib/siamreview.bib

rawtitle:
Modeling Still Matters: a Surprising Instance of Catastrophic Floating Point Errors in Mathematical Biology and Numerical Methods for {ODEs}

entry:
@Article{Reisch:2025:MSM,
  author =       "Cordula Reisch and Hendrik Ranocha",
  title =        "Modeling Still Matters: a Surprising Instance of
                 Catastrophic Floating Point Errors in Mathematical
                 Biology and Numerical Methods for {ODEs}",
  journal =      j-SIAM-REVIEW,
  volume =       "67",
  number =       "3",
  pages =        "624--641",
  month =        "????",
  year =         "2025",
  CODEN =        "SIREAD",
  DOI =          "https://doi.org/10.1137/23M1563967",
  ISSN =         "0036-1445 (print), 1095-7200 (electronic)",
  ISSN-L =       "0036-1445",
  bibdate =      "Fri Oct 17 07:24:40 MDT 2025",
  bibsource =    "http://epubs.siam.org/toc/siread/67/3;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/julia.bib;
                 https://www.math.utah.edu/pub/tex/bib/matlab.bib;
                 https://www.math.utah.edu/pub/tex/bib/siamreview.bib",
  URL =          "https://epubs.siam.org/doi/10.1137/23M1563967",
  acknowledgement = ack-nhfb,
  fjournal =     "SIAM Review",
  journal-URL =  "http://epubs.siam.org/sirev",
}


bibtype: inproceedings
filename: fparith.bib
label: Ren:2025:AMP
author: Jie Ren and Hatem Ltaief and Sameh Abdulah and David E. Keyes
booktitle: ISC High Performance 2025 Research Paper Proceedings (40th International Conference)
title: Accelerating Mixed-Precision Out-of-Core Cholesky Factorization with Static Task Scheduling
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--12
year: 2025
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Jie Ren and Hatem Ltaief and Sameh Abdulah and David E. Keyes
rawbooktitle: {ISC High Performance 2025 Research Paper Proceedings (40th International Conference)}
rawtitle: Accelerating Mixed-Precision Out-of-Core {Cholesky} Factorization with Static Task Scheduling
keywords:
Accuracy; Data transfer; Data Transfer Optimization; GPU Accelerators; Graphics processing units; Left-Looking Cholesky Factorization; Memory management; Mixed-Precision Computations; Optimization; Out-of-Core Algorithms; Processor scheduling; Scheduling; Spatial databases; Static Task Scheduling; Technological innovation; Throughput

entry:
@InProceedings{Ren:2025:AMP,
  author =       "Jie Ren and Hatem Ltaief and Sameh Abdulah and David
                 E. Keyes",
  booktitle =    "{ISC High Performance 2025 Research Paper Proceedings
                 (40th International Conference)}",
  title =        "Accelerating Mixed-Precision Out-of-Core {Cholesky}
                 Factorization with Static Task Scheduling",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--12",
  year =         "2025",
  DOI =          "",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Data transfer; Data Transfer Optimization;
                 GPU Accelerators; Graphics processing units;
                 Left-Looking Cholesky Factorization; Memory management;
                 Mixed-Precision Computations; Optimization; Out-of-Core
                 Algorithms; Processor scheduling; Scheduling; Spatial
                 databases; Static Task Scheduling; Technological
                 innovation; Throughput",
}


bibtype: article
filename: fparith.bib
label: Scheffler:2025:OCD
journal: j-IEEE-J-SOLID-STATE-CIRCUITS
volume: 60
number: 4
pages: 1324--1338
year: 2025
CODEN: IJSCBC
DOI: https://doi.org/10.1109/JSSC.2025.3529249
ISSN: 0018-9200 (print), 1558-173X (electronic) OR 00189200 (print), 1558173X (electronic)
ISSNL: 0018-9200 OR 00189200
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/risc-v.bib
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Journal of Solid-State Circuits
acknowledgement: ack-nhfb
author:
Paul Scheffler and Thomas Benz and Viviane Potocnik and Tim Fischer and Luca Colagrande and Nils Wistoff and Yichao Zhang and Luca Bertaccini and Gianmarco Ottavi and Manuel Eggimann and Matheus Cavalcante and Gianna Paulin and Frank K. Gurkaynak and Davide Rossi and Luca Benini

title:
Occamy: a 432-Core Dual-Chiplet Dual-HBM2E 768-DP-GFLOP/s RISC-V System for 8-to-64-bit Dense and Sparse Computing in 12-nm FinFET

keywords:
2.5-D integration; Bandwidth; chiplet; Chiplets; Codes; Computer architecture; Device-to-device communication; Engines; high-performance computing (HPC); Integrated circuit interconnections; interposer; machine learning (ML); manycore; multi-precision; Register transfer level; RISC-V; sparse acceleration; stencil acceleration; Tensors; Throughput

rawauthor:
Paul Scheffler and Thomas Benz and Viviane Potocnik and Tim Fischer and Luca Colagrande and Nils Wistoff and Yichao Zhang and Luca Bertaccini and Gianmarco Ottavi and Manuel Eggimann and Matheus Cavalcante and Gianna Paulin and Frank K. G{\"u}rkaynak and Davide Rossi and Luca Benini

rawtitle:
{Occamy}: a 432-Core Dual-Chiplet {Dual-HBM2E 768-DP-GFLOP/s} {RISC-V} System for 8-to-64-bit Dense and Sparse Computing in 12-nm {FinFET}

entry:
@Article{Scheffler:2025:OCD,
  author =       "Paul Scheffler and Thomas Benz and Viviane Potocnik
                 and Tim Fischer and Luca Colagrande and Nils Wistoff
                 and Yichao Zhang and Luca Bertaccini and Gianmarco
                 Ottavi and Manuel Eggimann and Matheus Cavalcante and
                 Gianna Paulin and Frank K. G{\"u}rkaynak and Davide
                 Rossi and Luca Benini",
  title =        "{Occamy}: a 432-Core Dual-Chiplet {Dual-HBM2E
                 768-DP-GFLOP/s} {RISC-V} System for 8-to-64-bit Dense
                 and Sparse Computing in 12-nm {FinFET}",
  journal =      j-IEEE-J-SOLID-STATE-CIRCUITS,
  volume =       "60",
  number =       "4",
  pages =        "1324--1338",
  year =         "2025",
  CODEN =        "IJSCBC",
  DOI =          "https://doi.org/10.1109/JSSC.2025.3529249",
  ISSN =         "0018-9200 (print), 1558-173X (electronic)",
  ISSN-L =       "0018-9200",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/risc-v.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Journal of Solid-State Circuits",
  keywords =     "2.5-D integration; Bandwidth; chiplet; Chiplets;
                 Codes; Computer architecture; Device-to-device
                 communication; Engines; high-performance computing
                 (HPC); Integrated circuit interconnections; interposer;
                 machine learning (ML); manycore; multi-precision;
                 Register transfer level; RISC-V; sparse acceleration;
                 stencil acceleration; Tensors; Throughput",
}


bibtype: article
filename: fparith.bib
label: Shaban:2025:VAD
author: Ahmed Shaban and Shreshtha Gothalyan and Manan Suri and Tuo-Hung Hou
journal: IEEE Transactions on Circuits and Systems for Artificial Intelligence
volume: 2
number: 3
pages: 185--196
year: 2025
DOI: https://doi.org/10.1109/TCASAI.2025.3592864
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Ahmed Shaban and Shreshtha Gothalyan and Manan Suri and Tuo-Hung Hou
title:
Variation-Aware Demonstration and Optimization of Block Floating Point and Integer Neural Network Acceleration on RRAM Compute in-Memory Hardware

keywords:
Accelerators; Arrays; Computer architecture; convolutional neural networks (CNNs); deep neural networks (DNNs); Device-to-device communication; Energy consumption; floating-point acceleration; Hardware; In-memory computing; in-memory computing; Optimization; Performance evaluation; Resistance; Resistive RAM; resistive RAM (RRAM)

rawtitle:
Variation-Aware Demonstration and Optimization of Block Floating Point and Integer Neural Network Acceleration on {RRAM} Compute in-Memory Hardware

entry:
@Article{Shaban:2025:VAD,
  author =       "Ahmed Shaban and Shreshtha Gothalyan and Manan Suri
                 and Tuo-Hung Hou",
  title =        "Variation-Aware Demonstration and Optimization of
                 Block Floating Point and Integer Neural Network
                 Acceleration on {RRAM} Compute in-Memory Hardware",
  journal =      "IEEE Transactions on Circuits and Systems for
                 Artificial Intelligence",
  volume =       "2",
  number =       "3",
  pages =        "185--196",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/TCASAI.2025.3592864",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accelerators; Arrays; Computer architecture;
                 convolutional neural networks (CNNs); deep neural
                 networks (DNNs); Device-to-device communication; Energy
                 consumption; floating-point acceleration; Hardware;
                 In-memory computing; in-memory computing; Optimization;
                 Performance evaluation; Resistance; Resistive RAM;
                 resistive RAM (RRAM)",
}


bibtype: inproceedings
filename: fparith.bib
label: Shah:2025:ORT
author: Gaurav Shah and Abhinav Goud and Zaqi Momin and Joycee Mekie
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 451--456
year: 2025
DOI: https://doi.org/10.1109/VLSID64188.2025.00090
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Gaurav Shah and Abhinav Goud and Zaqi Momin and Joycee Mekie
booktitle:
2025 38th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID)

title:
OwlsEye: Real-Time Low-Light Video Instance Segmentation on Edge and Exploration of Fixed-Posit Quantization

keywords:
Computer Vision; Edge AI; Fixed Posits; Image edge detection; Instance segmentation; low-light enhancement; Pipeline processing; Quantization (signal); Real-time systems; Robot vision systems; Robots; Streaming media; Surveillance; Very large scale integration; Video Instance Segmentation

rawbooktitle:
{2025 38th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID)}

rawtitle:
{OwlsEye}: Real-Time Low-Light Video Instance Segmentation on Edge and Exploration of Fixed-Posit Quantization

entry:
@InProceedings{Shah:2025:ORT,
  author =       "Gaurav Shah and Abhinav Goud and Zaqi Momin and Joycee
                 Mekie",
  booktitle =    "{2025 38th International Conference on VLSI Design and
                 2024 23rd International Conference on Embedded Systems
                 (VLSID)}",
  title =        "{OwlsEye}: Real-Time Low-Light Video Instance
                 Segmentation on Edge and Exploration of Fixed-Posit
                 Quantization",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "451--456",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/VLSID64188.2025.00090",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Computer Vision; Edge AI; Fixed Posits; Image edge
                 detection; Instance segmentation; low-light
                 enhancement; Pipeline processing; Quantization
                 (signal); Real-time systems; Robot vision systems;
                 Robots; Streaming media; Surveillance; Very large scale
                 integration; Video Instance Segmentation",
}


bibtype: inproceedings
filename: fparith.bib
label: Sharma:2025:DLL
author: Prashnat Sharma and Sourav Nath and Koushik Guha and Krishna Lal Baishnab
booktitle: 2025 Devices for Integrated Circuit (DevIC)
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 583--588
year: 2025
DOI: https://doi.org/10.1109/DevIC63749.2025.11012211
bibdate: Mon Oct 27 10:32:44 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/cordic.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.27 10:32:44 ???
acknowledgement: ack-nhfb
rawauthor: Prashnat Sharma and Sourav Nath and Koushik Guha and Krishna Lal Baishnab
rawbooktitle: {2025 Devices for Integrated Circuit (DevIC)}
title:
Design of Low-Latency, Area- and Power-Efficient CORDIC Algorithms for Sine / Cosine Floating-Point Computation

keywords:
Accuracy; Adders; and Logic design; Approximate adder; Approximate computing; Cordic; Digital signal processing; Field programmable gate arrays; Hardware; Low latency communication; Memory management; Optimization; Power demand; Signal processing algorithms; Trigonometric function

rawtitle:
Design of Low-Latency, Area- and Power-Efficient {CORDIC} Algorithms for Sine\slash Cosine Floating-Point Computation

entry:
@InProceedings{Sharma:2025:DLL,
  author =       "Prashnat Sharma and Sourav Nath and Koushik Guha and
                 Krishna Lal Baishnab",
  booktitle =    "{2025 Devices for Integrated Circuit (DevIC)}",
  title =        "Design of Low-Latency, Area- and Power-Efficient
                 {CORDIC} Algorithms for Sine\slash Cosine
                 Floating-Point Computation",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "583--588",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/DevIC63749.2025.11012211",
  bibdate =      "Mon Oct 27 10:32:44 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/cordic.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Adders; and Logic design; Approximate adder;
                 Approximate computing; Cordic; Digital signal
                 processing; Field programmable gate arrays; Hardware;
                 Low latency communication; Memory management;
                 Optimization; Power demand; Signal processing
                 algorithms; Trigonometric function",
}


bibtype: article
filename: fparith.bib
label: Shin:2025:DMH
author: Seungah Shin and Joonho Kong and Young Seo Lee
journal: j-IEEE-ACCESS
volume: 13
pages: 165738--165750
year: 2025
DOI: https://doi.org/10.1109/ACCESS.2025.3612913
ISSN: 2169-3536 OR 21693536
ISSNL: 2169-3536 OR 21693536
bibdate: Tue Sep 30 17:30:28 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.09.30 17:30:28 ???
fjournal: IEEE Access
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639
rawauthor: Seungah Shin and Joonho Kong and Young Seo Lee
title:
Dual-MAC: Hardware Acceleration of DNN Inferences With a Customized Lightweight Brain Floating-Point Format

keywords:
Accuracy; Artificial intelligence; Artificial neural networks; brain floating point; Complexity theory; custom weight format; Data models; Deep neural network inference; Energy efficiency; Hardware acceleration; hardware acceleration; Memory management; Systolic arrays; Throughput; throughput

rawtitle:
{Dual-MAC}: Hardware Acceleration of {DNN} Inferences With a Customized Lightweight Brain Floating-Point Format

entry:
@Article{Shin:2025:DMH,
  author =       "Seungah Shin and Joonho Kong and Young Seo Lee",
  title =        "{Dual-MAC}: Hardware Acceleration of {DNN} Inferences
                 With a Customized Lightweight Brain Floating-Point
                 Format",
  journal =      j-IEEE-ACCESS,
  volume =       "13",
  pages =        "165738--165750",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ACCESS.2025.3612913",
  ISSN =         "2169-3536",
  ISSN-L =       "2169-3536",
  bibdate =      "Tue Sep 30 17:30:28 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Access",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639",
  keywords =     "Accuracy; Artificial intelligence; Artificial neural
                 networks; brain floating point; Complexity theory;
                 custom weight format; Data models; Deep neural network
                 inference; Energy efficiency; Hardware acceleration;
                 hardware acceleration; Memory management; Systolic
                 arrays; Throughput; throughput",
}


bibtype: article
filename: fparith.bib
label: Sumaiya:2025:TRT
author: Sumaiya and Reza Jafarpourmarzouni and Yichen Luo and Sidi Lu and Zheng Dong
title: Toward Real-Time and Efficient Perception Workflows in Software-Defined Vehicles
journal: IEEE Internet of Things Journal
volume: 12
number: 6
pages: 7240--7258
year: 2025
DOI: https://doi.org/10.1109/JIOT.2024.3492801
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Sumaiya and Reza Jafarpourmarzouni and Yichen Luo and Sidi Lu and Zheng Dong
rawtitle: Toward Real-Time and Efficient Perception Workflows in Software-Defined Vehicles
keywords:
16-bit floating point precision (FP16); Accuracy; accuracy; Computational modeling; Deep learning; FP32; GPU/memory usage; INT8; latency; Memory management; Optimization; pruning; quantization; Quantization (signal); real-time; Real-time systems; software-defined vehicle (SDV); Throughput; throughput; Training; workflow; YOLO

entry:
@Article{Sumaiya:2025:TRT,
  author =       "Sumaiya and Reza Jafarpourmarzouni and Yichen Luo and
                 Sidi Lu and Zheng Dong",
  title =        "Toward Real-Time and Efficient Perception Workflows in
                 Software-Defined Vehicles",
  journal =      "IEEE Internet of Things Journal",
  volume =       "12",
  number =       "6",
  pages =        "7240--7258",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/JIOT.2024.3492801",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "16-bit floating point precision (FP16); Accuracy;
                 accuracy; Computational modeling; Deep learning; FP32;
                 GPU/memory usage; INT8; latency; Memory management;
                 Optimization; pruning; quantization; Quantization
                 (signal); real-time; Real-time systems;
                 software-defined vehicle (SDV); Throughput; throughput;
                 Training; workflow; YOLO",
}


bibtype: inproceedings
filename: fparith.bib
label: Swords:2025:REE
author: Sol Swords and Cuong Chau
title: Robust, End-to-end Correctness Proofs of Industrial Divide and Square Root RTL Designs
crossref: IEEE:2025:PIS
pages: 149--156
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00031
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Sol Swords and Cuong Chau
rawtitle: Robust, End-to-end Correctness Proofs of Industrial Divide and Square Root {RTL} Designs
entry:
@InProceedings{Swords:2025:REE,
  author =       "Sol Swords and Cuong Chau",
  title =        "Robust, End-to-end Correctness Proofs of Industrial
                 Divide and Square Root {RTL} Designs",
  crossref =     "IEEE:2025:PIS",
  pages =        "149--156",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00031",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: inproceedings
filename: fparith.bib
label: Tang:2025:RES
author: Ping Tak Peter Tang
title: Rounding Error Statistics as Numerics Signature
crossref: IEEE:2025:PIS
pages: 93--100
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00024
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Ping Tak Peter Tang
rawtitle: Rounding Error Statistics as Numerics Signature
entry:
@InProceedings{Tang:2025:RES,
  author =       "Ping Tak Peter Tang",
  title =        "Rounding Error Statistics as Numerics Signature",
  crossref =     "IEEE:2025:PIS",
  pages =        "93--100",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00024",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: article
filename: fparith.bib
label: Thushara:2025:FSA
author: M. G. Thushara and K. Somasundaram
journal: j-IEEE-ACCESS
volume: 13
pages: 80705--80722
year: 2025
DOI: https://doi.org/10.1109/ACCESS.2025.3567762
ISSN: 2169-3536 OR 21693536
ISSNL: 2169-3536 OR 21693536
bibdate: Tue Sep 30 17:30:28 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.09.30 17:30:28 ???
fjournal: IEEE Access
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639
rawauthor: M. G. Thushara and K. Somasundaram
title:
ForBac: A Static Analysis Approach With Forward and Backward Analysis for Precision in Floating-Point Computations

keywords:
abstract interpretation; Accuracy; Analytical models; Codes; Computational modeling; floating-point; Input variables; precision; Software; Standards; Static analysis; transfer function; Transfer functions; Tuning

rawtitle:
{ForBac}: A Static Analysis Approach With Forward and Backward Analysis for Precision in Floating-Point Computations

entry:
@Article{Thushara:2025:FSA,
  author =       "M. G. Thushara and K. Somasundaram",
  title =        "{ForBac}: A Static Analysis Approach With Forward and
                 Backward Analysis for Precision in Floating-Point
                 Computations",
  journal =      j-IEEE-ACCESS,
  volume =       "13",
  pages =        "80705--80722",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ACCESS.2025.3567762",
  ISSN =         "2169-3536",
  ISSN-L =       "2169-3536",
  bibdate =      "Tue Sep 30 17:30:28 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Access",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639",
  keywords =     "abstract interpretation; Accuracy; Analytical models;
                 Codes; Computational modeling; floating-point; Input
                 variables; precision; Software; Standards; Static
                 analysis; transfer function; Transfer functions;
                 Tuning",
}


bibtype: article
filename: fparith.bib
label: Vakili:2025:DFL
author: Shervin Vakili and Mobin Vaziri and Amirhossein Zarei and J. M. Pierre Langlois
title: DyRecMul: Fast and Low-Cost Approximate Multiplier for FPGAs using Dynamic Reconfiguration
journal: j-TRETS
volume: 18
number: 1
pages: 7:1--7:??
month: mar
monthnumber: 3
year: 2025
DOI: https://doi.org/10.1145/3663480
ISSN: 1936-7406 (print), 1936-7414 (electronic) OR 19367406 (print), 19367414 (electronic)
ISSNL: 1936-7406 OR 19367406
bibdate: Tue Mar 25 09:48:37 MDT 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/trets.bib
bibtimestamp: 2025.03.25 09:48:37 MDT
URL: https://dl.acm.org/doi/10.1145/3663480
fjournal: ACM Transactions on Reconfigurable Technology and Systems (TRETS)
acknowledgement: ack-nhfb
ajournal: ACM Trans. Reconfigurable Technol. Syst.
articleno: 7
journalURL: https://dl.acm.org/loi/trets
rawauthor: Shervin Vakili and Mobin Vaziri and Amirhossein Zarei and J. M. Pierre Langlois
rawtitle: {DyRecMul}: Fast and Low-Cost Approximate Multiplier for {FPGAs} using Dynamic Reconfiguration
abstract:
Multipliers are widely-used arithmetic operators in digital signal processing and machine learning (ML) circuits. Due to their relatively high complexity, they can have high latency and be a significant source of power consumption. One strategy to alleviate these limitations is to use approximate computing. This article thus introduces an original FPGA-based approximate multiplier specifically optimized for ML computations. It utilizes dynamically reconfigurable lookup table (LUT) primitives in AMD-Xilinx technology to realize the core part of the computations. The article provides an in-depth analysis of the hardware architecture, implementation outcomes, and accuracy evaluations of the multiplier proposed in INT8 precision. The article also facilitates the generalization of the proposed approximate multiplier idea to other datatypes, providing analysis and estimations for hardware cost and accuracy as a function of multiplier parameters. Implementation results on an AMD-Xilinx Kintex Ultrascale+ FPGA demonstrate remarkable savings of 64% and 67% in LUT utilization for signed multiplication and multiply-and-accumulation configurations, respectively when compared to the standard Xilinx multiplier core. Accuracy measurements on four popular deep learning (DL) benchmarks indicate a minimal average accuracy decrease of less than 0.29% during post-training deployment, with the maximum reduction staying less than 0.33%. The source code of this work is available on GitHub.

rawabstract:
Multipliers are widely-used arithmetic operators in digital signal processing and machine learning (ML) circuits. Due to their relatively high complexity, they can have high latency and be a significant source of power consumption. One strategy to alleviate these limitations is to use approximate computing. This article thus introduces an original FPGA-based approximate multiplier specifically optimized for ML computations. It utilizes dynamically reconfigurable lookup table (LUT) primitives in AMD-Xilinx technology to realize the core part of the computations. The article provides an in-depth analysis of the hardware architecture, implementation outcomes, and accuracy evaluations of the multiplier proposed in INT8 precision. The article also facilitates the generalization of the proposed approximate multiplier idea to other datatypes, providing analysis and estimations for hardware cost and accuracy as a function of multiplier parameters. Implementation results on an AMD-Xilinx Kintex Ultrascale+ FPGA demonstrate remarkable savings of 64\% and 67\% in LUT utilization for signed multiplication and multiply-and-accumulation configurations, respectively when compared to the standard Xilinx multiplier core. Accuracy measurements on four popular deep learning (DL) benchmarks indicate a minimal average accuracy decrease of less than 0.29\% during post-training deployment, with the maximum reduction staying less than 0.33\%. The source code of this work is available on GitHub.

entry:
@Article{Vakili:2025:DFL,
  author =       "Shervin Vakili and Mobin Vaziri and Amirhossein Zarei
                 and J. M. Pierre Langlois",
  title =        "{DyRecMul}: Fast and Low-Cost Approximate Multiplier
                 for {FPGAs} using Dynamic Reconfiguration",
  journal =      j-TRETS,
  volume =       "18",
  number =       "1",
  pages =        "7:1--7:??",
  month =        mar,
  year =         "2025",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1145/3663480",
  ISSN =         "1936-7406 (print), 1936-7414 (electronic)",
  ISSN-L =       "1936-7406",
  bibdate =      "Tue Mar 25 09:48:37 MDT 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/trets.bib",
  URL =          "https://dl.acm.org/doi/10.1145/3663480",
  abstract =     "Multipliers are widely-used arithmetic operators in
                 digital signal processing and machine learning (ML)
                 circuits. Due to their relatively high complexity, they
                 can have high latency and be a significant source of
                 power consumption. One strategy to alleviate these
                 limitations is to use approximate computing. This
                 article thus introduces an original FPGA-based
                 approximate multiplier specifically optimized for ML
                 computations. It utilizes dynamically reconfigurable
                 lookup table (LUT) primitives in AMD-Xilinx technology
                 to realize the core part of the computations. The
                 article provides an in-depth analysis of the hardware
                 architecture, implementation outcomes, and accuracy
                 evaluations of the multiplier proposed in INT8
                 precision. The article also facilitates the
                 generalization of the proposed approximate multiplier
                 idea to other datatypes, providing analysis and
                 estimations for hardware cost and accuracy as a
                 function of multiplier parameters. Implementation
                 results on an AMD-Xilinx Kintex Ultrascale+ FPGA
                 demonstrate remarkable savings of 64\% and 67\% in LUT
                 utilization for signed multiplication and
                 multiply-and-accumulation configurations, respectively
                 when compared to the standard Xilinx multiplier core.
                 Accuracy measurements on four popular deep learning
                 (DL) benchmarks indicate a minimal average accuracy
                 decrease of less than 0.29\% during post-training
                 deployment, with the maximum reduction staying less
                 than 0.33\%. The source code of this work is available
                 on GitHub.",
  acknowledgement = ack-nhfb,
  ajournal =     "ACM Trans. Reconfigurable Technol. Syst.",
  articleno =    "7",
  fjournal =     "ACM Transactions on Reconfigurable Technology and
                 Systems (TRETS)",
  journal-URL =  "https://dl.acm.org/loi/trets",
}


bibtype: inproceedings
filename: fparith.bib
label: Vanover:2025:ESE
author: Jackson Vanover and James Demmel and Xiaoye Sherry Li and Cindy Rubio-Gonzalez
crossref: IEEE:2025:PIS
pages: 109--116
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00026
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Jackson Vanover and James Demmel and Xiaoye Sherry Li and Cindy Rubio-Gonz{\'a}lez
title:
Excvate: Spoofing Exceptions and Solving Constraints to Test Exception Handling in Numerical Libraries

rawtitle:
{Excvate}: Spoofing Exceptions and Solving Constraints to Test Exception Handling in Numerical Libraries

entry:
@InProceedings{Vanover:2025:ESE,
  author =       "Jackson Vanover and James Demmel and Xiaoye Sherry Li
                 and Cindy Rubio-Gonz{\'a}lez",
  title =        "{Excvate}: Spoofing Exceptions and Solving Constraints
                 to Test Exception Handling in Numerical Libraries",
  crossref =     "IEEE:2025:PIS",
  pages =        "109--116",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00026",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: article
filename: fparith.bib
label: Walczyk:2025:OAX
author: Cezary J. Walczyk and Leonid V. Moroz and Volodymyr Samotyy and Jan L. Cieslinski
title: Optimal Approximation of the $ 1 / x $ Function using Chebyshev Polynomials and Magic Constants
journal: j-TOMS
volume: 51
number: 1
pages: 2:1--2:??
month: mar
monthnumber: 3
year: 2025
CODEN: ACMSCU
DOI: https://doi.org/10.1145/3708472
ISSN: 0098-3500 (print), 1557-7295 (electronic) OR 00983500 (print), 15577295 (electronic)
ISSNL: 0098-3500 OR 00983500
bibdate: Thu Apr 10 08:03:40 MDT 2025
bibtimestamp: 2025.04.10 08:03:40 MDT
fjournal: ACM Transactions on Mathematical Software (TOMS)
acknowledgement: ack-nhfb
ajournal: ACM Trans. Math. Softw.
articleno: 2
journalURL: https://dl.acm.org/loi/toms
rawauthor: Cezary J. Walczyk and Leonid V. Moroz and Volodymyr Samotyy and Jan L. Cie{\'s}li{\'n}ski
rawtitle: Optimal Approximation of the $ 1 / x $ Function using {Chebyshev} Polynomials and Magic Constants
bibsource:
https://www.math.utah.edu/pub/tex/bib/elefunt.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/toms.bib

abstract:
In this article we analyze low-cost accurate approximation of the function $ 1 / x $ using Chebyshev polynomials of the first kind and minimizing number of elementary operations in computer codes (in particular, by using the so-called magic constants). It is shown that Newton-Raphson iterative method is not optimal and a new approach is proposed. We prove that optimal Chebyshev polynomials can be factorized in terms of Chebyshev polynomials of lower order which leads to new optimal iteration schemes. We also construct a family of new algorithms by dividing the considered interval into sub-intervals where different magic constants and multiplicative factors are used (in order to increase the accuracy). Theoretical considerations and proofs are completed with numerical tests on three types of microcontroller processors.

rawabstract:
In this article we analyze low-cost accurate approximation of the function $ 1 / x $ using Chebyshev polynomials of the first kind and minimizing number of elementary operations in computer codes (in particular, by using the so-called magic constants). It is shown that Newton-Raphson iterative method is not optimal and a new approach is proposed. We prove that optimal Chebyshev polynomials can be factorized in terms of Chebyshev polynomials of lower order which leads to new optimal iteration schemes. We also construct a family of new algorithms by dividing the considered interval into sub-intervals where different magic constants and multiplicative factors are used (in order to increase the accuracy). Theoretical considerations and proofs are completed with numerical tests on three types of microcontroller processors.

entry:
@Article{Walczyk:2025:OAX,
  author =       "Cezary J. Walczyk and Leonid V. Moroz and Volodymyr
                 Samotyy and Jan L. Cie{\'s}li{\'n}ski",
  title =        "Optimal Approximation of the $ 1 / x $ Function using
                 {Chebyshev} Polynomials and Magic Constants",
  journal =      j-TOMS,
  volume =       "51",
  number =       "1",
  pages =        "2:1--2:??",
  month =        mar,
  year =         "2025",
  CODEN =        "ACMSCU",
  DOI =          "https://doi.org/10.1145/3708472",
  ISSN =         "0098-3500 (print), 1557-7295 (electronic)",
  ISSN-L =       "0098-3500",
  bibdate =      "Thu Apr 10 08:03:40 MDT 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/elefunt.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/toms.bib",
  abstract =     "In this article we analyze low-cost accurate
                 approximation of the function $ 1 / x $ using Chebyshev
                 polynomials of the first kind and minimizing number of
                 elementary operations in computer codes (in particular,
                 by using the so-called magic constants). It is shown
                 that Newton-Raphson iterative method is not optimal and
                 a new approach is proposed. We prove that optimal
                 Chebyshev polynomials can be factorized in terms of
                 Chebyshev polynomials of lower order which leads to new
                 optimal iteration schemes. We also construct a family
                 of new algorithms by dividing the considered interval
                 into sub-intervals where different magic constants and
                 multiplicative factors are used (in order to increase
                 the accuracy). Theoretical considerations and proofs
                 are completed with numerical tests on three types of
                 microcontroller processors.",
  accepted =     "4 December 2024",
  acknowledgement = ack-nhfb,
  ajournal =     "ACM Trans. Math. Softw.",
  articleno =    "2",
  fjournal =     "ACM Transactions on Mathematical Software (TOMS)",
  journal-URL =  "https://dl.acm.org/loi/toms",
  received =     "3 September 2022",
  revised =      "25 September 2024",
}


bibtype: article
filename: fparith.bib
label: Wang:2025:EEP
title: An Energy-Efficient POSIT Compute-in-Memory Macro for High-Accuracy AI Applications
journal: j-IEEE-J-SOLID-STATE-CIRCUITS
volume: 60
number: 8
pages: 2981--2994
year: 2025
CODEN: IJSCBC
DOI: https://doi.org/10.1109/JSSC.2025.3532654
ISSN: 0018-9200 (print), 1558-173X (electronic) OR 00189200 (print), 1558173X (electronic)
ISSNL: 0018-9200 OR 00189200
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Journal of Solid-State Circuits
acknowledgement: ack-nhfb
rawtitle: An Energy-Efficient {POSIT} Compute-in-Memory Macro for High-Accuracy {AI} Applications
author:
Yang Wang and Xiaolong Yang and Yubin Qin and Zhiren Zhao and Ruiqi Guo and Zhiheng Yue and Huiming Han and Shaojun Wei and Yang Hu and Shouyi Yin

keywords:
Accuracy; Adders; Arrays; Artificial intelligence; Artificial intelligence (AI); Common Information Model (computing); Computational modeling; compute-in-memory; Energy efficiency; floating-point (FP); high-accuracy; In-memory computing; Logic; POSIT data format; Training

entry:
@Article{Wang:2025:EEP,
  author =       "Yang Wang and Xiaolong Yang and Yubin Qin and Zhiren
                 Zhao and Ruiqi Guo and Zhiheng Yue and Huiming Han and
                 Shaojun Wei and Yang Hu and Shouyi Yin",
  title =        "An Energy-Efficient {POSIT} Compute-in-Memory Macro
                 for High-Accuracy {AI} Applications",
  journal =      j-IEEE-J-SOLID-STATE-CIRCUITS,
  volume =       "60",
  number =       "8",
  pages =        "2981--2994",
  year =         "2025",
  CODEN =        "IJSCBC",
  DOI =          "https://doi.org/10.1109/JSSC.2025.3532654",
  ISSN =         "0018-9200 (print), 1558-173X (electronic)",
  ISSN-L =       "0018-9200",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Journal of Solid-State Circuits",
  keywords =     "Accuracy; Adders; Arrays; Artificial intelligence;
                 Artificial intelligence (AI); Common Information Model
                 (computing); Computational modeling; compute-in-memory;
                 Energy efficiency; floating-point (FP); high-accuracy;
                 In-memory computing; Logic; POSIT data format;
                 Training",
}


bibtype: inproceedings
filename: fparith.bib
label: Wang:2025:PPF
author: Wenqing Wang and Ziming Chen and Quan Deng and Liang Fang
booktitle: 2025 Design, Automation & Test in Europe Conference (DATE)
title: PFP: Parallel Floating-Point Vector Multiplication Acceleration in MAGIC ReRAM
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--7
year: 2025
DOI: https://doi.org/10.23919/DATE64628.2025.10993278
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawauthor: Wenqing Wang and Ziming Chen and Quan Deng and Liang Fang
rawbooktitle: {2025 Design, Automation \& Test in Europe Conference (DATE)}
rawtitle: {PFP}: Parallel Floating-Point Vector Multiplication Acceleration in {MAGIC ReRAM}
keywords:
Arrays; CIM; Common Information Model (computing); Emerging application; Europe; Floating-point vector multiplication; Graphics; Hardware; Large language models; Logic; Machine learning; Parallel computing; Parallel processing; ReRAM array; Vectors

entry:
@InProceedings{Wang:2025:PPF,
  author =       "Wenqing Wang and Ziming Chen and Quan Deng and Liang
                 Fang",
  booktitle =    "{2025 Design, Automation \& Test in Europe Conference
                 (DATE)}",
  title =        "{PFP}: Parallel Floating-Point Vector Multiplication
                 Acceleration in {MAGIC ReRAM}",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--7",
  year =         "2025",
  DOI =          "https://doi.org/10.23919/DATE64628.2025.10993278",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Arrays; CIM; Common Information Model (computing);
                 Emerging application; Europe; Floating-point vector
                 multiplication; Graphics; Hardware; Large language
                 models; Logic; Machine learning; Parallel computing;
                 Parallel processing; ReRAM array; Vectors",
}


bibtype: article
filename: fparith.bib
label: Wang:2025:PPH
title: A parallel and pipelined high speed Montgomery modular multiplier for IoT devices
journal: j-COMP-NET-AMSTERDAM
volume: 265
pages: ??--??
month: jun
monthnumber: 6
year: 2025
DOI: https://doi.org/10.1016/j.comnet.2025.111282
ISSN: 1389-1286 (print), 1872-7069 (electronic) OR 13891286 (print), 18727069 (electronic)
ISSNL: 1389-1286 OR 13891286
bibdate: Fri May 9 06:02:42 MDT 2025
bibtimestamp: 2025.05.09 06:02:42 MDT
URL: http://www.sciencedirect.com/science/article/pii/S1389128625002506
fjournal: Computer Networks (Amsterdam, Netherlands: 1999)
acknowledgement: ack-nhfb
articleno: 111282
journalURL: http://www.sciencedirect.com/science/journal/13891286/
rawtitle: A parallel and pipelined high speed {Montgomery} modular multiplier for {IoT} devices
author:
Jiaxuan Wang and Xiaofeng Wang and Wenzheng Liu and Qianqian Xing and Xiaoyong Tang and Tan Deng and Ronghui Cao and Mingfeng Huang

bibsource:
https://www.math.utah.edu/pub/tex/bib/compnetamsterdam2020.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib

rawauthor:
Jiaxuan Wang and Xiaofeng Wang and Wenzheng Liu and Qianqian Xing and Xiaoyong Tang and Tan Deng and Ronghui Cao and Mingfeng Huang

entry:
@Article{Wang:2025:PPH,
  author =       "Jiaxuan Wang and Xiaofeng Wang and Wenzheng Liu and
                 Qianqian Xing and Xiaoyong Tang and Tan Deng and
                 Ronghui Cao and Mingfeng Huang",
  title =        "A parallel and pipelined high speed {Montgomery}
                 modular multiplier for {IoT} devices",
  journal =      j-COMP-NET-AMSTERDAM,
  volume =       "265",
  number =       "??",
  pages =        "??--??",
  month =        jun,
  year =         "2025",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1016/j.comnet.2025.111282",
  ISSN =         "1389-1286 (print), 1872-7069 (electronic)",
  ISSN-L =       "1389-1286",
  bibdate =      "Fri May 9 06:02:42 MDT 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/compnetamsterdam2020.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.sciencedirect.com/science/article/pii/S1389128625002506",
  acknowledgement = ack-nhfb,
  articleno =    "111282",
  fjournal =     "Computer Networks (Amsterdam, Netherlands: 1999)",
  journal-URL =  "http://www.sciencedirect.com/science/journal/13891286/",
}


bibtype: inproceedings
filename: fparith.bib
label: Wang:2025:VLC
title: VEXP: A Low-Cost RISC-V ISA Extension for Accelerated Softmax Computation in Transformers
crossref: IEEE:2025:PIS
pages: 37--44
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00016
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawtitle: {VEXP}: A Low-Cost {RISC-V} {ISA} Extension for Accelerated Softmax Computation in Transformers
author:
Run Wang and Gamze Islamoglu and Andrea Belano and Viviane Potocnik and Francesco Conti and Angelo Garofalo and Luca Bonini

rawauthor:
Run Wang and Gamze Islamoglu and Andrea Belano and Viviane Potocnik and Francesco Conti and Angelo Garofalo and Luca Bonini

entry:
@InProceedings{Wang:2025:VLC,
  author =       "Run Wang and Gamze Islamoglu and Andrea Belano and
                 Viviane Potocnik and Francesco Conti and Angelo
                 Garofalo and Luca Bonini",
  title =        "{VEXP}: A Low-Cost {RISC-V} {ISA} Extension for
                 Accelerated Softmax Computation in Transformers",
  crossref =     "IEEE:2025:PIS",
  pages =        "37--44",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00016",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: article
filename: fparith.bib
label: Wen:2025:PPW
author: Chenyi Wen and Haonan Du and Jiayi Wang and Zhengrui Chen and Li Zhang and Qi Sun and Cheng Zhuo
journal: j-TODAES
volume: 30
number: 2
pages: 21:1--21:??
month: mar
monthnumber: 3
year: 2025
CODEN: ATASFO
DOI: https://doi.org/10.1145/3706634
ISSN: 1084-4309 (print), 1557-7309 (electronic) OR 10844309 (print), 15577309 (electronic)
ISSNL: 1084-4309 OR 10844309
bibdate: Thu Feb 13 06:21:20 MST 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/todaes.bib
bibtimestamp: 2025.02.13 06:21:20 MST
URL: https://dl.acm.org/doi/10.1145/3706634
fjournal: ACM Transactions on Design Automation of Electronic Systems
acknowledgement: ack-nhfb
ajournal: ACM Transact. Des. Automat. Electron. Syst.
articleno: 21
journalURL: https://dl.acm.org/loi/todaes
rawauthor: Chenyi Wen and Haonan Du and Jiayi Wang and Zhengrui Chen and Li Zhang and Qi Sun and Cheng Zhuo
title:
PACE: a Piece-Wise Approximate Floating-Point Divider with Runtime Configurability and High Energy Efficiency

abstract:
Approximate computing emerges as a viable solution to enhance energy efficiency in applications sensitive to human perception, particularly on edge devices. This work introduces a novel piece-wise approximate floating-point divider that boasts resource ldots 

rawabstract:
Approximate computing emerges as a viable solution to enhance energy efficiency in applications sensitive to human perception, particularly on edge devices. This work introduces a novel piece-wise approximate floating-point divider that boasts resource \ldots{}

rawtitle:
{PACE}: a Piece-Wise Approximate Floating-Point Divider with Runtime Configurability and High Energy Efficiency

entry:
@Article{Wen:2025:PPW,
  author =       "Chenyi Wen and Haonan Du and Jiayi Wang and Zhengrui
                 Chen and Li Zhang and Qi Sun and Cheng Zhuo",
  title =        "{PACE}: a Piece-Wise Approximate Floating-Point
                 Divider with Runtime Configurability and High Energy
                 Efficiency",
  journal =      j-TODAES,
  volume =       "30",
  number =       "2",
  pages =        "21:1--21:??",
  month =        mar,
  year =         "2025",
  CODEN =        "ATASFO",
  DOI =          "https://doi.org/10.1145/3706634",
  ISSN =         "1084-4309 (print), 1557-7309 (electronic)",
  ISSN-L =       "1084-4309",
  bibdate =      "Thu Feb 13 06:21:20 MST 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/todaes.bib",
  URL =          "https://dl.acm.org/doi/10.1145/3706634",
  abstract =     "Approximate computing emerges as a viable solution to
                 enhance energy efficiency in applications sensitive to
                 human perception, particularly on edge devices. This
                 work introduces a novel piece-wise approximate
                 floating-point divider that boasts resource \ldots{}",
  acknowledgement = ack-nhfb,
  ajournal =     "ACM Transact. Des. Automat. Electron. Syst.",
  articleno =    "21",
  fjournal =     "ACM Transactions on Design Automation of Electronic
                 Systems",
  journal-URL =  "https://dl.acm.org/loi/todaes",
}


bibtype: inproceedings
filename: fparith.bib
label: Wintersteiger:2025:FVI
author: Christoph M. Wintersteiger
crossref: IEEE:2025:PIS
pages: 157--160
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00032
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawauthor: Christoph M. Wintersteiger
title:
Formal Verification of the IEEE P3109 Standard for Binary Floating-Point Formats for Machine Learning

rawtitle:
Formal Verification of the {IEEE} {P3109} Standard for Binary Floating-Point Formats for Machine Learning

entry:
@InProceedings{Wintersteiger:2025:FVI,
  author =       "Christoph M. Wintersteiger",
  title =        "Formal Verification of the {IEEE} {P3109} Standard for
                 Binary Floating-Point Formats for Machine Learning",
  crossref =     "IEEE:2025:PIS",
  pages =        "157--160",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00032",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: article
filename: fparith.bib
label: Wu:2025:IFP
title: An Integer-Floating-Point Dual-Mode Gain-Cell Computing-in-Memory Macro for Advanced AI Edge Chips
journal: j-IEEE-J-SOLID-STATE-CIRCUITS
volume: 60
number: 1
pages: 158--170
year: 2025
CODEN: IJSCBC
DOI: https://doi.org/10.1109/JSSC.2024.3470215
ISSN: 0018-9200 (print), 1558-173X (electronic) OR 00189200 (print), 1558173X (electronic)
ISSNL: 0018-9200 OR 00189200
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Journal of Solid-State Circuits
acknowledgement: ack-nhfb
author:
Ping-Chun Wu and Win-San Khwa and Jui-Jen Wu and Jian-Wei Su and Chuan-Jia Jhang and Ho-Yu Chen and Zhao-En Ke and Ting-Chien Chiu and Jun-Ming Hsu and Chiao-Yen Cheng and Yu-Chen Chen and Chung-Chuan Lo and Ren-Shuo Liu and Chih-Cheng Hsieh and Kea-Tiong Tang and Meng-Fan Chang

keywords:
Accuracy; Adders; Arrays; Artificial intelligence; Artificial intelligence (AI); Common Information Model (computing); Computational efficiency; computing-in-memory (CIM); Energy consumption; Energy efficiency; FinFETs; gain cell (GC); In-memory computing; inference; multiply-and-accumulate (MAC)

rawauthor:
Ping-Chun Wu and Win-San Khwa and Jui-Jen Wu and Jian-Wei Su and Chuan-Jia Jhang and Ho-Yu Chen and Zhao-En Ke and Ting-Chien Chiu and Jun-Ming Hsu and Chiao-Yen Cheng and Yu-Chen Chen and Chung-Chuan Lo and Ren-Shuo Liu and Chih-Cheng Hsieh and Kea-Tiong Tang and Meng-Fan Chang

rawtitle:
An Integer-Floating-Point Dual-Mode Gain-Cell Computing-in-Memory Macro for Advanced {AI} Edge Chips

entry:
@Article{Wu:2025:IFP,
  author =       "Ping-Chun Wu and Win-San Khwa and Jui-Jen Wu and
                 Jian-Wei Su and Chuan-Jia Jhang and Ho-Yu Chen and
                 Zhao-En Ke and Ting-Chien Chiu and Jun-Ming Hsu and
                 Chiao-Yen Cheng and Yu-Chen Chen and Chung-Chuan Lo and
                 Ren-Shuo Liu and Chih-Cheng Hsieh and Kea-Tiong Tang
                 and Meng-Fan Chang",
  title =        "An Integer-Floating-Point Dual-Mode Gain-Cell
                 Computing-in-Memory Macro for Advanced {AI} Edge
                 Chips",
  journal =      j-IEEE-J-SOLID-STATE-CIRCUITS,
  volume =       "60",
  number =       "1",
  pages =        "158--170",
  year =         "2025",
  CODEN =        "IJSCBC",
  DOI =          "https://doi.org/10.1109/JSSC.2024.3470215",
  ISSN =         "0018-9200 (print), 1558-173X (electronic)",
  ISSN-L =       "0018-9200",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Journal of Solid-State Circuits",
  keywords =     "Accuracy; Adders; Arrays; Artificial intelligence;
                 Artificial intelligence (AI); Common Information Model
                 (computing); Computational efficiency;
                 computing-in-memory (CIM); Energy consumption; Energy
                 efficiency; FinFETs; gain cell (GC); In-memory
                 computing; inference; multiply-and-accumulate (MAC)",
}


bibtype: article
filename: fparith.bib
label: Wu:2025:TPM
author: Jiajun Wu and Mo Song and Jingmin Zhao and Yizhao Gao and Jia Li and Hayden Kwok-Hay So
journal: j-TRETS
volume: 18
number: 1
pages: 14:1--14:??
month: mar
monthnumber: 3
year: 2025
DOI: https://doi.org/10.1145/3714416
ISSN: 1936-7406 (print), 1936-7414 (electronic) OR 19367406 (print), 19367414 (electronic)
ISSNL: 1936-7406 OR 19367406
bibdate: Tue Mar 25 09:48:37 MDT 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/trets.bib
bibtimestamp: 2025.03.25 09:48:37 MDT
URL: https://dl.acm.org/doi/10.1145/3714416
fjournal: ACM Transactions on Reconfigurable Technology and Systems (TRETS)
acknowledgement: ack-nhfb
ajournal: ACM Trans. Reconfigurable Technol. Syst.
articleno: 14
journalURL: https://dl.acm.org/loi/trets
rawauthor: Jiajun Wu and Mo Song and Jingmin Zhao and Yizhao Gao and Jia Li and Hayden Kwok-Hay So
title:
TATAA: Programmable Mixed-Precision Transformer Acceleration with a Transformable Arithmetic Architecture

abstract:
Modern transformer-based deep neural networks present unique technical challenges for effective acceleration in real-world applications. Apart from the vast amount of linear operations needed due to their sizes, modern transformer models are increasingly reliance on precise non-linear computations that make traditional low-bitwidth quantization methods and fixed-dataflow matrix accelerators ineffective for end-to-end acceleration. To address this need to accelerate both linear and non-linear operations in a unified and programmable framework, this article introduces TATAA. TATAA employs 8-bit integer (int8) arithmetic for quantized linear layer operations through post-training quantization, while it relies on bfloat16 floating-point arithmetic to approximate non-linear layers of a transformer model. TATAA hardware features a transformable arithmetic architecture that supports both formats during runtime with minimal overhead, enabling it to switch between a systolic array mode for int8 matrix multiplications and a SIMD mode for vectorized bfloat16 operations. An end-to-end compiler is presented to enable flexible mapping from emerging transformer models to the proposed hardware. Experimental results indicate that our mixed-precision design incurs only 0.14% to 1.16% accuracy drop when compared with the pre-trained single-precision transformer models across a range of vision, language, and generative text applications. Our prototype implementation on the Alveo U280 FPGA currently achieves 2,935.2 GOPS throughput on linear layers and a maximum of 189.5 GFLOPS for non-linear operations, outperforming related works by up to in end-to-end throughput and $ 2.29 times $ in DSP efficiency, while achieving $ 2.19 times $ higher power efficiency than modern NVIDIA RTX4090 GPU.

rawabstract:
Modern transformer-based deep neural networks present unique technical challenges for effective acceleration in real-world applications. Apart from the vast amount of linear operations needed due to their sizes, modern transformer models are increasingly reliance on precise non-linear computations that make traditional low-bitwidth quantization methods and fixed-dataflow matrix accelerators ineffective for end-to-end acceleration. To address this need to accelerate both linear and non-linear operations in a unified and programmable framework, this article introduces TATAA. TATAA employs 8-bit integer (int8) arithmetic for quantized linear layer operations through post-training quantization, while it relies on bfloat16 floating-point arithmetic to approximate non-linear layers of a transformer model. TATAA hardware features a transformable arithmetic architecture that supports both formats during runtime with minimal overhead, enabling it to switch between a systolic array mode for int8 matrix multiplications and a SIMD mode for vectorized bfloat16 operations. An end-to-end compiler is presented to enable flexible mapping from emerging transformer models to the proposed hardware. Experimental results indicate that our mixed-precision design incurs only 0.14\% to 1.16\% accuracy drop when compared with the pre-trained single-precision transformer models across a range of vision, language, and generative text applications. Our prototype implementation on the Alveo U280 FPGA currently achieves 2,935.2 GOPS throughput on linear layers and a maximum of 189.5 GFLOPS for non-linear operations, outperforming related works by up to in end-to-end throughput and $ 2.29 \times $ in DSP efficiency, while achieving $ 2.19 \times $ higher power efficiency than modern NVIDIA RTX4090 GPU.

rawtitle:
{TATAA}: Programmable Mixed-Precision Transformer Acceleration with a Transformable Arithmetic Architecture

entry:
@Article{Wu:2025:TPM,
  author =       "Jiajun Wu and Mo Song and Jingmin Zhao and Yizhao Gao
                 and Jia Li and Hayden Kwok-Hay So",
  title =        "{TATAA}: Programmable Mixed-Precision Transformer
                 Acceleration with a Transformable Arithmetic
                 Architecture",
  journal =      j-TRETS,
  volume =       "18",
  number =       "1",
  pages =        "14:1--14:??",
  month =        mar,
  year =         "2025",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1145/3714416",
  ISSN =         "1936-7406 (print), 1936-7414 (electronic)",
  ISSN-L =       "1936-7406",
  bibdate =      "Tue Mar 25 09:48:37 MDT 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/trets.bib",
  URL =          "https://dl.acm.org/doi/10.1145/3714416",
  abstract =     "Modern transformer-based deep neural networks present
                 unique technical challenges for effective acceleration
                 in real-world applications. Apart from the vast amount
                 of linear operations needed due to their sizes, modern
                 transformer models are increasingly reliance on precise
                 non-linear computations that make traditional
                 low-bitwidth quantization methods and fixed-dataflow
                 matrix accelerators ineffective for end-to-end
                 acceleration. To address this need to accelerate both
                 linear and non-linear operations in a unified and
                 programmable framework, this article introduces TATAA.
                 TATAA employs 8-bit integer (int8) arithmetic for
                 quantized linear layer operations through post-training
                 quantization, while it relies on bfloat16
                 floating-point arithmetic to approximate non-linear
                 layers of a transformer model. TATAA hardware features
                 a transformable arithmetic architecture that supports
                 both formats during runtime with minimal overhead,
                 enabling it to switch between a systolic array mode for
                 int8 matrix multiplications and a SIMD mode for
                 vectorized bfloat16 operations. An end-to-end compiler
                 is presented to enable flexible mapping from emerging
                 transformer models to the proposed hardware.
                 Experimental results indicate that our mixed-precision
                 design incurs only 0.14\% to 1.16\% accuracy drop when
                 compared with the pre-trained single-precision
                 transformer models across a range of vision, language,
                 and generative text applications. Our prototype
                 implementation on the Alveo U280 FPGA currently
                 achieves 2,935.2 GOPS throughput on linear layers and a
                 maximum of 189.5 GFLOPS for non-linear operations,
                 outperforming related works by up to in end-to-end
                 throughput and $ 2.29 \times $ in DSP efficiency, while
                 achieving $ 2.19 \times $ higher power efficiency than
                 modern NVIDIA RTX4090 GPU.",
  acknowledgement = ack-nhfb,
  ajournal =     "ACM Trans. Reconfigurable Technol. Syst.",
  articleno =    "14",
  fjournal =     "ACM Transactions on Reconfigurable Technology and
                 Systems (TRETS)",
  journal-URL =  "https://dl.acm.org/loi/trets",
}


bibtype: article
filename: fparith.bib
label: Xie:2025:FFL
title: FLALM: a Flexible Low Area-Latency Montgomery Modular Multiplication on FPGA
journal: j-IEEE-TRANS-COMPUT
volume: 74
number: 1
pages: 29--42
month: jan
monthnumber: 1
year: 2025
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2024.3457739
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Fri Mar 14 07:34:19 2025
bibtimestamp: 2025.03.14 07:34:19 ???
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
ajournal: IEEE Trans. Comput.
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawtitle: {FLALM}: a Flexible Low Area-Latency {Montgomery} Modular Multiplication on {FPGA}
author:
Yujun Xie and Yuan Liu and Xin Zheng and Bohan Lan and Dengyun Lei and Dehao Xiang and Shuting Cai and Xiaoming Xiong

keywords:
Adders; Computers; Cryptography; Delays; Field programmable gate arrays; finely integrated product scanning; generic Montgomery modular multiplication; Hardware acceleration; Hazards; Montgomery modular multiplication; Schedules; square Montgomery modular multiplication

rawauthor:
Yujun Xie and Yuan Liu and Xin Zheng and Bohan Lan and Dengyun Lei and Dehao Xiang and Shuting Cai and Xiaoming Xiong

entry:
@Article{Xie:2025:FFL,
  author =       "Yujun Xie and Yuan Liu and Xin Zheng and Bohan Lan and
                 Dengyun Lei and Dehao Xiang and Shuting Cai and
                 Xiaoming Xiong",
  title =        "{FLALM}: a Flexible Low Area-Latency {Montgomery}
                 Modular Multiplication on {FPGA}",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "74",
  number =       "1",
  pages =        "29--42",
  month =        jan,
  year =         "2025",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2024.3457739",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Fri Mar 14 07:34:19 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2020.bib",
  acknowledgement = ack-nhfb,
  ajournal =     "IEEE Trans. Comput.",
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "Adders; Computers; Cryptography; Delays; Field
                 programmable gate arrays; finely integrated product
                 scanning; generic Montgomery modular multiplication;
                 Hardware acceleration; Hazards; Montgomery modular
                 multiplication; Schedules; square Montgomery modular
                 multiplication",
}


bibtype: article
filename: fparith.bib
label: Xiong:2025:DLC
author: Botao Xiong and Xingyu Shao and Chang Liu and Shize Zhang and Yuchun Chang
title: Design of Low-Cost and High-Accurate 8-bit Logarithmic Floating-Point Arithmetic Circuits
journal: j-IEEE-TRANS-VLSI-SYST
volume: 33
number: 7
pages: 2094--2098
year: 2025
CODEN: IEVSE9
DOI: https://doi.org/10.1109/TVLSI.2025.3563950
ISSN: 1063-8210 (print), 1557-9999 (electronic) OR 10638210 (print), 15579999 (electronic)
ISSNL: 1063-8210 OR 10638210
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Transactions on Very Large Scale Integration (VLSI) Systems
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/issues?punumber=92
rawauthor: Botao Xiong and Xingyu Shao and Chang Liu and Shize Zhang and Yuchun Chang
rawtitle: Design of Low-Cost and High-Accurate 8-bit Logarithmic Floating-Point Arithmetic Circuits
keywords:
Accuracy; Arithmetic; Convolution; Costs; Deep learning; Delays; Division; Hands; Hardware; image change detection; logarithmic number system (LNS); low bit-width floating-point (FP) representation; multiplication; neural networks; Standards; Very large scale integration

entry:
@Article{Xiong:2025:DLC,
  author =       "Botao Xiong and Xingyu Shao and Chang Liu and Shize
                 Zhang and Yuchun Chang",
  title =        "Design of Low-Cost and High-Accurate 8-bit Logarithmic
                 Floating-Point Arithmetic Circuits",
  journal =      j-IEEE-TRANS-VLSI-SYST,
  volume =       "33",
  number =       "7",
  pages =        "2094--2098",
  year =         "2025",
  CODEN =        "IEVSE9",
  DOI =          "https://doi.org/10.1109/TVLSI.2025.3563950",
  ISSN =         "1063-8210 (print), 1557-9999 (electronic)",
  ISSN-L =       "1063-8210",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Very Large Scale Integration
                 (VLSI) Systems",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/issues?punumber=92",
  keywords =     "Accuracy; Arithmetic; Convolution; Costs; Deep
                 learning; Delays; Division; Hands; Hardware; image
                 change detection; logarithmic number system (LNS); low
                 bit-width floating-point (FP) representation;
                 multiplication; neural networks; Standards; Very large
                 scale integration",
}


bibtype: inproceedings
filename: fparith.bib
label: Yang:2025:ESM
title: An Empirical Study of Microscaling Formats for Low-Precision LLM Training
crossref: IEEE:2025:PIS
pages: 1--8
year: 2025
DOI: https://doi.org/10.1109/arith64983.2025.00011
bibdate: Thu Nov 13 12:36:40 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.11.13 12:36:40 ???
keywords: ARITH 2025; ARITH-32
acknowledgement: ack-nhfb
rawtitle: An Empirical Study of Microscaling Formats for Low-Precision {LLM} Training
author:
Hanmei Yang and Summer Deng and Amit Nagpal and Maxim Naumov and Mohammad Janani and Tongping Liu and Hui Guan

rawauthor:
Hanmei Yang and Summer Deng and Amit Nagpal and Maxim Naumov and Mohammad Janani and Tongping Liu and Hui Guan

entry:
@InProceedings{Yang:2025:ESM,
  author =       "Hanmei Yang and Summer Deng and Amit Nagpal and Maxim
                 Naumov and Mohammad Janani and Tongping Liu and Hui
                 Guan",
  title =        "An Empirical Study of Microscaling Formats for
                 Low-Precision {LLM} Training",
  crossref =     "IEEE:2025:PIS",
  pages =        "1--8",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/arith64983.2025.00011",
  bibdate =      "Thu Nov 13 12:36:40 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "ARITH 2025; ARITH-32",
}


bibtype: article
filename: fparith.bib
label: Zhang:2025:HIB
author: Xiaohui Zhang and Zenghui Yu and Shushan Qiao and Yi Zhan
journal: j-IEEE-ACCESS
volume: 13
pages: 106989--106997
year: 2025
DOI: https://doi.org/10.1109/ACCESS.2025.3578531
ISSN: 2169-3536 OR 21693536
ISSNL: 2169-3536 OR 21693536
bibdate: Tue Sep 30 17:30:28 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.09.30 17:30:28 ???
fjournal: IEEE Access
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639
rawauthor: Xiaohui Zhang and Zenghui Yu and Shushan Qiao and Yi Zhan
title:
Hardware Implementation of Block Floating-Point FFT Based on Approximate Computation and Conflict-Free Access

keywords:
Approximate computing; Approximation algorithms; block floating-point; Computational efficiency; Computer architecture; conflict-free access; Fast Fourier transforms; Hardware; Memory management; memory-based fast Fourier transform FFT; mixed radix; Power demand; Random access memory; Read only memory; Throughput

rawtitle:
Hardware Implementation of Block Floating-Point {FFT} Based on Approximate Computation and Conflict-Free Access

entry:
@Article{Zhang:2025:HIB,
  author =       "Xiaohui Zhang and Zenghui Yu and Shushan Qiao and Yi
                 Zhan",
  title =        "Hardware Implementation of Block Floating-Point {FFT}
                 Based on Approximate Computation and Conflict-Free
                 Access",
  journal =      j-IEEE-ACCESS,
  volume =       "13",
  pages =        "106989--106997",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/ACCESS.2025.3578531",
  ISSN =         "2169-3536",
  ISSN-L =       "2169-3536",
  bibdate =      "Tue Sep 30 17:30:28 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Access",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639",
  keywords =     "Approximate computing; Approximation algorithms; block
                 floating-point; Computational efficiency; Computer
                 architecture; conflict-free access; Fast Fourier
                 transforms; Hardware; Memory management; memory-based
                 fast Fourier transform FFT; mixed radix; Power demand;
                 Random access memory; Read only memory; Throughput",
}


bibtype: article
filename: fparith.bib
label: Zhao:2025:HHF
author: Yuanzhe Zhao and Yang Wang and Rui P. Martins and Chi-Hang Chan and Shouyi Yin and Minglei Zhang
journal: j-IEEE-J-SOLID-STATE-CIRCUITS
pages: 1--14
year: 2025
CODEN: IJSCBC
DOI: https://doi.org/10.1109/JSSC.2025.3599079
ISSN: 0018-9200 (print), 1558-173X (electronic) OR 00189200 (print), 1558173X (electronic)
ISSNL: 0018-9200 OR 00189200
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Journal of Solid-State Circuits
acknowledgement: ack-nhfb
rawauthor: Yuanzhe Zhao and Yang Wang and Rui P. Martins and Chi-Hang Chan and Shouyi Yin and Minglei Zhang
title:
A Hierarchical-Hybrid Floating-Point Compute-in-Memory Macro Using FP-DAC and FP-ADC for Edge-AI Devices

keywords:
Accuracy; Analog-digital conversion; Computational efficiency; Compute-in-memory (CIM); Digital-analog conversion; Energy efficiency; floating point (FP); FP analog-to-digital converter (FP-ADC); FP digital-to-analog converter (FP-DAC); hybrid; In-memory computing; multiply-and-accumulate (MAC); Parallel processing; Power demand; Quantization (signal); Throughput

rawtitle:
A Hierarchical-Hybrid Floating-Point Compute-in-Memory Macro Using {FP-DAC} and {FP-ADC} for {Edge-AI} Devices

entry:
@Article{Zhao:2025:HHF,
  author =       "Yuanzhe Zhao and Yang Wang and Rui P. Martins and
                 Chi-Hang Chan and Shouyi Yin and Minglei Zhang",
  title =        "A Hierarchical-Hybrid Floating-Point Compute-in-Memory
                 Macro Using {FP-DAC} and {FP-ADC} for {Edge-AI}
                 Devices",
  journal =      j-IEEE-J-SOLID-STATE-CIRCUITS,
  pages =        "1--14",
  year =         "2025",
  CODEN =        "IJSCBC",
  DOI =          "https://doi.org/10.1109/JSSC.2025.3599079",
  ISSN =         "0018-9200 (print), 1558-173X (electronic)",
  ISSN-L =       "0018-9200",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Journal of Solid-State Circuits",
  keywords =     "Accuracy; Analog-digital conversion; Computational
                 efficiency; Compute-in-memory (CIM); Digital-analog
                 conversion; Energy efficiency; floating point (FP); FP
                 analog-to-digital converter (FP-ADC); FP
                 digital-to-analog converter (FP-DAC); hybrid; In-memory
                 computing; multiply-and-accumulate (MAC); Parallel
                 processing; Power demand; Quantization (signal);
                 Throughput",
}


bibtype: article
filename: fparith.bib
label: Zhao:2025:ISS
author: Gaoyang Zhao and Junzhong Shen and Rongzhen Lin and Hua Li and Yaohua Wang
title: ISOAcc: In-situ Shift Operation-based Accelerator For Efficient in-SRAM Multiplication
journal: j-TODAES
volume: 30
number: 2
pages: 22:1--22:??
month: mar
monthnumber: 3
year: 2025
CODEN: ATASFO
DOI: https://doi.org/10.1145/3707205
ISSN: 1084-4309 (print), 1557-7309 (electronic) OR 10844309 (print), 15577309 (electronic)
ISSNL: 1084-4309 OR 10844309
bibdate: Thu Feb 13 06:21:20 MST 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/todaes.bib
bibtimestamp: 2025.02.13 06:21:20 MST
URL: https://dl.acm.org/doi/10.1145/3707205
fjournal: ACM Transactions on Design Automation of Electronic Systems
acknowledgement: ack-nhfb
ajournal: ACM Transact. Des. Automat. Electron. Syst.
articleno: 22
journalURL: https://dl.acm.org/loi/todaes
rawauthor: Gaoyang Zhao and Junzhong Shen and Rongzhen Lin and Hua Li and Yaohua Wang
rawtitle: {ISOAcc}: In-situ Shift Operation-based Accelerator For Efficient in-{SRAM} Multiplication
abstract:
Digital SRAM-based CIM architectures must balance three critical factors: quantized neural network bitwidth, accuracy loss, and computational efficiency, each crucial to optimizing performance and efficiency. In Domain Specific Accelerators (DSAs), flexible and specific hardware design, when incorporated with tailored Power-of-2 (P-2) quantization schemes, addresses this issue. However, in CIMs, the absence of flexible and specific hardware to support dynamic switching between general and tailored quantization schemes hinders the adoption of efficient quantization methods. In this article, we propose the In-situ Shift Operation based Accelerator (ISOAcc) for efficient SRAM-based multiplication. The key idea is to introduce transmission gates near the SRAM array to enable the selection of bits from either the same or the neighbor line when data flows from one row to another. This functionally equals a shift operation. By configuring the transmission gates array in a cascade manner, ISOAcc can support 0 to 15-bit shift with a negligible overhead. The ISOAcc can directly leverage P-2 quantization schemes in hardware, thereby greatly reducing multiplication cycles. We have chosen five well-known neural networks to evaluate ISOAcc. The evaluations show that ISOAcc achieves an average performance improvement of 3.24 $ times $ and an energy reduction of 75%, compared with the state-of-the-art (SOTA) SRAM-based CIM design, Bit-Parallel.

rawabstract:
Digital SRAM-based CIM architectures must balance three critical factors: quantized neural network bitwidth, accuracy loss, and computational efficiency, each crucial to optimizing performance and efficiency. In Domain Specific Accelerators (DSAs), flexible and specific hardware design, when incorporated with tailored Power-of-2 (P-2) quantization schemes, addresses this issue. However, in CIMs, the absence of flexible and specific hardware to support dynamic switching between general and tailored quantization schemes hinders the adoption of efficient quantization methods. In this article, we propose the In-situ Shift Operation based Accelerator (ISOAcc) for efficient SRAM-based multiplication. The key idea is to introduce transmission gates near the SRAM array to enable the selection of bits from either the same or the neighbor line when data flows from one row to another. This functionally equals a shift operation. By configuring the transmission gates array in a cascade manner, ISOAcc can support 0 to 15-bit shift with a negligible overhead. The ISOAcc can directly leverage P-2 quantization schemes in hardware, thereby greatly reducing multiplication cycles. We have chosen five well-known neural networks to evaluate ISOAcc. The evaluations show that ISOAcc achieves an average performance improvement of 3.24 $ \times $ and an energy reduction of 75\%, compared with the state-of-the-art (SOTA) SRAM-based CIM design, Bit-Parallel.

entry:
@Article{Zhao:2025:ISS,
  author =       "Gaoyang Zhao and Junzhong Shen and Rongzhen Lin and
                 Hua Li and Yaohua Wang",
  title =        "{ISOAcc}: In-situ Shift Operation-based Accelerator
                 For Efficient in-{SRAM} Multiplication",
  journal =      j-TODAES,
  volume =       "30",
  number =       "2",
  pages =        "22:1--22:??",
  month =        mar,
  year =         "2025",
  CODEN =        "ATASFO",
  DOI =          "https://doi.org/10.1145/3707205",
  ISSN =         "1084-4309 (print), 1557-7309 (electronic)",
  ISSN-L =       "1084-4309",
  bibdate =      "Thu Feb 13 06:21:20 MST 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/todaes.bib",
  URL =          "https://dl.acm.org/doi/10.1145/3707205",
  abstract =     "Digital SRAM-based CIM architectures must balance
                 three critical factors: quantized neural network
                 bitwidth, accuracy loss, and computational efficiency,
                 each crucial to optimizing performance and efficiency.
                 In Domain Specific Accelerators (DSAs), flexible and
                 specific hardware design, when incorporated with
                 tailored Power-of-2 (P-2) quantization schemes,
                 addresses this issue. However, in CIMs, the absence of
                 flexible and specific hardware to support dynamic
                 switching between general and tailored quantization
                 schemes hinders the adoption of efficient quantization
                 methods. In this article, we propose the In-situ Shift
                 Operation based Accelerator (ISOAcc) for efficient
                 SRAM-based multiplication. The key idea is to introduce
                 transmission gates near the SRAM array to enable the
                 selection of bits from either the same or the neighbor
                 line when data flows from one row to another. This
                 functionally equals a shift operation. By configuring
                 the transmission gates array in a cascade manner,
                 ISOAcc can support 0 to 15-bit shift with a negligible
                 overhead. The ISOAcc can directly leverage P-2
                 quantization schemes in hardware, thereby greatly
                 reducing multiplication cycles. We have chosen five
                 well-known neural networks to evaluate ISOAcc. The
                 evaluations show that ISOAcc achieves an average
                 performance improvement of 3.24 $ \times $ and an
                 energy reduction of 75\%, compared with the
                 state-of-the-art (SOTA) SRAM-based CIM design,
                 Bit-Parallel.",
  acknowledgement = ack-nhfb,
  ajournal =     "ACM Transact. Des. Automat. Electron. Syst.",
  articleno =    "22",
  fjournal =     "ACM Transactions on Design Automation of Electronic
                 Systems",
  journal-URL =  "https://dl.acm.org/loi/todaes",
}


bibtype: inproceedings
filename: fparith.bib
label: Zhao:2025:OSF
booktitle: 2025 IEEE Custom Integrated Circuits Conference (CICC)
publisher: pub-IEEE
address: pub-IEEE:adr
pages: 1--3
year: 2025
DOI: https://doi.org/10.1109/CICC63670.2025.10982833
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
acknowledgement: ack-nhfb
rawbooktitle: {2025 IEEE Custom Integrated Circuits Conference (CICC)}
author:
Yuanzhe Zhao and Heng Xie and Zijian Wang and Chunlin Tian and Li Li and Yan Zhu and R. P. Martins and Chi-Hang Chan and Minglei Zhang

title:
A One-Shot Floating-Point Compute-in-Memory Macro Featuring PVT Robustness and Mismatch Tolerance for Edge LLMs

keywords:
Accuracy; Large language models; Power demand; Privacy; Productivity; Quantization (signal); Real-time systems; Robustness; Throughput; Transformers

rawauthor:
Yuanzhe Zhao and Heng Xie and Zijian Wang and Chunlin Tian and Li Li and Yan Zhu and R. P. Martins and Chi-Hang Chan and Minglei Zhang

rawtitle:
A One-Shot Floating-Point Compute-in-Memory Macro Featuring {PVT} Robustness and Mismatch Tolerance for Edge {LLMs}

entry:
@InProceedings{Zhao:2025:OSF,
  author =       "Yuanzhe Zhao and Heng Xie and Zijian Wang and Chunlin
                 Tian and Li Li and Yan Zhu and R. P. Martins and
                 Chi-Hang Chan and Minglei Zhang",
  booktitle =    "{2025 IEEE Custom Integrated Circuits Conference
                 (CICC)}",
  title =        "A One-Shot Floating-Point Compute-in-Memory Macro
                 Featuring {PVT} Robustness and Mismatch Tolerance for
                 Edge {LLMs}",
  publisher =    pub-IEEE,
  address =      pub-IEEE:adr,
  pages =        "1--3",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/CICC63670.2025.10982833",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  keywords =     "Accuracy; Large language models; Power demand;
                 Privacy; Productivity; Quantization (signal); Real-time
                 systems; Robustness; Throughput; Transformers",
}


bibtype: article
filename: fparith.bib
label: Zhao:2025:SCS
author: Gaoyang Zhao and Qiuran Li and Rongzhen Lin and Yaohua Wang
journal: j-TACO
volume: 22
number: 2
pages: 59:1--59:??
month: jun
monthnumber: 6
year: 2025
DOI: https://doi.org/10.1145/3719654
ISSN: 1544-3566 (print), 1544-3973 (electronic) OR 15443566 (print), 15443973 (electronic)
ISSNL: 1544-3566 OR 15443566
bibdate: Thu Jul 3 06:51:03 MDT 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/taco.bib
bibtimestamp: 2025.07.03 06:51:03 MDT
fjournal: ACM Transactions on Architecture and Code Optimization (TACO)
acknowledgement: ack-nhfb
ajournal: ACM Trans. Archit. Code Optim.
articleno: 59
journalURL: https://dl.acm.org/loi/taco
rawauthor: Gaoyang Zhao and Qiuran Li and Rongzhen Lin and Yaohua Wang
title:
Shift-CIM: In-SRAM Alignment To Support General-Purpose Bit-level Sparsity Exploration in SRAM Multiplication

abstract:
Multiplication plays a critical role in SRAM-based Computing-in-Memory (CIM) architectures. However, current SRAM-based CIMs face three major limitations. First, they do not fully exploit bit-level sparsity, resulting in unnecessary overhead in both ldots 

rawabstract:
Multiplication plays a critical role in SRAM-based Computing-in-Memory (CIM) architectures. However, current SRAM-based CIMs face three major limitations. First, they do not fully exploit bit-level sparsity, resulting in unnecessary overhead in both \ldots{}

rawtitle:
{Shift-CIM}: {In-SRAM} Alignment To Support General-Purpose Bit-level Sparsity Exploration in {SRAM} Multiplication

entry:
@Article{Zhao:2025:SCS,
  author =       "Gaoyang Zhao and Qiuran Li and Rongzhen Lin and Yaohua
                 Wang",
  title =        "{Shift-CIM}: {In-SRAM} Alignment To Support
                 General-Purpose Bit-level Sparsity Exploration in
                 {SRAM} Multiplication",
  journal =      j-TACO,
  volume =       "22",
  number =       "2",
  pages =        "59:1--59:??",
  month =        jun,
  year =         "2025",
  CODEN =        "????",
  DOI =          "https://doi.org/10.1145/3719654",
  ISSN =         "1544-3566 (print), 1544-3973 (electronic)",
  ISSN-L =       "1544-3566",
  bibdate =      "Thu Jul 3 06:51:03 MDT 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/taco.bib",
  abstract =     "Multiplication plays a critical role in SRAM-based
                 Computing-in-Memory (CIM) architectures. However,
                 current SRAM-based CIMs face three major limitations.
                 First, they do not fully exploit bit-level sparsity,
                 resulting in unnecessary overhead in both \ldots{}",
  acknowledgement = ack-nhfb,
  ajournal =     "ACM Trans. Archit. Code Optim.",
  articleno =    "59",
  fjournal =     "ACM Transactions on Architecture and Code Optimization
                 (TACO)",
  journal-URL =  "https://dl.acm.org/loi/taco",
}


bibtype: article
filename: fparith.bib
label: Zhou:2025:BDC
journal: j-IEEE-TRANS-CIRCUITS-SYST-II-EXPRESS-BRIEFS
volume: 72
number: 4
pages: 608--612
year: 2025
DOI: https://doi.org/10.1109/TCSII.2025.3541101
ISSN: 1549-7747 (print), 1558-3791 (electronic) OR 15497747 (print), 15583791 (electronic)
ISSNL: 1549-7747 OR 15497747
bibdate: Wed Oct 1 06:40:18 2025
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Transactions on Circuits and Systems II: Express Briefs
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/issues?punumber=8920
author:
Yang Zhou and Yang Wang and Wenxin Yin and Yazheng Jiang and Jingchuan Wei and Yubin Qin and Yang Hu and Shaojun Wei and Shouyi Yin

title:
BeaCIM: a Digital Compute-in-Memory DNN Processor With Bi-Directional Exponent Alignment for FP8 Training

keywords:
Accuracy; Artificial neural networks; Bidirectional control; Calculators; Compute-in-memory; Computer architecture; DNN training; Energy efficiency; FP8; Hardware; Technological innovation; Tensors; Training

rawauthor:
Yang Zhou and Yang Wang and Wenxin Yin and Yazheng Jiang and Jingchuan Wei and Yubin Qin and Yang Hu and Shaojun Wei and Shouyi Yin

rawtitle:
{BeaCIM}: a Digital Compute-in-Memory {DNN} Processor With Bi-Directional Exponent Alignment for {FP8} Training

entry:
@Article{Zhou:2025:BDC,
  author =       "Yang Zhou and Yang Wang and Wenxin Yin and Yazheng
                 Jiang and Jingchuan Wei and Yubin Qin and Yang Hu and
                 Shaojun Wei and Shouyi Yin",
  title =        "{BeaCIM}: a Digital Compute-in-Memory {DNN} Processor
                 With Bi-Directional Exponent Alignment for {FP8}
                 Training",
  journal =      j-IEEE-TRANS-CIRCUITS-SYST-II-EXPRESS-BRIEFS,
  volume =       "72",
  number =       "4",
  pages =        "608--612",
  year =         "2025",
  DOI =          "https://doi.org/10.1109/TCSII.2025.3541101",
  ISSN =         "1549-7747 (print), 1558-3791 (electronic)",
  ISSN-L =       "1549-7747",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Circuits and Systems II: Express
                 Briefs",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/issues?punumber=8920",
  keywords =     "Accuracy; Artificial neural networks; Bidirectional
                 control; Calculators; Compute-in-memory; Computer
                 architecture; DNN training; Energy efficiency; FP8;
                 Hardware; Technological innovation; Tensors; Training",
}


bibtype: article
filename: fparith.bib
label: Zhu:2025:BSA
author: Zixuan Zhu and Xiaolong Zhou and Chundong Wang and Li Tian and Zunkai Huang and Yongxin Zhu
title: Bit-Sparsity Aware Acceleration With Compact CSD Code on Generic Matrix Multiplication
journal: j-IEEE-TRANS-COMPUT
volume: 74
number: 2
pages: 414--426
year: 2025
CODEN: ITCOB4
DOI: https://doi.org/10.1109/TC.2024.3483632
ISSN: 0018-9340 (print), 1557-9956 (electronic) OR 00189340 (print), 15579956 (electronic)
ISSNL: 0018-9340 OR 00189340
bibdate: Wed Oct 1 06:40:18 2025
bibtimestamp: 2025.10.01 06:40:18 ???
fjournal: IEEE Transactions on Computers
acknowledgement: ack-nhfb
journalURL: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12
rawauthor: Zixuan Zhu and Xiaolong Zhou and Chundong Wang and Li Tian and Zunkai Huang and Yongxin Zhu
rawtitle: Bit-Sparsity Aware Acceleration With Compact {CSD} Code on Generic Matrix Multiplication
keywords:
Accuracy; Bit-level sparsity; canonical signed digit; Codes; Computers; Encoding; floating point; Hamming weight; hardware acceleration; matrix multiplication; Software; System-on-chip; Throughput; Transformers; Vectors

entry:
@Article{Zhu:2025:BSA,
  author =       "Zixuan Zhu and Xiaolong Zhou and Chundong Wang and Li
                 Tian and Zunkai Huang and Yongxin Zhu",
  title =        "Bit-Sparsity Aware Acceleration With Compact {CSD}
                 Code on Generic Matrix Multiplication",
  journal =      j-IEEE-TRANS-COMPUT,
  volume =       "74",
  number =       "2",
  pages =        "414--426",
  year =         "2025",
  CODEN =        "ITCOB4",
  DOI =          "https://doi.org/10.1109/TC.2024.3483632",
  ISSN =         "0018-9340 (print), 1557-9956 (electronic)",
  ISSN-L =       "0018-9340",
  bibdate =      "Wed Oct 1 06:40:18 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/ieeetranscomput2020.bib",
  acknowledgement = ack-nhfb,
  fjournal =     "IEEE Transactions on Computers",
  journal-URL =  "https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=12",
  keywords =     "Accuracy; Bit-level sparsity; canonical signed digit;
                 Codes; Computers; Encoding; floating point; Hamming
                 weight; hardware acceleration; matrix multiplication;
                 Software; System-on-chip; Throughput; Transformers;
                 Vectors",
}


bibtype: article
filename: fparith.bib
label: Zou:2025:REA
author: Qinmeng Zou
title: Rounding Error Analysis of the Inverse Compact WY Modified Gram--Schmidt Algorithms
journal: j-SIAM-J-MAT-ANA-APPL
volume: 46
number: 1
pages: 726--747
year: 2025
CODEN: SJMAEL
DOI: https://doi.org/10.1137/24M1655482
ISSN: 0895-4798 (print), 1095-7162 (electronic) OR 08954798 (print), 10957162 (electronic)
ISSNL: 0895-4798 OR 08954798
bibdate: Thu Oct 16 12:49:38 MDT 2025
bibtimestamp: 2025.10.16 12:49:38 MDT
URL: https://epubs.siam.org/doi/10.1137/24M1655482
fjournal: SIAM Journal on Matrix Analysis and Applications
acknowledgement: ack-nhfb
journalURL: http://epubs.siam.org/simax
rawauthor: Qinmeng Zou
rawtitle: Rounding Error Analysis of the Inverse Compact {WY} Modified {Gram--Schmidt} Algorithms
bibsource:
http://epubs.siam.org/sam-bin/dbq/toc/SIMAX/46/1; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/siamjmatanaappl.bib

entry:
@Article{Zou:2025:REA,
  author =       "Qinmeng Zou",
  title =        "Rounding Error Analysis of the Inverse Compact {WY}
                 Modified {Gram--Schmidt} Algorithms",
  journal =      j-SIAM-J-MAT-ANA-APPL,
  volume =       "46",
  number =       "1",
  pages =        "726--747",
  month =        "????",
  year =         "2025",
  CODEN =        "SJMAEL",
  DOI =          "https://doi.org/10.1137/24M1655482",
  ISSN =         "0895-4798 (print), 1095-7162 (electronic)",
  ISSN-L =       "0895-4798",
  bibdate =      "Thu Oct 16 12:49:38 MDT 2025",
  bibsource =    "http://epubs.siam.org/sam-bin/dbq/toc/SIMAX/46/1;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/siamjmatanaappl.bib",
  URL =          "https://epubs.siam.org/doi/10.1137/24M1655482",
  acknowledgement = ack-nhfb,
  fjournal =     "SIAM Journal on Matrix Analysis and Applications",
  journal-URL =  "http://epubs.siam.org/simax",
}


bibtype: article
filename: fparith.bib
label: Attanayake:2026:FPC
author: Ruvini Attanayake and Umesh C. Roy and Abhiyan Pandit and Angelo Bongiorno
title: First-principles calculation of higher-order elastic constants from divided differences
journal: j-COMP-PHYS-COMM
volume: 318
pages: ??--??
month: jan
monthnumber: 1
year: 2026
CODEN: CPHCBZ
DOI: https://doi.org/10.1016/j.cpc.2025.109877
ISSN: 0010-4655 (print), 1879-2944 (electronic) OR 00104655 (print), 18792944 (electronic)
ISSNL: 0010-4655 OR 00104655
bibdate: Mon Nov 3 13:41:44 MST 2025
bibtimestamp: 2025.11.03 13:41:44 MST
URL: http://www.sciencedirect.com/science/article/pii/S0010465525003790
fjournal: Computer Physics Communications
acknowledgement: ack-nhfb
ajournal: Comput. Phys. Commun.
articleno: 109877
journalURL: http://www.sciencedirect.com/science/journal/00104655
rawauthor: Ruvini Attanayake and Umesh C. Roy and Abhiyan Pandit and Angelo Bongiorno
rawtitle: First-principles calculation of higher-order elastic constants from divided differences
bibsource:
https://www.math.utah.edu/pub/tex/bib/compphyscomm2020.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib

entry:
@Article{Attanayake:2026:FPC,
  author =       "Ruvini Attanayake and Umesh C. Roy and Abhiyan Pandit
                 and Angelo Bongiorno",
  title =        "First-principles calculation of higher-order elastic
                 constants from divided differences",
  journal =      j-COMP-PHYS-COMM,
  volume =       "318",
  number =       "??",
  pages =        "??--??",
  month =        jan,
  year =         "2026",
  CODEN =        "CPHCBZ",
  DOI =          "https://doi.org/10.1016/j.cpc.2025.109877",
  ISSN =         "0010-4655 (print), 1879-2944 (electronic)",
  ISSN-L =       "0010-4655",
  bibdate =      "Mon Nov 3 13:41:44 MST 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/compphyscomm2020.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.sciencedirect.com/science/article/pii/S0010465525003790",
  acknowledgement = ack-nhfb,
  ajournal =     "Comput. Phys. Commun.",
  articleno =    "109877",
  fjournal =     "Computer Physics Communications",
  journal-URL =  "http://www.sciencedirect.com/science/journal/00104655",
}


bibtype: article
filename: fparith.bib
label: Brisebarre:2026:CRE
author: Nicolas Brisebarre and Guillaume Hanrot and Jean-Michel Muller and Paul Zimmermann
title: Correctly-Rounded Evaluation of a Function: Why, How, and at What Cost?
journal: j-COMP-SURV
volume: 58
number: 1
pages: 27:1--27:34
month: jan
monthnumber: 1
year: 2026
CODEN: CMSVAN
DOI: https://doi.org/10.1145/3747840
ISSN: 0360-0300 (print), 1557-7341 (electronic) OR 03600300 (print), 15577341 (electronic)
ISSNL: 0360-0300 OR 03600300
bibdate: Fri Oct 24 10:49:56 MDT 2025
bibtimestamp: 2025.10.24 10:49:56 MDT
fjournal: ACM Computing Surveys
acknowledgement: ack-nhfb
ajournal: ACM Comput. Surv.
articleno: 27
journalURL: https://dl.acm.org/loi/csur
rawauthor: Nicolas Brisebarre and Guillaume Hanrot and Jean-Michel Muller and Paul Zimmermann
rawtitle: Correctly-Rounded Evaluation of a Function: Why, How, and at What Cost?
abstract:
The goal of this article is to give a survey on the various computational and mathematical issues and progress related to the problem of providing efficient correctly rounded elementary functions in floating-point arithmetic. We also aim at convincing the reader that a future standard for floating-point arithmetic should require the availability of a correctly rounded version of a well-chosen core set of elementary functions. We discuss the interest and feasibility of this requirement.

rawabstract:
The goal of this article is to give a survey on the various computational and mathematical issues and progress related to the problem of providing efficient correctly rounded elementary functions in floating-point arithmetic. We also aim at convincing the reader that a future standard for floating-point arithmetic should require the availability of a correctly rounded version of a well-chosen core set of elementary functions. We discuss the interest and feasibility of this requirement.

entry:
@Article{Brisebarre:2026:CRE,
  author =       "Nicolas Brisebarre and Guillaume Hanrot and
                 Jean-Michel Muller and Paul Zimmermann",
  title =        "Correctly-Rounded Evaluation of a Function: Why, How,
                 and at What Cost?",
  journal =      j-COMP-SURV,
  volume =       "58",
  number =       "1",
  pages =        "27:1--27:34",
  month =        jan,
  year =         "2026",
  CODEN =        "CMSVAN",
  DOI =          "https://doi.org/10.1145/3747840",
  ISSN =         "0360-0300 (print), 1557-7341 (electronic)",
  ISSN-L =       "0360-0300",
  bibdate =      "Fri Oct 24 10:49:56 MDT 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/compsurv.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  abstract =     "The goal of this article is to give a survey on the
                 various computational and mathematical issues and
                 progress related to the problem of providing efficient
                 correctly rounded elementary functions in
                 floating-point arithmetic. We also aim at convincing
                 the reader that a future standard for floating-point
                 arithmetic should require the availability of a
                 correctly rounded version of a well-chosen core set of
                 elementary functions. We discuss the interest and
                 feasibility of this requirement.",
  acknowledgement = ack-nhfb,
  ajournal =     "ACM Comput. Surv.",
  articleno =    "27",
  fjournal =     "ACM Computing Surveys",
  journal-URL =  "https://dl.acm.org/loi/csur",
}


bibtype: article
filename: fparith.bib
label: Ha:2026:LMD
author: Nguyen Thi Thai Ha and Ngo Le Hong Phuc and Vu Mai Trang
title: Lengths of matrix decompositions over division algebras with $k$-involutions
journal: j-LINEAR-ALGEBRA-APPL
volume: 729
pages: 337--349
day: 15
month: jan
monthnumber: 1
year: 2026
CODEN: LAAPAW
DOI: https://doi.org/10.1016/j.laa.2025.10.008
ISSN: 0024-3795 (print), 1873-1856 (electronic) OR 00243795 (print), 18731856 (electronic)
ISSNL: 0024-3795 OR 00243795
bibdate: Mon Oct 27 09:42:54 MDT 2025
bibtimestamp: 2025.10.27 09:42:54 MDT
URL: http://www.sciencedirect.com/science/article/pii/S002437952500415X
fjournal: Linear Algebra and its Applications
acknowledgement: ack-nhfb
ajournal: Linear Algebra Appl.
journalURL: http://www.sciencedirect.com/science/journal/00243795
rawauthor: Nguyen Thi Thai Ha and Ngo Le Hong Phuc and Vu Mai Trang
rawtitle: Lengths of matrix decompositions over division algebras with $k$-involutions
bibsource:
https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/linala2025.bib

entry:
@Article{Ha:2026:LMD,
  author =       "Nguyen Thi Thai Ha and Ngo Le Hong Phuc and Vu Mai
                 Trang",
  title =        "Lengths of matrix decompositions over division
                 algebras with $k$-involutions",
  journal =      j-LINEAR-ALGEBRA-APPL,
  volume =       "729",
  number =       "??",
  pages =        "337--349",
  day =          "15",
  month =        jan,
  year =         "2026",
  CODEN =        "LAAPAW",
  DOI =          "https://doi.org/10.1016/j.laa.2025.10.008",
  ISSN =         "0024-3795 (print), 1873-1856 (electronic)",
  ISSN-L =       "0024-3795",
  bibdate =      "Mon Oct 27 09:42:54 MDT 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/linala2025.bib",
  URL =          "http://www.sciencedirect.com/science/article/pii/S002437952500415X",
  acknowledgement = ack-nhfb,
  ajournal =     "Linear Algebra Appl.",
  fjournal =     "Linear Algebra and its Applications",
  journal-URL =  "http://www.sciencedirect.com/science/journal/00243795",
}


bibtype: article
filename: fparith.bib
label: Kelayeh:2026:AAR
author: Mahla Salehi Sheikhali Kelayeh and Sahand Divsalar and Shaghayegh Vahdat and Nima TaheriNejad
title: ARTS: an approximate reduced tree and segmentation-based multiplier
journal: j-FUT-GEN-COMP-SYS
volume: 175
pages: ??--??
month: feb
monthnumber: 2
year: 2026
CODEN: FGSEVI
DOI: https://doi.org/10.1016/j.future.2025.108098
ISSN: 0167-739X (print), 1872-7115 (electronic) OR 0167739X (print), 18727115 (electronic)
ISSNL: 0167-739X OR 0167739X
bibdate: Mon Nov 3 14:04:14 MST 2025
bibtimestamp: 2025.11.03 14:04:14 MST
URL: http://www.sciencedirect.com/science/article/pii/S0167739X25003929
fjournal: Future Generation Computer Systems
acknowledgement: ack-nhfb
ajournal: Future Gener. Comput. Syst.
articleno: 108098
journalURL: http://www.sciencedirect.com/science/journal/0167739X
rawauthor: Mahla Salehi Sheikhali Kelayeh and Sahand Divsalar and Shaghayegh Vahdat and Nima TaheriNejad
rawtitle: {ARTS}: an approximate reduced tree and segmentation-based multiplier
bibsource:
https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/futgencompsys2020.bib

keywords:
approximate computing; ARTS (approximate multiplier); deep neural network; image processing; partial product reduction; static segmentation

entry:
@Article{Kelayeh:2026:AAR,
  author =       "Mahla Salehi Sheikhali Kelayeh and Sahand Divsalar and
                 Shaghayegh Vahdat and Nima TaheriNejad",
  title =        "{ARTS}: an approximate reduced tree and
                 segmentation-based multiplier",
  journal =      j-FUT-GEN-COMP-SYS,
  volume =       "175",
  number =       "??",
  pages =        "??--??",
  month =        feb,
  year =         "2026",
  CODEN =        "FGSEVI",
  DOI =          "https://doi.org/10.1016/j.future.2025.108098",
  ISSN =         "0167-739X (print), 1872-7115 (electronic)",
  ISSN-L =       "0167-739X",
  bibdate =      "Mon Nov 3 14:04:14 MST 2025",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/futgencompsys2020.bib",
  URL =          "http://www.sciencedirect.com/science/article/pii/S0167739X25003929",
  acknowledgement = ack-nhfb,
  ajournal =     "Future Gener. Comput. Syst.",
  articleno =    "108098",
  fjournal =     "Future Generation Computer Systems",
  journal-URL =  "http://www.sciencedirect.com/science/journal/0167739X",
  keywords =     "approximate computing; ARTS (approximate multiplier);
                 deep neural network; image processing; partial product
                 reduction; static segmentation",
}


bibtype: misc
filename: fparith.bib
label: Anonymous:20xx:CMP
author: Anonymous
title: The CORE-MATH project
pages: ??--??
year: 20xx
bibdate: Mon Dec 04 07:10:51 2023
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2023.12.04 07:10:51 ???
URL: https://core-math.gitlabpages.inria.fr/
acknowledgement: ack-nhfb
howpublished: Web site and code archive
rawauthor: Anonymous
rawtitle: The {CORE-MATH} project
remark:
From the Web site: ``CORE-MATH Mission: provide on-the-shelf high performance open-source mathematical functions with correct rounding that can be integrated into current mathematical libraries (GNU libc, Intel Math Library, AMD Libm, Newlib, OpenLibm, Musl, Apple Libm, llvm-libc, Microsoft libm, CUDA libm, ROCm)''

entry:
@Misc{Anonymous:20xx:CMP,
  author =       "Anonymous",
  title =        "The {CORE-MATH} project",
  howpublished = "Web site and code archive",
  year =         "20xx",
  bibdate =      "Mon Dec 04 07:10:51 2023",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "https://core-math.gitlabpages.inria.fr/",
  acknowledgement = ack-nhfb,
  remark =       "From the Web site: ``CORE-MATH Mission: provide
                 on-the-shelf high performance open-source mathematical
                 functions with correct rounding that can be integrated
                 into current mathematical libraries (GNU libc, Intel
                 Math Library, AMD Libm, Newlib, OpenLibm, Musl, Apple
                 Libm, llvm-libc, Microsoft libm, CUDA libm, ROCm)''",
}


bibtype: misc
filename: fparith.bib
label: QinetiQ:20xx:QFP
author: QinetiQ
title: Quixilica floating point cores
pages: ??--??
year: 20xx
bibdate: Sat Oct 9 12:58:32 2010
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2010.10.09 12:58:32 ???
URL: http://www.tekmicro.com/
acknowledgement: ack-nhfb
howpublished: Web document
rawauthor: {QinetiQ}
rawtitle: {Quixilica} floating point cores
entry:
@Misc{QinetiQ:20xx:QFP,
  author =       "{QinetiQ}",
  title =        "{Quixilica} floating point cores",
  howpublished = "Web document",
  year =         "20xx",
  bibdate =      "Sat Oct 9 12:58:32 2010",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  URL =          "http://www.tekmicro.com/",
  acknowledgement = ack-nhfb,
}


bibtype: proceedings
filename: fparith.bib
label: Anonymous:1948:PSL
editor: Anonymous
volume: 16
publisher: pub-HARVARD
address: pub-HARVARD:adr
pages: xxix + 302
year: 1948
LCCN: QA75 .S96 1947
bibdate: Mon Nov 4 07:46:57 MST 2002
bibtimestamp: 2002.11.04 07:46:57 MST
series: The Annals of the Computation Laboratory of Harvard University
keywords: calculators --- congresses; electronic digital computers --- congresses
acknowledgement: ack-nhfb
raweditor: Anonymous
booktitle:
Proceedings of a Symposium on Large-Scale Digital Calculating Machinery: Jointly Sponsored by The Navy Department Bureau of Ordnance and Harvard University at The Computation Laboratory 7--10 January 1947

title:
Proceedings of a Symposium on Large-Scale Digital Calculating Machinery: Jointly Sponsored by The Navy Department Bureau of Ordnance and Harvard University at The Computation Laboratory 7--10 January 1947

bibsource:
https://www.math.utah.edu/pub/bibnet/authors/b/babbage-charles.bib; https://www.math.utah.edu/pub/tex/bib/adabooks.bib; https://www.math.utah.edu/pub/tex/bib/annhistcomput.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib

remark:
Goldstine's paper is listed in the table of contents, but is absent from the volume. The printed order of a few papers differs from that shown in the table of contents; the order has been corrected in the data in this entry.

TOC:
Program of the Symposium on Large-Scale Digital Calculating Machinery: 7--10 January 1947 First Session: Tuesday, 7 January 1947 1O:00 a.m. Opening Addresses Mr. Edward Reynolds, Administrative Vice President of Harvard University / 3--3 Rear Admiral C. T. Joy, USN, Naval Proving Ground, Dahlgren, Virginia / 4--6 Professor Howard H. Aiken, Chairman, Harvard University / 7--7 11:00 a.m. Inspection of the Computation Laboratory and of Mark II Calculator Second Session: Tuesday, 7 January 1947, 2:00 p.m. Existing Calculating Machines / Professor Willard E. Bleick, Chairman, Post Graduate School, U.S. Naval Academy, Annapolis / Mr. Richard H. Babbage, Montreal, Canada / The Work of Charles Babbage / 13--22 Mr. Richard M. Bloch, Harvard University / Mark I Calculator / 23--30 Dr. Lewis P. Tabor, University of Pennsylvania / Brief Description and Operating Characteristics of the ENIAC / 31--40 Mr. Samuel B. Williams, Consulting Electrical Engineer / Bell Telephone Laboratories' Relay Computing System / 41--68 Mr. Robert V. D. Campbell, Harvard University / Mark II Calculator / 69--79 Third Session: Wednesday, 8 January 1947, 9:30 a.m. The Logic of Large-Scale Calculating Machinery / Professor Vendell H. Furry, Chairman, Harvard University Dr. Alexander W. Wundheiler, Bureau of Ordnance / Problems of Mathematical Analysis Involved in Machine Computations / 83--90 Dr. George R. Stibitz, University of Vermont / The Organization of Large-Scale Calculating Machinery / 91--100 Fourth Session: Wednesday, 8 January 1947, 2:00 p.m. Storage Devices Dr. John H. Curtiss, Chairman / National Bureau of Standards / Dr. T. Kite Sharpless, University of Pennsylvania / Mercury Delay Lines as a Memory Unit / 103--109 Professor Leon Brillouin, Harvard University / Slow Electromagnetic Waves / 110--124 Dr. Jay W. Forrester, Massachusetts Institute of Technology / High-Speed Electrostatic Storage / 125--129 Dr. Benjamin L. Moore, Harvard University / Magnetic and Phosphor Coated Discs / 130--132 Dr. Jan Rajchman, Radio Corporation of America / The Selectron --- A Tube for Selective Electrostatic Storage / 133--145 Dr. Arthur W. Tyler, Eastman Kodak Company / Optical and Photographic Storage Techniques / 146--150 Fifth Session: Thursday, 9 January 1947, 9:30 a.m. Numerical Methods and Suggested Problems for Solution Dr. Mina Rees, Chairman, Office of Naval Research Professor Richard Courant, New York University / Method of Finite Differences for the Solution of Partial Differential Equations / 153--156 Dr. Raymond J. Seeger, Naval Ordnance Laboratory / On Computational Techniques for Certain Problems in Fluid Dynamics / 157--168 Professor Wassily W. Leontief, Harvard University / Computational Problems Arising in Connection with Economic Analysis of interindustrial Relationships / 169--175 Professor Hans A. Rademacher, University of Pennsylvania / On the Accumulation of Errors in Processes of Integration on High-Speed Calculating Machines / 176--187 Professor Howard W. Emmons, Harvard University / Fluid Mechanics Computations / 188--193 Dr. L. S. Dederick, Ballistic Research Laboratory, Aberdeen, Maryland / Firing Tables / 194--199 Sixth Session: Thursday, 9 January 1947, 2:00 p.m. Sequencing, Coding, and Problem Preparation Dr. Julius A. Stratton, Chairman, Massachusetts Institute of Technology Dr. John W. Mauchly, Electronic Control Company / Preparation of Problems for EDVAC-Type Machines / 203--207 Mr. Joseph 0. Harrison, Jr., Harvard University / The Preparation of Problems for the Mark I Calculator / 208--210 Dr. Herman H. Goldstine, Institute for Advanced Study / Coding for Large-Scale Calculating Machinery / ??--?? Seventh Session: Friday, 10 January 1947, 9:30 a.m. Input and Output Devices Professor E. Leon Chaffee, Chairman, Harvard University Mr. Frederick G. Miller, Harvard University / Application of Printing Telegraph Techniques to Large-Scale Calculating Machinery / 213--222 Mr. Otto Kornei, The Brush Development Company / Survey of Magnetic Recording / 223--237 Mr. Harrison W. Fuller, Harvard University / The Numeroscope / 238--247 Dr. Samuel N. Alexander, National Bureau of Standards / Input and Output Devices for Electronic Digital Calculating Machinery / 248--253 Dr. Morris Rubinoff, Harvard University / An Input Device Using Multiple Gates / 254--259 Dr. R. D. O'Neal, Eastman Kodak Company / Photographic Methods of Handling Input and Output Data / 260--266 Mr. C. Bradford Sheppard, Electronic Control Company / Transfer Between External and Internal Memory / 267--273 Eighth Session: Friday, 10 January 1947, 2:00 p.m. Conclusions and Open Discussion Professor Charles C. Bramble, Chairman, Post Graduate School, U.S. Naval Academy, Annapolis / Professor Samuel H. Caldwell, Massachusetts Institute of Technology / Publication, Classification, and Patents / 277--283 Dr. Louis Couffignal (in absentia), Centre National de la Recherche Scientifique / Le Domaine du Calcul Mecanique / 284--296 Dr. Alan T. Waterman, Office of Naval Research / New Vistas in Mathematics / 298--302

rawbooktitle:
Proceedings of a {Symposium on Large-Scale Digital Calculating Machinery}: Jointly Sponsored by {The Navy Department Bureau of Ordnance and Harvard University at The Computation Laboratory 7--10 January 1947}

rawtitle:
Proceedings of a {Symposium on Large-Scale Digital Calculating Machinery}: Jointly Sponsored by {The Navy Department Bureau of Ordnance and Harvard University at The Computation Laboratory 7--10 January 1947}

rawTOC:
Program of the Symposium on Large-Scale Digital Calculating Machinery: 7--10 January 1947 \\ First Session: Tuesday, 7 January 1947 1O:00 a.m. \\ Opening Addresses \\ Mr. Edward Reynolds, Administrative Vice President of Harvard University / 3--3 \\ Rear Admiral C. T. Joy, USN, Naval Proving Ground, Dahlgren, Virginia / 4--6 \\ Professor Howard H. Aiken, Chairman, Harvard University / 7--7 \\ 11:00 a.m. Inspection of the Computation Laboratory and of Mark II Calculator \\ Second Session: Tuesday, 7 January 1947, 2:00 p.m. \\ Existing Calculating Machines / \\ Professor Willard E. Bleick, Chairman, Post Graduate School, U.S. Naval Academy, Annapolis / \\ Mr. Richard H. Babbage, Montreal, Canada / The Work of Charles Babbage / 13--22 \\ Mr. Richard M. Bloch, Harvard University / Mark I Calculator / 23--30 \\ Dr. Lewis P. Tabor, University of Pennsylvania / Brief Description and Operating Characteristics of the ENIAC / 31--40 \\ Mr. Samuel B. Williams, Consulting Electrical Engineer / Bell Telephone Laboratories' Relay Computing System / 41--68 \\ Mr. Robert V. D. Campbell, Harvard University / Mark II Calculator / 69--79 \\ Third Session: Wednesday, 8 January 1947, 9:30 a.m. \\ The Logic of Large-Scale Calculating Machinery / \\ Professor \Vendell H. Furry, Chairman, Harvard University \\ Dr. Alexander W. Wundheiler, Bureau of Ordnance / Problems of Mathematical Analysis Involved in Machine Computations / 83--90 \\ Dr. George R. Stibitz, University of Vermont / The Organization of Large-Scale Calculating Machinery / 91--100 \\ Fourth Session: Wednesday, 8 January 1947, 2:00 p.m. \\ Storage Devices \\ Dr. John H. Curtiss, Chairman / National Bureau of Standards / \\ Dr. T. Kite Sharpless, University of Pennsylvania / Mercury Delay Lines as a Memory Unit / 103--109 \\ Professor Leon Brillouin, Harvard University / Slow Electromagnetic Waves / 110--124 \\ Dr. Jay W. Forrester, Massachusetts Institute of Technology / High-Speed Electrostatic Storage / 125--129 \\ Dr. Benjamin L. Moore, Harvard University / Magnetic and Phosphor Coated Discs / 130--132 \\ Dr. Jan Rajchman, Radio Corporation of America / The Selectron --- A Tube for Selective Electrostatic Storage / 133--145 \\ Dr. Arthur W. Tyler, Eastman Kodak Company / Optical and Photographic Storage Techniques / 146--150 \\ Fifth Session: Thursday, 9 January 1947, 9:30 a.m. \\ Numerical Methods and Suggested Problems for Solution \\ Dr. Mina Rees, Chairman, Office of Naval Research \\ Professor Richard Courant, New York University / Method of Finite Differences for the Solution of Partial Differential Equations / 153--156 \\ Dr. Raymond J. Seeger, Naval Ordnance Laboratory / On Computational Techniques for Certain Problems in Fluid Dynamics / 157--168 \\ Professor Wassily W. Leontief, Harvard University / Computational Problems Arising in Connection with Economic Analysis of interindustrial Relationships / 169--175 \\ Professor Hans A. Rademacher, University of Pennsylvania / On the Accumulation of Errors in Processes of Integration on High-Speed Calculating Machines / 176--187 \\ Professor Howard W. Emmons, Harvard University / Fluid Mechanics Computations / 188--193 \\ Dr. L. S. Dederick, Ballistic Research Laboratory, Aberdeen, Maryland / Firing Tables / 194--199 \\ Sixth Session: Thursday, 9 January 1947, 2:00 p.m. \\ Sequencing, Coding, and Problem Preparation \\ Dr. Julius A. Stratton, Chairman, Massachusetts Institute of Technology \\ Dr. John W. Mauchly, Electronic Control Company / Preparation of Problems for EDVAC-Type Machines / 203--207 \\ Mr. Joseph 0. Harrison, Jr., Harvard University / The Preparation of Problems for the Mark I Calculator / 208--210 \\ Dr. Herman H. Goldstine, Institute for Advanced Study / Coding for Large-Scale Calculating Machinery / ??--?? \\ Seventh Session: Friday, 10 January 1947, 9:30 a.m. \\ Input and Output Devices \\ Professor E. Leon Chaffee, Chairman, Harvard University \\ Mr. Frederick G. Miller, Harvard University / Application of Printing Telegraph Techniques to Large-Scale Calculating Machinery / 213--222 \\ Mr. Otto Kornei, The Brush Development Company / Survey of Magnetic Recording / 223--237 \\ Mr. Harrison W. Fuller, Harvard University / The Numeroscope / 238--247 \\ Dr. Samuel N. Alexander, National Bureau of Standards / Input and Output Devices for Electronic Digital Calculating Machinery / 248--253 \\ Dr. Morris Rubinoff, Harvard University / An Input Device Using Multiple Gates / 254--259 \\ Dr. R. D. O'Neal, Eastman Kodak Company / Photographic Methods of Handling Input and Output Data / 260--266 \\ Mr. C. Bradford Sheppard, Electronic Control Company / Transfer Between External and Internal Memory / 267--273 \\ Eighth Session: Friday, 10 January 1947, 2:00 p.m. \\ Conclusions and Open Discussion \\ Professor Charles C. Bramble, Chairman, Post Graduate School, U.S. Naval Academy, Annapolis / \\ Professor Samuel H. Caldwell, Massachusetts Institute of Technology / Publication, Classification, and Patents / 277--283 \\ Dr. Louis Couffignal (in absentia), Centre National de la Recherche Scientifique / Le Domaine du Calcul M{\'e}canique / 284--296 \\ Dr. Alan T. Waterman, Office of Naval Research / New Vistas in Mathematics / 298--302

entry:
@Proceedings{Anonymous:1948:PSL,
  editor =       "Anonymous",
  booktitle =    "Proceedings of a {Symposium on Large-Scale Digital
                 Calculating Machinery}: Jointly Sponsored by {The Navy
                 Department Bureau of Ordnance and Harvard University at
                 The Computation Laboratory 7--10 January 1947}",
  title =        "Proceedings of a {Symposium on Large-Scale Digital
                 Calculating Machinery}: Jointly Sponsored by {The Navy
                 Department Bureau of Ordnance and Harvard University at
                 The Computation Laboratory 7--10 January 1947}",
  volume =       "16",
  publisher =    pub-HARVARD,
  address =      pub-HARVARD:adr,
  pages =        "xxix + 302",
  year =         "1948",
  LCCN =         "QA75 .S96 1947",
  bibdate =      "Mon Nov 4 07:46:57 MST 2002",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/b/babbage-charles.bib;
                 https://www.math.utah.edu/pub/tex/bib/adabooks.bib;
                 https://www.math.utah.edu/pub/tex/bib/annhistcomput.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  series =       "The Annals of the Computation Laboratory of Harvard
                 University",
  acknowledgement = ack-nhfb,
  keywords =     "calculators --- congresses; electronic digital
                 computers --- congresses",
  remark =       "Goldstine's paper is listed in the table of contents,
                 but is absent from the volume. The printed order of a
                 few papers differs from that shown in the table of
                 contents; the order has been corrected in the data in
                 this entry.",
  tableofcontents = "Program of the Symposium on Large-Scale Digital
                 Calculating Machinery: 7--10 January 1947 \\
                 First Session: Tuesday, 7 January 1947 1O:00 a.m. \\
                 Opening Addresses \\
                 Mr. Edward Reynolds, Administrative Vice President of
                 Harvard University / 3--3 \\
                 Rear Admiral C. T. Joy, USN, Naval Proving Ground,
                 Dahlgren, Virginia / 4--6 \\
                 Professor Howard H. Aiken, Chairman, Harvard University
                 / 7--7 \\
                 11:00 a.m. Inspection of the Computation Laboratory and
                 of Mark II Calculator \\
                 Second Session: Tuesday, 7 January 1947, 2:00 p.m. \\
                 Existing Calculating Machines / \\
                 Professor Willard E. Bleick, Chairman, Post Graduate
                 School, U.S. Naval Academy, Annapolis / \\
                 Mr. Richard H. Babbage, Montreal, Canada / The Work of
                 Charles Babbage / 13--22 \\
                 Mr. Richard M. Bloch, Harvard University / Mark I
                 Calculator / 23--30 \\
                 Dr. Lewis P. Tabor, University of Pennsylvania / Brief
                 Description and Operating Characteristics of the ENIAC
                 / 31--40 \\
                 Mr. Samuel B. Williams, Consulting Electrical Engineer
                 / Bell Telephone Laboratories' Relay Computing System /
                 41--68 \\
                 Mr. Robert V. D. Campbell, Harvard University / Mark II
                 Calculator / 69--79 \\
                 Third Session: Wednesday, 8 January 1947, 9:30 a.m. \\
                 The Logic of Large-Scale Calculating Machinery / \\
                 Professor \Vendell H. Furry, Chairman, Harvard
                 University \\
                 Dr. Alexander W. Wundheiler, Bureau of Ordnance /
                 Problems of Mathematical Analysis Involved in Machine
                 Computations / 83--90 \\
                 Dr. George R. Stibitz, University of Vermont / The
                 Organization of Large-Scale Calculating Machinery /
                 91--100 \\
                 Fourth Session: Wednesday, 8 January 1947, 2:00 p.m.
                 \\
                 Storage Devices \\
                 Dr. John H. Curtiss, Chairman / National Bureau of
                 Standards / \\
                 Dr. T. Kite Sharpless, University of Pennsylvania /
                 Mercury Delay Lines as a Memory Unit / 103--109 \\
                 Professor Leon Brillouin, Harvard University / Slow
                 Electromagnetic Waves / 110--124 \\
                 Dr. Jay W. Forrester, Massachusetts Institute of
                 Technology / High-Speed Electrostatic Storage /
                 125--129 \\
                 Dr. Benjamin L. Moore, Harvard University / Magnetic
                 and Phosphor Coated Discs / 130--132 \\
                 Dr. Jan Rajchman, Radio Corporation of America / The
                 Selectron --- A Tube for Selective Electrostatic
                 Storage / 133--145 \\
                 Dr. Arthur W. Tyler, Eastman Kodak Company / Optical
                 and Photographic Storage Techniques / 146--150 \\
                 Fifth Session: Thursday, 9 January 1947, 9:30 a.m. \\
                 Numerical Methods and Suggested Problems for Solution
                 \\
                 Dr. Mina Rees, Chairman, Office of Naval Research \\
                 Professor Richard Courant, New York University / Method
                 of Finite Differences for the Solution of Partial
                 Differential Equations / 153--156 \\
                 Dr. Raymond J. Seeger, Naval Ordnance Laboratory / On
                 Computational Techniques for Certain Problems in Fluid
                 Dynamics / 157--168 \\
                 Professor Wassily W. Leontief, Harvard University /
                 Computational Problems Arising in Connection with
                 Economic Analysis of interindustrial Relationships /
                 169--175 \\
                 Professor Hans A. Rademacher, University of
                 Pennsylvania / On the Accumulation of Errors in
                 Processes of Integration on High-Speed Calculating
                 Machines / 176--187 \\
                 Professor Howard W. Emmons, Harvard University / Fluid
                 Mechanics Computations / 188--193 \\
                 Dr. L. S. Dederick, Ballistic Research Laboratory,
                 Aberdeen, Maryland / Firing Tables / 194--199 \\
                 Sixth Session: Thursday, 9 January 1947, 2:00 p.m. \\
                 Sequencing, Coding, and Problem Preparation \\
                 Dr. Julius A. Stratton, Chairman, Massachusetts
                 Institute of Technology \\
                 Dr. John W. Mauchly, Electronic Control Company /
                 Preparation of Problems for EDVAC-Type Machines /
                 203--207 \\
                 Mr. Joseph 0. Harrison, Jr., Harvard University / The
                 Preparation of Problems for the Mark I Calculator /
                 208--210 \\
                 Dr. Herman H. Goldstine, Institute for Advanced Study /
                 Coding for Large-Scale Calculating Machinery / ??--??
                 \\
                 Seventh Session: Friday, 10 January 1947, 9:30 a.m. \\
                 Input and Output Devices \\
                 Professor E. Leon Chaffee, Chairman, Harvard University
                 \\
                 Mr. Frederick G. Miller, Harvard University /
                 Application of Printing Telegraph Techniques to
                 Large-Scale Calculating Machinery / 213--222 \\
                 Mr. Otto Kornei, The Brush Development Company / Survey
                 of Magnetic Recording / 223--237 \\
                 Mr. Harrison W. Fuller, Harvard University / The
                 Numeroscope / 238--247 \\
                 Dr. Samuel N. Alexander, National Bureau of Standards /
                 Input and Output Devices for Electronic Digital
                 Calculating Machinery / 248--253 \\
                 Dr. Morris Rubinoff, Harvard University / An Input
                 Device Using Multiple Gates / 254--259 \\
                 Dr. R. D. O'Neal, Eastman Kodak Company / Photographic
                 Methods of Handling Input and Output Data / 260--266
                 \\
                 Mr. C. Bradford Sheppard, Electronic Control Company /
                 Transfer Between External and Internal Memory /
                 267--273 \\
                 Eighth Session: Friday, 10 January 1947, 2:00 p.m. \\
                 Conclusions and Open Discussion \\
                 Professor Charles C. Bramble, Chairman, Post Graduate
                 School, U.S. Naval Academy, Annapolis / \\
                 Professor Samuel H. Caldwell, Massachusetts Institute
                 of Technology / Publication, Classification, and
                 Patents / 277--283 \\
                 Dr. Louis Couffignal (in absentia), Centre National de
                 la Recherche Scientifique / Le Domaine du Calcul
                 M{\'e}canique / 284--296 \\
                 Dr. Alan T. Waterman, Office of Naval Research / New
                 Vistas in Mathematics / 298--302",
}


bibtype: proceedings
filename: fparith.bib
label: Householder:1951:MCM
editor: Alston S. Householder and George E. Forsythe and Hallett-Hunt Germond
volume: 12
publisher: pub-USGPO
address: pub-USGPO:adr
pages: 49
year: 1951
bibdate: Tue Jan 31 06:36:58 2017
bibtimestamp: 2017.01.31 06:36:58 ???
series: ser-APPL-MATH-SER-NBS
acknowledgement: ack-nhfb
raweditor: Alston S. Householder and George E. Forsythe and Hallett-Hunt Germond
booktitle:
Monte Carlo method. Proceedings of a Symposium Held June 29, 30 and July 1, 1949 in Los Angeles, California

title:
Monte Carlo method. Proceedings of a Symposium Held June 29, 30 and July 1, 1949 in Los Angeles, California

bibsource:
https://www.math.utah.edu/pub/bibnet/authors/f/forsythe-george-elmer.bib; https://www.math.utah.edu/pub/bibnet/authors/v/von-neumann-john.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/mathcw.bib; https://www.math.utah.edu/pub/tex/bib/prng.bib

TOC:
Preface / iii Foreword / v 1. Showers produced by low-energy electrons and photons / Robert R. Wilson / 1 2. An alignment chart for Monte Carlo solution of the transport problem / B. I. Spinrad, G. H. Goertzel, W. S. Snyder / 4 3. Neutron age calculations in water, graphite, and tissue / Alston S. Householder / 6 4. Methods of probabilities in chains applied to particle transmission through matter / Wendell C. DeMarcus, Lewis Nelson / 9 5. Stochastic methods in statistical mechanics / W. Gilbert King / 12 6. Report on a Monte Carlo calculation performed with the Eniac / Maria Mayer / 19 7. Calculation of shielding properties of water for high energy neutrons / Preston C. Hammer / 21 8. A Monte Carlo technique for estimating particle attenuation in bulk matter / B. A. Shoor, Lewis Nelson, Wendell DeMarcus, Robert L. Echols / 24 9. Estimation of particle transmission by random sampling / Herman Kahn, T. E. Harris / 27 10. History of RAND's random digits --- Summary / W. George Brown / 31 11. The mid-square method of generating digits / Preston C. Hammer / 33 12. Generation and testing of random digits at the National Bureau of Standards, Los Angeles / George E. Forsythe / 34 13. Various techniques used in connection with random digits / John von Neumann / 36 14. Round table discussion / H. H. Germond / 39

rawbooktitle:
{Monte Carlo method. Proceedings of a Symposium Held June 29, 30 and July 1, 1949 in Los Angeles, California}

rawtitle:
{Monte Carlo method. Proceedings of a Symposium Held June 29, 30 and July 1, 1949 in Los Angeles, California}

rawTOC:
Preface / iii \\ Foreword / v \\ 1. Showers produced by low-energy electrons and photons / Robert R. Wilson / 1 \\ 2. An alignment chart for Monte Carlo solution of the transport problem / B. I. Spinrad, G. H. Goertzel, W. S. Snyder / 4 \\ 3. Neutron age calculations in water, graphite, and tissue / Alston S. Householder / 6 \\ 4. Methods of probabilities in chains applied to particle transmission through matter / Wendell C. DeMarcus, Lewis Nelson / 9 \\ 5. Stochastic methods in statistical mechanics / W. Gilbert King / 12 \\ 6. Report on a Monte Carlo calculation performed with the Eniac / Maria Mayer / 19 \\ 7. Calculation of shielding properties of water for high energy neutrons / Preston C. Hammer / 21 \\ 8. A Monte Carlo technique for estimating particle attenuation in bulk matter / B. A. Shoor, Lewis Nelson, Wendell DeMarcus, Robert L. Echols / 24 \\ 9. Estimation of particle transmission by random sampling / Herman Kahn, T. E. Harris / 27 \\ 10. History of RAND's random digits --- Summary / W. George Brown / 31 \\ 11. The mid-square method of generating digits / Preston C. Hammer / 33 \\ 12. Generation and testing of random digits at the National Bureau of Standards, Los Angeles / George E. Forsythe / 34 \\ 13. Various techniques used in connection with random digits / John von Neumann / 36 \\ 14. Round table discussion / H. H. Germond / 39

entry:
@Proceedings{Householder:1951:MCM,
  editor =       "Alston S. Householder and George E. Forsythe and
                 Hallett-Hunt Germond",
  booktitle =    "{Monte Carlo method. Proceedings of a Symposium Held
                 June 29, 30 and July 1, 1949 in Los Angeles,
                 California}",
  title =        "{Monte Carlo method. Proceedings of a Symposium Held
                 June 29, 30 and July 1, 1949 in Los Angeles,
                 California}",
  volume =       "12",
  publisher =    pub-USGPO,
  address =      pub-USGPO:adr,
  pages =        "49",
  year =         "1951",
  bibdate =      "Tue Jan 31 06:36:58 2017",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/f/forsythe-george-elmer.bib;
                 https://www.math.utah.edu/pub/bibnet/authors/v/von-neumann-john.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/mathcw.bib;
                 https://www.math.utah.edu/pub/tex/bib/prng.bib",
  series =       ser-APPL-MATH-SER-NBS,
  acknowledgement = ack-nhfb,
  tableofcontents = "Preface / iii \\
                 Foreword / v \\
                 1. Showers produced by low-energy electrons and photons
                 / Robert R. Wilson / 1 \\
                 2. An alignment chart for Monte Carlo solution of the
                 transport problem / B. I. Spinrad, G. H. Goertzel, W.
                 S. Snyder / 4 \\
                 3. Neutron age calculations in water, graphite, and
                 tissue / Alston S. Householder / 6 \\
                 4. Methods of probabilities in chains applied to
                 particle transmission through matter / Wendell C.
                 DeMarcus, Lewis Nelson / 9 \\
                 5. Stochastic methods in statistical mechanics / W.
                 Gilbert King / 12 \\
                 6. Report on a Monte Carlo calculation performed with
                 the Eniac / Maria Mayer / 19 \\
                 7. Calculation of shielding properties of water for
                 high energy neutrons / Preston C. Hammer / 21 \\
                 8. A Monte Carlo technique for estimating particle
                 attenuation in bulk matter / B. A. Shoor, Lewis Nelson,
                 Wendell DeMarcus, Robert L. Echols / 24 \\
                 9. Estimation of particle transmission by random
                 sampling / Herman Kahn, T. E. Harris / 27 \\
                 10. History of RAND's random digits --- Summary / W.
                 George Brown / 31 \\
                 11. The mid-square method of generating digits /
                 Preston C. Hammer / 33 \\
                 12. Generation and testing of random digits at the
                 National Bureau of Standards, Los Angeles / George E.
                 Forsythe / 34 \\
                 13. Various techniques used in connection with random
                 digits / John von Neumann / 36 \\
                 14. Round table discussion / H. H. Germond / 39",
}


bibtype: book
filename: fparith.bib
label: Alt:1960:AC
editor: Franz L. Alt and Andrew Donald Booth and Robert Emmet Meagher
booktitle: Advances in Computers
title: Advances in Computers
publisher: pub-ACADEMIC
address: pub-ACADEMIC:adr
pages: x + 316
year: 1960
ISSN: 0065-2458 OR 00652458
LCCN: QA76 .A3
bibdate: Sat Nov 29 11:05:31 2003
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2003.11.29 11:05:31 ???
acknowledgement: ack-nhfb
rawbooktitle: Advances in Computers
raweditor: Franz L. Alt and Andrew Donald Booth and Robert Emmet Meagher
rawtitle: Advances in Computers
entry:
@Book{Alt:1960:AC,
  editor =       "Franz L. Alt and Andrew Donald Booth and Robert Emmet
                 Meagher",
  booktitle =    "Advances in Computers",
  title =        "Advances in Computers",
  publisher =    pub-ACADEMIC,
  address =      pub-ACADEMIC:adr,
  pages =        "x + 316",
  year =         "1960",
  ISSN =         "0065-2458",
  LCCN =         "QA76 .A3",
  bibdate =      "Sat Nov 29 11:05:31 2003",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: book
filename: fparith.bib
label: Taub:1961:JNCa
editor: A. H. Taub
booktitle: John von Neumann: Collected Works: Volume I: Logic, Theory of Sets and Quantum Mechanics
title: John von Neumann: Collected Works: Volume I: Logic, Theory of Sets and Quantum Mechanics
publisher: pub-PERGAMON
address: pub-PERGAMON:adr
pages: x + 654
year: 1961
bibdate: Wed Jun 01 16:58:29 2005
bibtimestamp: 2005.06.01 16:58:29 ???
ZMnumber: 0188.00102
acknowledgement: ack-nhfb
rawbooktitle: {John von Neumann}: Collected Works: {Volume I}: {Logic}, Theory of Sets and Quantum Mechanics
raweditor: A. H. Taub
rawtitle: {John von Neumann}: Collected Works: {Volume I}: {Logic}, Theory of Sets and Quantum Mechanics
note:
See also volumes II--VI cite Taub:1961:JNCb,Taub:1961:JNCc,Taub:1962:JNC,Taub:1963:JNCa,Taub:1963:JNCb.

rawnote:
See also volumes II--VI \cite{Taub:1961:JNCb,Taub:1961:JNCc,Taub:1962:JNC,Taub:1963:JNCa,Taub:1963:JNCb}.

entry:
@Book{Taub:1961:JNCa,
  editor =       "A. H. Taub",
  booktitle =    "{John von Neumann}: Collected Works: {Volume I}:
                 {Logic}, Theory of Sets and Quantum Mechanics",
  title =        "{John von Neumann}: Collected Works: {Volume I}:
                 {Logic}, Theory of Sets and Quantum Mechanics",
  publisher =    pub-PERGAMON,
  address =      pub-PERGAMON:adr,
  pages =        "x + 654",
  year =         "1961",
  LCCN =         "????",
  bibdate =      "Wed Jun 01 16:58:29 2005",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/v/von-neumann-john.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "See also volumes II--VI
                 \cite{Taub:1961:JNCb,Taub:1961:JNCc,Taub:1962:JNC,Taub:1963:JNCa,Taub:1963:JNCb}.",
  ZMnumber =     "0188.00102",
  acknowledgement = ack-nhfb,
}


bibtype: book
filename: fparith.bib
label: Taub:1961:JNCb
editor: A. H. Taub
publisher: pub-PERGAMON
address: pub-PERGAMON:adr
pages: x + 568
year: 1961
bibdate: Wed Jun 01 16:58:29 2005
bibtimestamp: 2005.06.01 16:58:29 ???
ZMnumber: 0188.00102
acknowledgement: ack-nhfb
raweditor: A. H. Taub
booktitle:
John von Neumann: Collected Works. Volume II: Operators, Ergodic Theory and Almost Periodic Functions in a Group

title:
John von Neumann: Collected Works. Volume II: Operators, Ergodic Theory and Almost Periodic Functions in a Group

note:
See also volumes I, III--VI cite Taub:1961:JNCa,Taub:1961:JNCc,Taub:1962:JNC,Taub:1963:JNCa,Taub:1963:JNCb.

rawbooktitle:
{John von Neumann}: Collected Works. {Volume II}: {Operators}, Ergodic Theory and Almost Periodic Functions in a Group

rawnote:
See also volumes I, III--VI \cite{Taub:1961:JNCa,Taub:1961:JNCc,Taub:1962:JNC,Taub:1963:JNCa,Taub:1963:JNCb}.

rawtitle:
{John von Neumann}: Collected Works. {Volume II}: {Operators}, Ergodic Theory and Almost Periodic Functions in a Group

entry:
@Book{Taub:1961:JNCb,
  editor =       "A. H. Taub",
  booktitle =    "{John von Neumann}: Collected Works. {Volume II}:
                 {Operators}, Ergodic Theory and Almost Periodic
                 Functions in a Group",
  title =        "{John von Neumann}: Collected Works. {Volume II}:
                 {Operators}, Ergodic Theory and Almost Periodic
                 Functions in a Group",
  publisher =    pub-PERGAMON,
  address =      pub-PERGAMON:adr,
  pages =        "x + 568",
  year =         "1961",
  LCCN =         "????",
  bibdate =      "Wed Jun 01 16:58:29 2005",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/v/von-neumann-john.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "See also volumes I, III--VI
                 \cite{Taub:1961:JNCa,Taub:1961:JNCc,Taub:1962:JNC,Taub:1963:JNCa,Taub:1963:JNCb}.",
  ZMnumber =     "0188.00102",
  acknowledgement = ack-nhfb,
}


bibtype: book
filename: fparith.bib
label: Taub:1961:JNCc
editor: A. H. Taub
booktitle: John von Neumann: Collected Works. Volume III: Rings of Operators
title: John von Neumann: Collected Works. Volume III: Rings of Operators
publisher: pub-PERGAMON
address: pub-PERGAMON:adr
pages: ix + 574
year: 1961 -- 1963
bibdate: Wed Jun 01 16:58:29 2005
bibtimestamp: 2005.06.01 16:58:29 ???
ZMnumber: 0188.00102
acknowledgement: ack-nhfb
rawbooktitle: {John von Neumann}: Collected Works. {Volume III}: Rings of Operators
raweditor: A. H. Taub
rawtitle: {John von Neumann}: Collected Works. {Volume III}: Rings of Operators
note:
See also volumes I--II, IV--VI cite Taub:1961:JNCa,Taub:1961:JNCb,Taub:1962:JNC,Taub:1963:JNCa,Taub:1963:JNCb.

rawnote:
See also volumes I--II, IV--VI \cite{Taub:1961:JNCa,Taub:1961:JNCb,Taub:1962:JNC,Taub:1963:JNCa,Taub:1963:JNCb}.

entry:
@Book{Taub:1961:JNCc,
  editor =       "A. H. Taub",
  booktitle =    "{John von Neumann}: Collected Works. {Volume III}:
                 Rings of Operators",
  title =        "{John von Neumann}: Collected Works. {Volume III}:
                 Rings of Operators",
  publisher =    pub-PERGAMON,
  address =      pub-PERGAMON:adr,
  pages =        "ix + 574",
  year =         "1961--1963",
  LCCN =         "????",
  bibdate =      "Wed Jun 01 16:58:29 2005",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/v/von-neumann-john.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "See also volumes I--II, IV--VI
                 \cite{Taub:1961:JNCa,Taub:1961:JNCb,Taub:1962:JNC,Taub:1963:JNCa,Taub:1963:JNCb}.",
  ZMnumber =     "0188.00102",
  acknowledgement = ack-nhfb,
}


bibtype: proceedings
filename: fparith.bib
label: AFIPS:1962:APS
editor: AFIPS
booktitle: AFIPS Proceedings of the Spring Joint Computer Conference 1962
title: AFIPS Proceedings of the Spring Joint Computer Conference 1962
volume: 21
publisher: pub-AFIPS
address: pub-AFIPS:adr
pages: ??--??
year: 1962
bibdate: Wed Feb 14 17:16:30 2007
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2007.02.14 17:16:30 ???
series: AFIPS conference proceedings
acknowledgement: ack-nhfb
key: AFIPS SJCC '62
rawbooktitle: {AFIPS} Proceedings of the {Spring Joint Computer Conference} 1962
raweditor: AFIPS
rawtitle: {AFIPS} Proceedings of the {Spring Joint Computer Conference} 1962
entry:
@Proceedings{AFIPS:1962:APS,
  editor =       "AFIPS",
  key =          "AFIPS SJCC '62",
  booktitle =    "{AFIPS} Proceedings of the {Spring Joint Computer
                 Conference} 1962",
  title =        "{AFIPS} Proceedings of the {Spring Joint Computer
                 Conference} 1962",
  volume =       "21",
  publisher =    pub-AFIPS,
  address =      pub-AFIPS:adr,
  pages =        "??--??",
  year =         "1962",
  LCCN =         "????",
  bibdate =      "Wed Feb 14 17:16:30 2007",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  series =       "AFIPS conference proceedings",
  acknowledgement = ack-nhfb,
}


bibtype: book
filename: fparith.bib
label: Taub:1962:JNC
editor: A. H. Taub
booktitle: John von Neumann: Collected Works. Volume IV: Continuous Geometry and Other Topics
title: John von Neumann: Collected Works. Volume IV: Continuous Geometry and Other Topics
publisher: pub-PERGAMON
address: pub-PERGAMON:adr
pages: x + 516
year: 1962
bibdate: Wed Jun 01 16:58:29 2005
bibtimestamp: 2005.06.01 16:58:29 ???
ZMnumber: 0188.00102
acknowledgement: ack-nhfb
rawbooktitle: {John von Neumann}: Collected Works. {Volume IV}: {Continuous} Geometry and Other Topics
raweditor: A. H. Taub
rawtitle: {John von Neumann}: Collected Works. {Volume IV}: {Continuous} Geometry and Other Topics
note:
See also volumes I--III, V--VI cite Taub:1961:JNCa,Taub:1961:JNCb,Taub:1961:JNCc,Taub:1963:JNCa,Taub:1963:JNCb.

rawnote:
See also volumes I--III, V--VI \cite{Taub:1961:JNCa,Taub:1961:JNCb,Taub:1961:JNCc,Taub:1963:JNCa,Taub:1963:JNCb}.

entry:
@Book{Taub:1962:JNC,
  editor =       "A. H. Taub",
  booktitle =    "{John von Neumann}: Collected Works. {Volume IV}:
                 {Continuous} Geometry and Other Topics",
  title =        "{John von Neumann}: Collected Works. {Volume IV}:
                 {Continuous} Geometry and Other Topics",
  publisher =    pub-PERGAMON,
  address =      pub-PERGAMON:adr,
  pages =        "x + 516",
  year =         "1962",
  LCCN =         "????",
  bibdate =      "Wed Jun 01 16:58:29 2005",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/v/von-neumann-john.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "See also volumes I--III, V--VI
                 \cite{Taub:1961:JNCa,Taub:1961:JNCb,Taub:1961:JNCc,Taub:1963:JNCa,Taub:1963:JNCb}.",
  ZMnumber =     "0188.00102",
  acknowledgement = ack-nhfb,
}


bibtype: proceedings
filename: fparith.bib
label: Metropolis:1963:PFS
editor: N. Metropolis and A. H. Taub and John Todd and C. B. Tompkins
publisher: pub-AMS
address: pub-AMS:adr
pages: ix + 396
year: 1963
LCCN: QA297 .S987 1962
bibdate: Tue Mar 20 10:37:16 2007
bibtimestamp: 2007.03.20 10:37:16 ???
acknowledgement: ack-nhfb
raweditor: N. Metropolis and A. H. Taub and John Todd and C. B. Tompkins
booktitle:
Experimental arithmetic, high speed computing and mathematics: Proceedings of the fifteenth Symposium in Applied Mathematics of the American Mathematical Society held in Chicago, Illinois, April 12--14, 1962 and Atlantic City, New Jersey, April 16-19, 1962

title:
Experimental arithmetic, high speed computing and mathematics: Proceedings of the fifteenth Symposium in Applied Mathematics of the American Mathematical Society held in Chicago, Illinois, April 12--14, 1962 and Atlantic City, New Jersey, April 16-19, 1962

rawbooktitle:
{Experimental arithmetic, high speed computing and mathematics: Proceedings of the fifteenth Symposium in Applied Mathematics of the American Mathematical Society held in Chicago, Illinois, April 12--14, 1962 and Atlantic City, New Jersey, April 16-19, 1962}

rawtitle:
{Experimental arithmetic, high speed computing and mathematics: Proceedings of the fifteenth Symposium in Applied Mathematics of the American Mathematical Society held in Chicago, Illinois, April 12--14, 1962 and Atlantic City, New Jersey, April 16-19, 1962}

entry:
@Proceedings{Metropolis:1963:PFS,
  editor =       "N. Metropolis and A. H. Taub and John Todd and C. B.
                 Tompkins",
  booktitle =    "{Experimental arithmetic, high speed computing and
                 mathematics: Proceedings of the fifteenth Symposium in
                 Applied Mathematics of the American Mathematical
                 Society held in Chicago, Illinois, April 12--14, 1962
                 and Atlantic City, New Jersey, April 16-19, 1962}",
  title =        "{Experimental arithmetic, high speed computing and
                 mathematics: Proceedings of the fifteenth Symposium in
                 Applied Mathematics of the American Mathematical
                 Society held in Chicago, Illinois, April 12--14, 1962
                 and Atlantic City, New Jersey, April 16-19, 1962}",
  publisher =    pub-AMS,
  address =      pub-AMS:adr,
  pages =        "ix + 396",
  year =         "1963",
  LCCN =         "QA297 .S987 1962",
  bibdate =      "Tue Mar 20 10:37:16 2007",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/m/metropolis-nicholas.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  acknowledgement = ack-nhfb,
}


bibtype: book
filename: fparith.bib
label: Taub:1963:JNCa
editor: A. H. Taub
publisher: pub-PERGAMON
address: pub-PERGAMON:adr
pages: ix + 784
year: 1963
bibdate: Wed Jun 01 16:58:29 2005
bibsource: https://www.math.utah.edu/pub/tex/bib/fparith.bib
bibtimestamp: 2005.06.01 16:58:29 ???
ZMnumber: 0188.00102
acknowledgement: ack-nhfb
raweditor: A. H. Taub
booktitle:
John von Neumann: Collected Works. Volume V: Design of Computers, Theory of Automata and Numerical Analysis

title:
John von Neumann: Collected Works. Volume V: Design of Computers, Theory of Automata and Numerical Analysis

note:
See also volumes I--IV, VI cite Taub:1961:JNCa,Taub:1961:JNCb,Taub:1961:JNCc,Taub:1962:JNC,Taub:1963:JNCb.

rawbooktitle:
{John von Neumann}: Collected Works. {Volume V}: {Design} of Computers, Theory of Automata and Numerical Analysis

rawnote:
See also volumes I--IV, VI \cite{Taub:1961:JNCa,Taub:1961:JNCb,Taub:1961:JNCc,Taub:1962:JNC,Taub:1963:JNCb}.

rawtitle:
{John von Neumann}: Collected Works. {Volume V}: {Design} of Computers, Theory of Automata and Numerical Analysis

entry:
@Book{Taub:1963:JNCa,
  editor =       "A. H. Taub",
  booktitle =    "{John von Neumann}: Collected Works. {Volume V}:
                 {Design} of Computers, Theory of Automata and Numerical
                 Analysis",
  title =        "{John von Neumann}: Collected Works. {Volume V}:
                 {Design} of Computers, Theory of Automata and Numerical
                 Analysis",
  publisher =    pub-PERGAMON,
  address =      pub-PERGAMON:adr,
  pages =        "ix + 784",
  year =         "1963",
  LCCN =         "????",
  bibdate =      "Wed Jun 01 16:58:29 2005",
  bibsource =    "https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "See also volumes I--IV, VI
                 \cite{Taub:1961:JNCa,Taub:1961:JNCb,Taub:1961:JNCc,Taub:1962:JNC,Taub:1963:JNCb}.",
  ZMnumber =     "0188.00102",
  acknowledgement = ack-nhfb,
}


bibtype: book
filename: fparith.bib
label: Taub:1963:JNCb
editor: A. H. Taub
publisher: pub-PERGAMON
address: pub-PERGAMON:adr
pages: x + 538
year: 1963
bibdate: Wed Jun 01 16:58:29 2005
bibtimestamp: 2005.06.01 16:58:29 ???
ZMnumber: 0188.00102
acknowledgement: ack-nhfb
raweditor: A. H. Taub
booktitle:
John von Neumann: Collected Works. Volume VI: Theory of Games, Astrophysics, Hydrodynamics and Meteorology

title:
John von Neumann: Collected Works. Volume VI: Theory of Games, Astrophysics, Hydrodynamics and Meteorology

bibsource:
https://www.math.utah.edu/pub/bibnet/authors/d/dirac-p-a-m.bib; https://www.math.utah.edu/pub/bibnet/authors/f/fermi-enrico.bib; https://www.math.utah.edu/pub/bibnet/authors/f/forsythe-george-elmer.bib; https://www.math.utah.edu/pub/bibnet/authors/m/metropolis-nicholas.bib; https://www.math.utah.edu/pub/bibnet/authors/v/von-neumann-john.bib; https://www.math.utah.edu/pub/bibnet/authors/w/wigner-eugene.bib; https://www.math.utah.edu/pub/tex/bib/einstein.bib; https://www.math.utah.edu/pub/tex/bib/fparith.bib; https://www.math.utah.edu/pub/tex/bib/master.bib

note:
See also volumes I--V cite Taub:1961:JNCa,Taub:1961:JNCb,Taub:1961:JNCc,Taub:1962:JNC,Taub:1963:JNCa.

rawbooktitle:
{John von Neumann}: Collected Works. {Volume VI}: {Theory} of Games, Astrophysics, Hydrodynamics and Meteorology

rawnote:
See also volumes I--V \cite{Taub:1961:JNCa,Taub:1961:JNCb,Taub:1961:JNCc,Taub:1962:JNC,Taub:1963:JNCa}.

rawtitle:
{John von Neumann}: Collected Works. {Volume VI}: {Theory} of Games, Astrophysics, Hydrodynamics and Meteorology

entry:
@Book{Taub:1963:JNCb,
  editor =       "A. H. Taub",
  booktitle =    "{John von Neumann}: Collected Works. {Volume VI}:
                 {Theory} of Games, Astrophysics, Hydrodynamics and
                 Meteorology",
  title =        "{John von Neumann}: Collected Works. {Volume VI}:
                 {Theory} of Games, Astrophysics, Hydrodynamics and
                 Meteorology",
  publisher =    pub-PERGAMON,
  address =      pub-PERGAMON:adr,
  pages =        "x + 538",
  year =         "1963",
  LCCN =         "????",
  bibdate =      "Wed Jun 01 16:58:29 2005",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/d/dirac-p-a-m.bib;
                 https://www.math.utah.edu/pub/bibnet/authors/f/fermi-enrico.bib;
                 https://www.math.utah.edu/pub/bibnet/authors/f/forsythe-george-elmer.bib;
                 https://www.math.utah.edu/pub/bibnet/authors/m/metropolis-nicholas.bib;
                 https://www.math.utah.edu/pub/bibnet/authors/v/von-neumann-john.bib;
                 https://www.math.utah.edu/pub/bibnet/authors/w/wigner-eugene.bib;
                 https://www.math.utah.edu/pub/tex/bib/einstein.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib;
                 https://www.math.utah.edu/pub/tex/bib/master.bib",
  note =         "See also volumes I--V
                 \cite{Taub:1961:JNCa,Taub:1961:JNCb,Taub:1961:JNCc,Taub:1962:JNC,Taub:1963:JNCa}.",
  ZMnumber =     "0188.00102",
  acknowledgement = ack-nhfb,
}


bibtype: book
filename: fparith.bib
label: Wilkinson:1963:REA
author: J. H. Wilkinson
booktitle: Rounding Errors in Algebraic Processes
title: Rounding Errors in Algebraic Processes
volume: 32
publisher: pub-HMSO
address: pub-HMSO:adr
pages: vi + 161
year: 1963
ISBN: 0-486-67999-3 (Dover) OR 0486679993 (Dover)
ISBN13: 978-0-486-67999-0 (Dover) OR 9780486679990 (Dover)
LCCN: QA76.5 .W53 1964
MRclass: 65.80
MRnumber: MR0161456 (28 \#4661)
MRreviewer: A. S. Householder
bibdate: Sat Feb 8 10:28:55 2020
bibtimestamp: 2020.02.08 10:28:55 ???
series: Notes on Applied Science
remark: Cited in cite Sterbenz:1974:FPC.
acknowledgement: ack-nhfb
rawauthor: J. H. Wilkinson
rawbooktitle: Rounding Errors in Algebraic Processes
rawtitle: Rounding Errors in Algebraic Processes
note:
Also published by Prentice-Hall, Englewood Cliffs, NJ, USA, 1964, translated into Polish as em Bledy Zaokraglen w Procesach Algebraicznych by PWW, Warsaw, Poland, 1967 and translated into German as em Rundungsfehler by Springer-Verlag, Berlin, Germany, 1969. Reprinted by Dover Publications, New York, 1994.

TOC:
1. The Fundamental Arithmetic Operations Digital computation / 1 Fixed-point and floating-point computation / 1 Notational conventions / 2 Rounding errors in fixed-point computation / 4 Fixed-point accumulation of inner-products / 6 Rounding errors in floating-point computation / 7 Round-off with single-precision accumulator / 11 Comparison of fixed-point and floating-point computation / 14 Common floating-point operations / 16 More precise bounds / 19 Floating-point accumulation of sums and inner-products / 23 Statistical error bounds / 25 Block-floating vectors and matrices / 26 Fundamental limitations oft-digit computation / 27 Ill-conditioned problems / 28 Condition numbers / 29 Rounding errors in the computation / 30 Additional comments / 33 2. Computations Involving Polynomials Evaluation of power series / 34 Fixed-point representation / 34 Floating-point representation / 36 Calculation of zeros of functions defined by power series / 37 Polynomials with arbitrary coefficients / 38 Condition of a polynomial with respect to the computation of its zeros / 38 Some typical distributions of zeros / 41 Linear distributions of zeros / 41 Geometric distribution / 44 Chebyshev polynomial / 46 Significance of the condition of the zeros of polynomials 4 / 7 Determination of the zeros / 49 Iterative methods / 52 Effect of rounding errors on Newton's process / 53 Simple examples / 54 Polynomial deflation / 55 Analysis of errors inherent in deflation / 56 Examples of deflation / 59 Deflation of ill-conditioned polynomials / 62 General comments on iteration and deflation / 64 Purification in the original polynomial / 65 Other iterative methods / 66 The root-squaring process / 67 Forward error analysis of root-squaring / 69 Relative error in computed coefficients / 71 Numerical example / 72 Deterioration of condition / 74 General comments on the computation of zeros of polynomials / 76 Additional comments / 78 3. Matrix Computations Introduction / 79 Vector and matrix norms / 80 Error analysis of simple matrix operations / 82 Matrix multiplication / 83 Matrix operations in block-floating arithmetic / 85 Matrices which are not infinity row standardized / 85 Orthogonalization of vectors / 86 Numerical example / 87 General case / 89 Solution of equations and matrix inversion / 91 Rounding of matrix of coefficients / 93 Error analysis of Gaussian elimination / 94 Computational equations / 95 Floating-point bounds / 96 Gaussian elimination in fixed-point / 99 Determinant evaluation / 99 Solution of a triangular set of equations using standard floating-point arithmetic / 99 Accuracy of computed solution / 102 Solution of triangular set of equations with floating-point accumulation of inner-products / 103 Inversion of a triangular matrix / 104 High accuracy of solutions of triangular equations / 105 Solution of a general set of equations / 107 Inversion of a general matrix / 109 Left-handed and right-handed inverses / 110 Numerical example / 111 Comments on example / 113 Compact methods of triangular decomposition / 114 Triangular decomposition with partial pivoting / 115 Positive definite matrix / 117 Numerical example / 118 Comments on the solution / 119 Residual corresponding to block-floating solution / 120 Iterative refinement of the solution / 121 Practical procedure / 122 Analysis of the practical procedure / 124 Assessment of accuracy of the computed solution / 126 The use of an estimate for $||A^-1||$ / 126 Assessment of a computed inverse / 127 Use of the approximate inverse to solve equations / 128 Iterative procedure based on use of the approximate inverse / 130 Numerical example / 131 Sensitivity of the eigenvalues of a matrix / 134 Sensitivity of individual eigenvalues / 137 Example of ill-conditioned eigenvalues / 138 A posteriori estimates for a computed eigenvalue and eigenvector of a real symmetric matrix / 139 Calculation of the eigenvectors of a symmetric tri-diagonal matrix / 142 Effect of rounding errors / 143 Calculation of the eigenvalues of a lower Hessenberg matrix / 147 Calculation of $f(lambda )$ using floating-point accumulation / 149 Perturbation of the eigenvalues / 150 Numerical example / 151 Additional comments / 155 Bibliography / 157 Index / 159

rawnote:
Also published by Prentice-Hall, Englewood Cliffs, NJ, USA, 1964, translated into Polish as {\em Bledy Zaokragle{\'n} w Procesach Algebraicznych\/} by PWW, Warsaw, Poland, 1967 and translated into German as {\em Rundungsfehler\/} by Springer-Verlag, Berlin, Germany, 1969. Reprinted by Dover Publications, New York, 1994.

rawTOC:
1. The Fundamental Arithmetic Operations \\ Digital computation / 1 \\ Fixed-point and floating-point computation / 1 \\ Notational conventions / 2 \\ Rounding errors in fixed-point computation / 4 \\ Fixed-point accumulation of inner-products / 6 \\ Rounding errors in floating-point computation / 7 \\ Round-off with single-precision accumulator / 11 \\ Comparison of fixed-point and floating-point computation / 14 \\ Common floating-point operations / 16 \\ More precise bounds / 19 \\ Floating-point accumulation of sums and inner-products / 23 \\ Statistical error bounds / 25 \\ Block-floating vectors and matrices / 26 \\ Fundamental limitations oft-digit computation / 27 \\ Ill-conditioned problems / 28 \\ Condition numbers / 29 \\ Rounding errors in the computation / 30 \\ Additional comments / 33 \\ 2. Computations Involving Polynomials \\ Evaluation of power series / 34 \\ Fixed-point representation / 34 \\ Floating-point representation / 36 \\ Calculation of zeros of functions defined by power series / 37 \\ Polynomials with arbitrary coefficients / 38 \\ Condition of a polynomial with respect to the computation of its zeros / 38 \\ Some typical distributions of zeros / 41 \\ Linear distributions of zeros / 41 \\ Geometric distribution / 44 \\ Chebyshev polynomial / 46 \\ Significance of the condition of the zeros of polynomials 4 / 7 \\ Determination of the zeros / 49 \\ Iterative methods / 52 \\ Effect of rounding errors on Newton's process / 53 \\ Simple examples / 54 \\ Polynomial deflation / 55 \\ Analysis of errors inherent in deflation / 56 \\ Examples of deflation / 59 \\ Deflation of ill-conditioned polynomials / 62 \\ General comments on iteration and deflation / 64 \\ Purification in the original polynomial / 65 \\ Other iterative methods / 66 \\ The root-squaring process / 67 \\ Forward error analysis of root-squaring / 69 \\ Relative error in computed coefficients / 71 \\ Numerical example / 72 \\ Deterioration of condition / 74 \\ General comments on the computation of zeros of polynomials / 76 \\ Additional comments / 78 \\ 3. Matrix Computations \\ Introduction / 79 \\ Vector and matrix norms / 80 \\ Error analysis of simple matrix operations / 82 \\ Matrix multiplication / 83 \\ Matrix operations in block-floating arithmetic / 85 \\ Matrices which are not infinity row standardized / 85 \\ Orthogonalization of vectors / 86 \\ Numerical example / 87 \\ General case / 89 \\ Solution of equations and matrix inversion / 91 \\ Rounding of matrix of coefficients / 93 \\ Error analysis of Gaussian elimination / 94 \\ Computational equations / 95 \\ Floating-point bounds / 96 \\ Gaussian elimination in fixed-point / 99 \\ Determinant evaluation / 99 \\ Solution of a triangular set of equations using standard floating-point arithmetic / 99 \\ Accuracy of computed solution / 102 \\ Solution of triangular set of equations with floating-point accumulation of inner-products / 103 \\ Inversion of a triangular matrix / 104 \\ High accuracy of solutions of triangular equations / 105 \\ Solution of a general set of equations / 107 \\ Inversion of a general matrix / 109 \\ Left-handed and right-handed inverses / 110 \\ Numerical example / 111 \\ Comments on example / 113 \\ Compact methods of triangular decomposition / 114 \\ Triangular decomposition with partial pivoting / 115 \\ Positive definite matrix / 117 \\ Numerical example / 118 \\ Comments on the solution / 119 \\ Residual corresponding to block-floating solution / 120 \\ Iterative refinement of the solution / 121 \\ Practical procedure / 122 \\ Analysis of the practical procedure / 124 \\ Assessment of accuracy of the computed solution / 126 \\ The use of an estimate for $||A^{-1}||$ / 126 \\ Assessment of a computed inverse / 127 \\ Use of the approximate inverse to solve equations / 128 \\ Iterative procedure based on use of the approximate inverse / 130 \\ Numerical example / 131 \\ Sensitivity of the eigenvalues of a matrix / 134 \\ Sensitivity of individual eigenvalues / 137 \\ Example of ill-conditioned eigenvalues / 138 \\ A posteriori estimates for a computed eigenvalue and eigenvector of a real symmetric matrix / 139 \\ Calculation of the eigenvectors of a symmetric tri-diagonal matrix / 142 \\ Effect of rounding errors / 143 \\ Calculation of the eigenvalues of a lower Hessenberg matrix / 147 \\ Calculation of $f(\lambda)$ using floating-point accumulation / 149 \\ Perturbation of the eigenvalues / 150 \\ Numerical example / 151 \\ Additional comments / 155 \\ Bibliography / 157 \\ Index / 159

entry:
@Book{Wilkinson:1963:REA,
  author =       "J. H. Wilkinson",
  booktitle =    "Rounding Errors in Algebraic Processes",
  title =        "Rounding Errors in Algebraic Processes",
  volume =       "32",
  publisher =    pub-HMSO,
  address =      pub-HMSO:adr,
  pages =        "vi + 161",
  year =         "1963",
  ISBN =         "0-486-67999-3 (Dover)",
  ISBN-13 =      "978-0-486-67999-0 (Dover)",
  LCCN =         "QA76.5 .W53 1964",
  MRclass =      "65.80",
  MRnumber =     "MR0161456 (28 \#4661)",
  MRreviewer =   "A. S. Householder",
  bibdate =      "Sat Feb 8 10:28:55 2020",
  bibsource =    "https://www.math.utah.edu/pub/bibnet/authors/w/wilkinson-james-hardy.bib;
                 https://www.math.utah.edu/pub/tex/bib/fparith.bib",
  note =         "Also published by Prentice-Hall, Englewood Cliffs, NJ,
                 USA, 1964, translated into Polish as {\em Bledy
                 Zaokragle{\'n} w Procesach Algebraicznych\/} by PWW,
                 Warsaw, Poland, 1967 and translated into German as {\em
                 Rundungsfehler\/} by Springer-Verlag, Berlin, Germany,
                 1969. Reprinted by Dover Publications, New York,
                 1994.",
  series =       "Notes on Applied Science",
  acknowledgement = ack-nhfb,
  remark =       "Cited in \cite{Sterbenz:1974:FPC}.",
  tableofcontents = "1. The Fundamental Arithmetic Operations \\
                 Digital computation / 1 \\
                 Fixed-point and floating-point computation / 1 \\
                 Notational conventions / 2 \\
                 Rounding errors in fixed-point computation / 4 \\
                 Fixed-point accumulation of inner-products / 6 \\
                 Rounding errors in floating-point computation / 7 \\
                 Round-off with single-precision accumulator / 11 \\
                 Comparison of fixed-point and floating-point
                 computation / 14 \\
                 Common floating-point operations / 16 \\
                 More precise bounds / 19 \\
                 Floating-point accumulation of sums and inner-products
                 / 23 \\
                 Statistical error bounds / 25 \\
                 Block-floating vectors and matrices / 26 \\
                 Fundamental limitations oft-digit computation / 27 \\
                 Ill-conditioned problems / 28 \\
                 Condition numbers / 29 \\
                 Rounding errors in the computation / 30 \\
                 Additional comments / 33 \\
                 2. Computations Involving Polynomials \\
                 Evaluation of power series / 34 \\
                 Fixed-point representation / 34 \\
                 Floating-point representation / 36 \\
                 Calculation of zeros of functions defined by power
                 series / 37 \\
                 Polynomials with arbitrary coefficients / 38 \\
                 Condition of a polynomial with respect to the
                 computation of its zeros / 38 \\
                 Some typical distributions of zeros / 41 \\
                 Linear distributions of zeros / 41 \\
                 Geometric distribution / 44 \\
                 Chebyshev polynomial / 46 \\
                 Significance of the condition of the zeros of
                 polynomials 4 / 7 \\
                 Determination of the zeros / 49 \\
                 Iterative methods / 52 \\
                 Effect of rounding errors on Newton's process / 53 \\
                 Simple examples / 54 \\
                 Polynomial deflation / 55 \\
                 Analysis of errors inherent in deflation / 56 \\
                 Examples of deflation / 59 \\
                 Deflation of ill-conditioned polynomials / 62 \\
                 General comments on iteration and deflation / 64 \\
                 Purification in the original polynomial / 65 \\
                 Other iterative methods / 66 \\
                 The root-squaring process / 67 \\
                 Forward error analysis of root-squaring / 69 \\
                 Relative error in computed coefficients / 71 \\
                 Numerical example / 72 \\
                 Deterioration of condition / 74 \\
                 General comments on the computation of zeros of
                 polynomials / 76 \\
                 Additional comments / 78 \\
                 3. Matrix Computations \\
                 Introduction / 79 \\
                 Vector and matrix norms / 80 \\
                 Error analysis of simple matrix operations / 82 \\
                 Matrix multiplication / 83 \\
                 Matrix operations in block-floating arithmetic / 85 \\
                 Matrices which are not infinity row standardized / 85
                 \\
                 Orthogonalization of vectors / 86 \\
                 Numerical example / 87 \\
                 General case / 89 \\
                 Solution of equations and matrix inversion / 91 \\
                 Rounding of matrix of coefficients / 93 \\
                 Error analysis of Gaussian elimination / 94 \\
                 Computational equations / 95 \\
                 Floating-point bounds / 96 \\
                 Gaussian elimination in fixed-point / 99 \\
                 Determinant evaluation / 99 \\
                 Solution of a triangular set of equations using
                 standard floating-point arithmetic / 99 \\
                 Accuracy of computed solution / 102 \\
                 Solution of triangular set of equations with
                 floating-point accumulation of inner-products / 103 \\
                 Inversion of a triangular matrix / 104 \\
                 High accuracy of solutions of triangular equations /
                 105 \\
                 Solution of a general set of equations / 107 \\
                 Inversion of a general matrix / 109 \\
                 Left-handed and right-handed inverses / 110 \\
                 Numerical example / 111 \\
                 Comments on example / 113 \\
                 Compact methods of triangular decomposition / 114 \\
                 Triangular decomposition with partial pivoting / 115
                 \\
                 Positive definite matrix / 117 \\
                 Numerical example / 118 \\
                 Comments on the solution / 119 \\
                 Residual corresponding to block-floating solution / 120
                 \\
                 Iterative refinement of the solution / 121 \\
                 Practical procedure / 122 \\
                 Analysis of the practical procedure / 124 \\
                 Assessment of accuracy of the computed solution / 126
                 \\
                 The use of an estimate for $||A^{-1}||$ / 126 \\
                 Assessment of a computed inverse / 127 \\
                 Use of the approximate inverse to solve equations / 128
                 \\
                 Iterative procedure based on use of the approximate
                 inverse / 130 \\
                 Numerical example / 131 \\
                 Sensitivity of the eigenvalues of a matrix / 134 \\
                 Sensitivity of individual eigenvalues / 137 \\
                 Example of ill-conditioned eigenvalues / 138 \\
                 A posteriori estimates for a computed eigenvalue and
                 eigenvector of a real symmetric matrix / 139 \\
                 Calculation of the eigenvectors of a symmetric
                 tri-diagonal matrix / 142 \\
                 Effect of rounding errors / 143 \\
                 Calculation of the eigenvalues of a lower Hessenberg
                 matrix / 147 \\
                 Calculation of $f(\lambda)$ using floating-point
                 accumulation / 149 \\
                 Perturbation of the eigenvalues / 150 \\
                 Numerical example / 151 \\
                 Additional comments / 155 \\
                 Bibliography / 157 \\
                 Index / 159",
}


