A Bibliography of Publications on Visual Instruction Sets

Nelson H. F. Beebe University of Utah

Department of Mathematics, 110 LCB

155 S 1400 E RM 233 Salt Lake City, UT 84112-0090

USA

Tel: +1 801 581 5254 FAX: +1 801 581 4148

E-mail: beebe@math.utah.edu, beebe@acm.org,
beebe@computer.org, beebe@ieee.org (Internet)
WWW URL: http://www.math.utah.edu/~beebe/

12 December 2019 Version 2.16

Title word cross-reference

2 [IM99, Lee96, OWJF98]. 2.0 [LHxx].

3 [Hal97]. 3-D [Hal97]. 3DNow [OWJF98, OFW99, Adv00a, BN99, IM99, Fom00].

64-bit [LHxx].

7100LC [Ano95, BBJ^{+}95, BKQW95, LBLS95, Smi94]. 712/60 [Smi94]. 7300LC [BT97].

accelerate [TONH96]. Accelerates [DDHS00]. Accelerating [DDC^{+}98, Lee96, Sun96a]. achieve [Smi94]. Across [DDC^{+}98]. algorithms [TONH96]. Alpha [RRM96]. Alternatives [Ano98]. AltiVec [DDC^{+}98, DDHS00, Fit01, Ful98, Mot98, Mot99b, Mot99a, Mot99c, Phi98]. Alto [IEE98]. AMD [Adv00b, Hal97, IM99, OWJF98, OFW99, Pou98]. AMD-K62-E [Adv00b]. Analysis [IM99, SB01]. Apple [Fit01]. Application [Hun00, PW96]. Architecture [Hsu01, LHxx, MPW97, OFW99, PW96, Phi98, TO96]. architectures [Ano96a]. Aspects [Hsu01]. Assembly [Sun00]. Auditorium [IEE98]. August [IEE96, IEE97, IEE98]. Automatically [BGGT01].

based [BM00, Hun00]. Better [Ano97a]. Beyond [Hal97]. bit [LHxx]. Black [Ben95]. Blazing [Tho98]. Blinn [Bli97]. breakthroughs [Smi94]. Briefs [GL97]. Bugs [Ben95]. builds [Pou98]. Built [Pea95]. Built-In [Pea95]. Business [BEM95, GL97]. BYTE [Ano96a, Ano96b].

California [IEE96, IEE97, IEE98]. Capabilities [Pea95]. Case [BKQW95, SB01]. Centaur [Hal97]. challenge [Hal97]. Chip [Sun96b, BT97, Pou98, TO96]. Chips [Ano97b, IEE97, Hal97, IEE96, IEE98]. clock [BM00]. Code [Fom99]. Coding [Hsu01]. Combining [TO96]. commerce [Ano96b]. communications [PW96]. Competition [GL97]. Competitive [BKQW95]. Computational [Hun00]. Computer [Hsu01]. Computing [Hun00, JC98]. conference [IEE98]. Considerations [Wei96]. Contrast [Ben95]. conventional [TONH96]. Converging [GL97]. Core [Sun96a, Ano96b]. Corner [Bli97]. Cost [BEM95, Pea95, Smi94]. CPU [Mod97, Smi94]. CPUs [Tho98]. Cutting [BN99]. Cyrix [Hal97].

D [Hal97]. Data [Adv00b]. Decisions [BKQW95]. Decoder [AJ97, LBLS95]. Design [BBJ^{+}95, BKQW95]. Desktop [Ano97c]. Development [BEM95]. Digital [AJ97, GL97]. Dilemma [GL97]. Does [Tho98]. Dolby [AJ97]. Dynamic [Mod97, BM00]. Dynamics [Hun00].

Edge [BN99]. Effectively [BN99]. efficient [Lee96]. electric [Ano96b]. Embedded [Adv00b]. Emmerald [AB01]. Enhanced [Pou98, LBLS95]. Enhancements [Ano95]. Enhancing [TONH96]. Environment [BKQW95]. Environments [Mot98]. Evaluation [Hun00]. Examples [Mot99b]. Execution [Mod97]. Exploiting [BGGT01]. Extension [DDHS00, PW96]. Extensions [LHxx, Mah96, RRM96, JC98, Lee96, TH99].

Fast [Ano97b, AB01]. First [Fit01, Kag96]. Fits [Ano97a]. Floating [SGJ^{+}99]. Floating-Point [SGJ^{+}99]. Fluid [Hun00]. FORTRAN [Hun00]. FORTRAN-based [Hun00]. four [TO96]. four-issue [TO96]. free [Ano96a]. Fugue [Bli97]. Functions [Sun96a].

G4 [Fit01, Hun00]. Gaining [GL97]. gating [BM00]. Generation [Mah96, Phi98]. Graphics [Fom00, Pea95].

Hardware [Hsu01, Smi94]. High

[AJ97, BEM95, Mod97, Pea95, Smi94, TO96]. High-Performance [BEM95, Pea95, TO96]. highly [BT97]. hopped [Ano97a]. Hot [IEE96, IEE97, IEE98]. HP [Smi94].

IC [BKQW95, Ben95]. II [Mod97, KGOL97]. Imaging [Ben95]. Implementation [AJ97, Ano95, IM99, Kag96]. Implementations [OFW99]. Implicit [BGGT01]. Improving [PW96, BM00]. INBOX [Ano96b]. Information [GL97]. innovative [Smi94]. Instruction [Mah96, RRM96, Sun96a, Sun96b, Sun02, Lee96, TONH96]. Instructions [GV06, IM99, AB01, TO96]. integrated [BT97]. Intel [AB01, Ano96b, Ano97a, GL97, Hal97, KB96, PW96, PWW97, Ram99, SB01, Wei96]. Interface [Mot99a]. Internet [Ano96b, TH99]. issue [Ano97d, TO96]. issues [Ano96a]. IX [IEE97].

Jerry [Pou98]. Jim [Bli97]. Just [Ano97b].

K6 [Pou98, IM99, OWJF98]. K6-2 [IM99, OWJF98]. K62 [Adv00b]. Key [GV06].

Language [Sun00]. Levels [Ben95]. Linux [BN99]. Logic [Ben95]. Look [Fit01, Ano97c]. Low [BEM95, Pea95, Smi94]. Low-Cost [BEM95, Pea95].

Manual [Adv00a, Mot98, Mot99a, Sun00]. matrix [AB01]. matrix-matrix [AB01].

MAX [Lee96]. MAX-2 [Lee96]. Media [DDC^{+}98, DDHS00, Sun96b, TONH96, Lee96]. media-processing [TONH96]. Memorial [IEE98]. methodologies [BBJ^{+}95]. Microarchitecture [Kag96, KGOL97]. Microprocessor [BKQW95, OWJF98, Phi98, BBJ^{+}95, BT97]. Microprocessors [KGOL97]. minimal [Lee96]. MMX [AJ97, Ano96a, Ano96b, Ano97a, Ano97b, Ano97c, Ano97d, Ano98, Bli97, Dro00, Fom99, GL97, Hal97, Kag96, KGOL97, KB96, MPW97, Mod97, PW96, PWW97, Pou98, Ram99, SB01, Wei96]. Mobile [JC98]. Model [Smi94]. money [Ano96b]. Motion [RRM96]. Motorola [Ful98]. MPEG [LBLS95]. Multimedia [Ano95, LHxx, Mah96, Pea95, PWW97, SGJ^{+}99, LBLS95, PW96, TO96]. multimedia-enhanced [LBLS95]. multiply [AB01]. Multiuser [BEM95].

Networking [Pea95, Sun96a]. New-Media [Sun96b]. News [GL97]. Notes [GL97]. NT [Ano96a].

off [Ano96b, Wei96]. on-chip [TO96]. operation [BM00]. Optimization [Fom99]. Optimizing [Fom00]. Order [SGJ^{+}99]. Out-of-Order [SGJ^{+}99]. Overview [Ano95, MPW97, Ram99].

P55C [Kag96]. PA [Ano95, BBJ^{+}95, BKQW95, BT97, LBLS95, LHxx, Pea95, Smi94]. PA-7100LC [Smi94]. PA-RISC [LHxx, Pea95]. packaging [Smi94]. packing [BM00]. Palo [IEE98]. Parallelism [BGGT01, Lee96]. PC [AS96]. PCs [Ano96a, Ano97c, PWW97]. Pentium [Ano97a, Ano97c, KGOL97, Smi94]. PentiumAE [Mod97]. Performance [AS96, BEM95, Mod97, Pea95, SB01, Wei96, BM00, PW96, Smi94, TO96]. Phoning [GL97]. Point [SGJ^{+}99]. Power [Ano97c, Smi94, BM00, Hal97]. PowerMac [Hun00]. PowerPC [DDHS00, Tho98]. praise [Ano96b]. Presents [GL97]. Price [Smi94]. privacy [Ano96b]. Processing [DDC^{+}98, DDHS00, Sun96b, TONH96, JC98, Lee96]. Processor [Adv00b, Fit01, Mah96, Mod97, BM00, TO96]. Processors [KGOL97, LBLS95]. Products [Ano94]. Programming [KB96, Mot98, Mot99b, Mot99a, Ano96a, Ano96b].

Quality [AJ97].

readers [Ano96a, Ano96b]. Real [Fom00, LBLS95]. Real-Time [Fom00, LBLS95]. Reciprocal [IM99]. record [IEE96, IEE98]. Reference [Sun00]. RISC [LHxx, Pea95, TONH96]. Root [IM99]. Routines [GV06].

Scientific [Hun00]. Second [Phi98]. Series [Smi94]. Server [BEM95, Ano96a]. Set [Mah96, Sun96a, Sun02, Lee96, Sun96b]. sets [TONH96]. Sheet [Adv00b]. significantly [TONH96]. SIMD [TH99, Phi98]. Simulation [Hun00]. Sixth [Mah96]. Sixth-Generation [Mah96]. Smart [GL97]. Software [AS96, Hsu01, LBLS95]. sound [Ano96b]. souped [Ano97c]. souped-up [Ano97c]. SPARC [Sun00]. Special [Ano97d]. Spectrum [DDC^{+}98]. Speed [GV06]. Speeds [TONH96]. Square [IM99]. SSE [AB01, SB01]. Stanford [IEE96, IEE97, IEE98]. Starts [Ano97a]. strategies [BM00, KB96]. Streaming [TH99]. Studio [GV06]. Study [BKQW95, SB01]. Subword [JC98, Lee96]. Sun [GV06]. Superscalar [SGJ^{+}99, Smi94]. Support [Sun96b]. supporting [Lee96, TO96]. symposium [IEE96]. System [BEM95, BT97, Pou98]. Systems [Hun00, Ano97c, JC98].

Technology [Adv00a, AJ97, Ano97d, DDC^{+}98, Fom99, Ful98, GL97, Kag96, KGOL97, MPW97, Mod97, Mot98, Mot99a, Mot99c, OWJF98, OFW99, PW96, Phi98, Ram99, Wei96, Ano97c]. test [Ano97a]. Those [Ano97b]. Three [SGJ^{+}99]. Three-Way [SGJ^{+}99]. Time [Fom00, LBLS95]. times [PW96]. Tour [Mot99c]. Trade [Wei96]. Trade-off [Wei96]. Transitioning [GL97]. Translating [Dro00]. Tuning [AS96]. TV [GL97].

UltraSPARC [Sun96a, Sun96b, TO96]. Unit [SGJ^{+}99]. University [IEE96, IEE97, IEE98]. Unix [Smi94]. Upgrade [GL97]. uses [Pou98, Smi94]. Using [GV06, Sun96a, AJ97, AB01]. Utilizing [BN99].

Value [BM00]. Value-based [BM00]. Vector [Tho98]. Version [Sun02]. Video [RRM96, JC98, LBLS95]. VIII [IEE96]. VIS [GV06, Sun96a, Sun96b, Sun02, TONH96]. Visual [Sun96b]. Voices [GL97]. Voltage [Ben95]. Vulnerable [GL97].

Want [GL97]. Way [SGJ^{+}99]. Web [GL97]. White [Ben95]. will [Hal97]. Windows [Ano96a]. Workbench [Pou98]. Workstation [Pea95, Smi94]. write [Ano96a].

x86 [Mah96].

References

Aberdeen:2001:EFM

[AB01] Douglas Aberdeen and Jonathan Baxter. Emmerald: a fast matrixmatrix multiply using Intel’s SSE instructions. Concurrency and Computation: Practice and Experience, 13(2):103–119, February 2001. CODEN CCPEBO.

ISSN 1532-0626 (print), 1532-0634 (electronic). URL http:/

/www3.interscience.wiley.com/
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AMD:2000:TM

[Adv00a] Advanced Micro Devices, Inc., One AMD Place, P.O. Box 3453, Sunnyvale, California, USA. 3DNow! Technology Manual, March

2000.  x + 62 pp.  URL

http://www.amd.com/products/
epd/processors/6.32bitproc/8.
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pdf. Order number 21928G/0.

AMD:2000:AKE

[Adv00b] Advanced Micro Devices, Inc., One AMD Place, P.O. Box 3453, Sunnyvale, California, USA. AMD-K62-E+ Embedded Processor Data Sheet, September 2000. xxii + 346 pp. URL

http://www.amd.com/products/
epd/processors/6.32bitproc/8.
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pdf. Order number 23542A/0.

Abel:1997:IHQ

[AJ97] James C. Abel and Michael A. Julier. Implementation of a high quality Dolby digital decoder using MMX technology. Intel Technology Journal, (Q3):11, 1997.

URL http://developer.intel.
com/technology/itj/q31997/articles/
art_3.htm;   http://developer.
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Anonymous:1994:NPd

[Ano94] Anonymous. New Products. Datamation, 40(4):85–??, February 15, 1994. CODEN DTMNAT. ISSN 0011-6963.

Anonymous:1995:OIP

[Ano95] Anonymous. Overview of the implementation of the PA 7100LC multimedia enhancements. Hewlett-Pack-ard Journal: technical information from the laboratories of Hewlett-Packard Company, 46(2):66, April 1995. CODEN HPJOAX. ISSN

0018-1153. URL http://www.hp.
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Anonymous:1996:BRW

[Ano96a] Anonymous. BYTE readers write about new server architectures, Windows NT issues, MMX programming, and “free PCs”. Byte Magazine, 21(10):19–??, October 1996. CODEN BYTEDJ. ISSN 0360-5280 (print), 1082-7838 (electronic).

Anonymous:1996:IBRa

[Ano96b] Anonymous. INBOX — BYTE readers sound off on electric money, Internet commerce and privacy, programming for Intel’s MMX, and praise the core of BYTE. Byte Magazine, 21(9):19–??, September 1996. CODEN BYTEDJ. ISSN 0360-5280 (print), 1082-7838 (electronic).

Anonymous:1997:BFS

[Ano97a] Anonymous. Better in fits and starts — we test a new Pentium hopped up with Intel’s MMX. Byte Magazine, 22(2):26–??, February 1997. CODEN BYTEDJ. ISSN 0360-5280 (print), 1082-7838 (electronic).

Anonymous:1997:JHF

[Ano97b] Anonymous. Just how fast are those new MMX chips? Byte Magazine, 22(2):26–??, February 1997. CO-DEN BYTEDJ. ISSN 0360-5280 (print), 1082-7838 (electronic).

Anonymous:1997:MPD

[Ano97c] Anonymous. MMX power for desktop PCs: We look at 10 Pentium systems souped-up with MMX technology. Byte Magazine, 22(7):106– ??, July 1997. CODEN BYTEDJ. ISSN 0360-5280 (print), 1082-7838 (electronic).

Anonymous:1997:SIM

[Ano97d] Anonymous. Special issue on MMX technology. Intel Technology Journal, (Q3), 1997. URL http://

                                        developer.intel.com/technology/
                                        itj/q31997.htm.

Anonymous:1998:MA

[Ano98] Anonymous. MMX alternatives. Byte Magazine, 23(7):26–??, July 1998. CODEN BYTEDJ. ISSN 0360-5280 (print), 1082-7838 (electronic).

Atkins:1996:PSP

[AS96] Mark Atkins and Ramesh Subramaniam. PC software performance tuning. Computer, 29(8):47–54, August 1996. CODEN CPTRB4. ISSN 0018-9162 (print), 1558-0814 (electronic).

Bass:1995:DMP

[BBJ^{+}95] Mick Bass, Terry W. Blanchard, D. Douglas Josephson, Duncan Weir, and Daniel L. Halperin. Design methodologies for the PA 7100LC microprocessor. Hewlett-Packard Journal: technical information from the laboratories of Hewlett-Packard Company, 46 (2):23–35, April 1995. CO-DEN HPJOAX. ISSN 0018-1153.

URL http://www.hp.com/hpj/
95apr/apr95_23.pdf;   http://
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Bowers:1995:DLC

[BEM95] Dennis A. Bowers, Gerard M.

Enkerlin, and Karen L. Murillo. Development of a low-cost, highperformance, multiuser business server system. Hewlett-Packard Journal: technical information from the laboratories of Hewlett-Pack-ard Company, 46(2):79–84, April 1995. CODEN HPJOAX. ISSN

0018-1153. URL http://www.hp.
com/hpj/95apr/apr95_79.pdf;
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95.html.

Benzel:1995:BBW

[Ben95] Jack D. Benzel. Bugs in black and white: Imaging IC logic levels with voltage contrast. Hewlett-Packard Journal: technical information from the laboratories of Hewlett-Pack-ard Company, 46(2):102–106, April 1995. CODEN HPJOAX. ISSN

0018-1153. URL http://www.hp.
com/hpj/95apr/apr95_1b.pdf;
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Bik:2001:AEI

[BGGT01] Aart J. C. Bik, Milind Girkar, Paul M. Grey, and Xinmin Tian. Automatically exploiting implicit parallelism. Dr. Dobb’s Journal of Software Tools, 26(7):28, 30, 32–34, July 2001. CO-DEN DDJOEB. ISSN 1044-

                                        789X. URL http://www.ddj.com/
                                        ftp/2001/2001_07/parallel.txt.

Bass:1995:PMC

[BKQW95] Mick Bass, Patrick Knebel, David W. Quint, and William L. Walker. The PA 7100LC microprocessor: A case study of IC design decisions in a competitive environment. Hewlett-Packard Journal: technical information from the laboratories of Hewlett-Pack-ard Company, 46(2):12–22, April 1995. CODEN HPJOAX. ISSN

                                        0018-1153. URL http://www.hp.
                                        com/hpj/95apr/apr95_12.pdf;
                                        http://www.hp.com/hpj/toc-04-
                                        95.html.

Blinn:1997:JBC

[Bli97] James F. Blinn. Jim Blinn’s corner: Fugue for MMX. IEEE Computer Graphics and Applications, 17(2): 88–93, March/April 1997. CODEN ICGADZ. ISSN 0272-1716 (print), 1558-1756 (electronic). Makes several cogent comments about deficiencies in the Intel MMX pixelprocessing instruction set [PWW97] for use in image compositing.

Brooks:2000:VBC

[BM00] David Brooks and Margaret Martonosi. Value-based clock gating and operation packing: dynamic strategies for improving processor power and performance. ACM Transactions on Computer Systems, 18(2): 89–126, May 2000. CODEN AC-SYEC. ISSN 0734-2071 (print), 1557-7333 (electronic). URL http:

//www.acm.org/pubs/citations/
journals/tocs/2000-18-2/p89-
brooks/.

Bush:1999:CEE

[BN99] Jonathan Bush and Timothy S.

Newman. The cutting edge: Effectively utilizing 3DNow! in Linux. Linux Journal, 68:??, December 1999. CODEN LIJOFX. ISSN 1075-3583 (print), 1938-3827 (electronic). URL http://

noframes.linuxjournal.com/lj-
issues/issue68/3685.html.

Blanchard:1997:PMH

[BT97] T. W. Blanchard and P. G. Tobin. The PA 7300LC microprocessor: a highly integrated system on a chip. Hewlett-Packard Journal: technical information from the laboratories of Hewlett-Packard Company, 48(3):43–47, June 1997. CODEN HPJOAX. ISSN 0018-

1153. URL http://www.hp.com/
hpj/97jun/ju97a6.htm.

Diefendorff:1998:ATA

[DDC^{+}98] K. Diefendorff, P. Dubey, R. Chochsprung, et al. AltiVec technology: Accelerating media processing across the spectrum. In IEEE [IEE98], page ?? ISBN ???? LCCN ????

Diefendorff:2000:AEP

[DDHS00] Keith Diefendorff, Pradeep K.

Dubey, Ron Hochsprung, and Hunter Scales. AltiVec extension to PowerPC accelerates media processing. IEEE Micro, 20(2):85– 95, March/April 2000. CODEN IEMIDZ. ISSN 0272-1732 (print), 1937-4143 (electronic). URL http:

                                        //dlib.computer.org/mi/books/
                                        mi2000/pdf/m2085.pdf.

Drongowski:2000:TM

[Dro00] Paul J. Drongowski. Translating MMX. Computer, 33(3):43, March 2000. CODEN CPTRB4. ISSN 0018-9162 (print), 1558-0814 (electronic). URL http://dlib.

                                        computer.org/co/books/co2000/
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Fite:2001:FLA

[Fit01] Matthew Fite. First look at an Apple G4 with the AltiVec processor. Linux Journal, 86:108, 110–111, 114, 116, 118, June 2001. CODEN LIJOFX. ISSN 1075-3583 (print), 1938-3827 (electronic). URL http:

                                        //noframes.linuxjournal.com/
                                        lj-issues/issue86/4584.html.

Fomitchev:1999:MTC

[Fom99] Max I. Fomitchev. MMX technology code optimization. Dr. Dobb’s Journal of Software Tools, 24(9):38, 40, 42–46, 48, September 1999. CODEN DDJOEB. ISSN

                                        1044-789X. URL http://www.ddj.
                                        com/ftp/1999/1999_09/mmx.txt;
                                         http://www.ddj.com/ftp/1999/
                                        1999_09/mmx.zip.

Fomitchev:2000:ORT

[Fom00] Max I. Fomitchev. Optimizing 3Dnow! real-time graphics. Dr. Dobb’s Journal of Software Tools, 25(8):40, 42–46, August 2000. CO-DEN DDJOEB. ISSN 1044-

789X. URL http://www.ddj.com/
ftp/2000/2000_08/3dnow.txt;
http://www.ddj.com/ftp/2000/
2000_08/3dnow.zip.

Fuller:1998:MAT

[Ful98] Sam Fuller. Motorola’s AltiVec technology. Technical Report ALTIVECWP/D, Motorola Corporation, Phoenix, AZ,

USA, 1998.  4 pp.  URL

http://a1888.g.akamai.net/7/
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motorola.com/SPS/PowerPC/teksupport/
teklibrary/papers/altivec_wp.
pdf.

Grosky:1997:NSV

[GL97] William Grosky and Anne C. Lear.

In the news: Smart but vulnerable; transitioning to digital TV; gaining voices; business briefs; technology notes; phoning the Web; converging competition; Intel presents MMX

— and another upgrade dilemma; want more information? IEEE MultiMedia, 4(1):12–16, January– March 1997. CODEN IEMUE4. ISSN 1070-986X (print), 1941-0166 (electronic). URL http://dlib.

computer.org/mu/books/mu1997/
pdf/u1012.pdf.

Gove:2006:SSU

[GV06] Darryl Gove and Geetha Vallabhanen. Sun Studio: Using VIS instructions to speed up key routines. Sun Developer Network, January 5,

2006. URL http://developers.
sun.com/prodtech/cc/articles/
vis.html.

Halfhill:1997:BMN

[Hal97] Tom R. Halfhill. Beyond MMX — new 3-D power of AMD, Centaur, and Cyrix chips will challenge Intel. Byte Magazine, 22(12):87–??, December 1997. CODEN BYTEDJ. ISSN 0360-5280 (print), 1082-7838 (electronic).

Hsu:2001:CAS

[Hsu01] John Y. Hsu. Computer Architecture: Software Aspects, Coding, Hardware. CRC Press, 2000 N.W. Corporate Blvd., Boca Raton, FL 33431-9868, USA, 2001. ISBN 0-8493-1026-1, 1-351-83604-8, 1-4200-4110-X (e-book). 427 pp. LCCN A76.9.A73 H758 2001. US$89.95, UK£59.99.

Hunter:2000:EPG

[Hun00] Craig A. Hunter. An evaluation of PowerMac G4 systems for FORTRAN-based scientific computing with application to computational fluid dynamics simulation. Technical report, NASA Langley Research Center, Configuration Aerodynamics Branch, Hampton, VA, USA, July 2000.

                                        URL http://ad-www.larc.nasa.
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IEEE:1996:HCV

[IEE96] IEEE, editor. Hot chips VIII: symposium record: Stanford University, Stanford, California, August 18–20, 1996. IEEE Computer Society Press, 1109 Spring Street, Suite 300, Silver Spring, MD 20910, USA, 1996. ISBN ???? LCCN ????

IEEE:1997:HCI

[IEE97] IEEE, editor. Hot Chips IX: Stanford University, Stanford, California, August 24–26, 1997. IEEE Computer Society Press, 1109 Spring Street, Suite 300, Silver Spring, MD 20910, USA, 1997. ISBN ???? LCCN ????

IEEE:1998:HCC

[IEE98] IEEE, editor. Hot chips 10:

conference record: August 16–18, 1998, Memorial Auditorium, Stanford University, Palo Alto, California. IEEE Computer Society Press, 1109 Spring Street, Suite 300, Silver Spring, MD 20910, USA, 1998. ISBN ???? LCCN ????

Iordache:1999:ARS

[IM99] Cristina Iordache and David W.

Matula. Analysis of reciprocal and square root reciprocal instructions in the AMD K6-2 implementation of 3DNow! Electronic Notes in Theoretical Computer Science, 24:34–62, 1999. CODEN ???? ISSN 1571-0661.

Jennings:1998:MCS

[JC98] Matthew D. Jennings and Thomas M.

Conte. Mobile computing: Subword extensions for video processing on mobile systems. IEEE Concurrency, 6(3):13–16, July/September 1998. CODEN IECMFX. ISSN 1092-3063 (print), 1558-0849 (electronic).

URL http://dlib.computer.org/
pd/books/pd1998/pdf/p3013.pdf.

Kagan:1996:PMF

[Kag96] Michael Kagan. The P55C microarchitecture — the first implementation of MMX technology. In IEEE [IEE96], pages 157–162. ISBN ???? LCCN ????

Khazam:1996:PSI

[KB96] Jonathan Khazam and Bev Bachmayer. Programming strategies for Intel’s MMX. Byte Magazine, 21(8): 63–64, August 1996. CODEN BYT-EDJ. ISSN 0360-5280 (print), 1082-7838 (electronic).

Kagan:1997:MMP

[KGOL97] Michael Kagan, Simcha Gochman, Doron Orenstien, and Derrick Lin. MMX microarchitecture of Pentium processors with MMX technology and Pentium II microprocessors. Intel Technology Journal, (Q3):8,

1997. URL http://developer.
intel.com/technology/itj/q31997/
articles/art_4.htm;   http://
developer.intel.com/technology/
itj/q31997/pdf/micro.pdf.

Lee:1995:RTS

[LBLS95] Ruby B. Lee, John P. Beck, Joel Lamb, and Kenneth E. Severson. Real-time software MPEG video decoder on multimedia-enhanced PA 7100LC processors. Hewlett-Pack-ard Journal: technical information from the laboratories of Hewlett-Packard Company, 46(2):60–68, April 1995. CODEN HPJOAX. ISSN 0018-1153. URL http:

//www.hp.com/hpj/95apr/apr95_
60.pdf;   http://www.hp.com/
hpj/toc-04-95.html.

Lee:1996:SPM

[Lee96] Ruby B. Lee. Subword parallelism with MAX-2: Accelerating media processing with a minimal set of instruction extensions supporting efficient subword parallelism. IEEE Micro, 16(4):51–59, July/August 1996. CODEN IEMIDZ. ISSN 0272-1732 (print), 1937-4143 (electronic).

Lee:19xx:BME

[LHxx] Ruby Lee and Jerry Huck. 64-bit and multimedia extensions in the PA-RISC 2.0 architecture. Technical report, Hewlett–Packard Company, 19410 Homestead Road, Cupertino, CA 95014, USA,

19xx. URL http://www.hp.com/
computing/framed/technology/
micropro/architecture/docs/pa2go3.
html.

Maher:1996:MIS

[Mah96] Robert Maher. Multimedia instruction set extensions for a sixthgeneration x86 processor. In IEEE [IEE96], pages 163–170. ISBN ???? LCCN ????

Modi:1997:PIC

[Mod97] Nimish Modi. The PentiumAE II CPU: A high performance dynamic execution processor with MMX technology. In IEEE [IEE97], page ?? ISBN ???? LCCN ????

Motorola:1998:ATP

[Mot98] Motorola Corporation, Phoenix, AZ, USA. AltiVec Technology Programming Environments Manual, November 1998. 350 pp. Order number ALTIVECPEM/D 11/1998 Rev. 0.1.

Motorola:1999:ATP

[Mot99a] Motorola Corporation, Phoenix, AZ, USA. AltiVec Technology Programming Interface Manual, June 1999. 262 pp. Order number AL-TIVECPIM/D 6/1999 Rev. 0.

Motorola:1999:APE

[Mot99b] Motorola, Inc. AltiVec programming examples. World-Wide Web document., December 9, 1999.

URL http://www.motorola.com/
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Motorola:1999:ATT

[Mot99c] Motorola, Inc. AltiVec technology tour. World-Wide Web document., December 9, 1999. URL http://

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Mittal:1997:MTA

[MPW97] Millind Mittal, Alex Peleg, and Uri Weiser. MMX technology architecture overview. Intel Technology Journal, (Q3):12, 1997.

URL http://developer.intel.
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Oberman:1999:ATA

[OFW99] Stuart Oberman, Greg Favor, and Fred Weber. AMD 3DNow! technology: Architecture and implementations. IEEE Micro, 19(2): 37–48, March/April 1999. CO-DEN IEMIDZ. ISSN 0272-1732 (print), 1937-4143 (elec-

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Oberman:1998:ATK

[OWJF98] Stuart Oberman, Fred Weber, Norbert Juffa, and Greg Favor. AMD 3DNow! technology and the K6-2 microprocessor. In IEEE [IEE98], pages 245–254. ISBN ???? LCCN ????

Pearson:1995:LCH

[Pea95] Roger A. Pearson. A low-cost, high-performance PA-RISC workstation with built-in graphics, multimedia, and networking capabilities. Hewlett-Packard Journal: technical information from the laboratories of Hewlett-Pack-ard Company, 46(2):6–11, April 1995. CODEN HPJOAX. ISSN

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Phillip:1998:ATS

[Phi98] Mike Phillip. AltiVec technology:

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Pournelle:1998:WJB

[Pou98] Jerry Pournelle. From the workbench — Jerry builds a new system that uses AMD’s K6 MMX enhanced chip. Byte Magazine, 23 (1):123–??, January 1998. CODEN BYTEDJ. ISSN 0360-5280 (print), 1082-7838 (electronic).

Peleg:1996:MTE

[PW96] Alex Peleg and Uri Weiser. MMX technology extension to the Intel architecture — improving multimedia and communications application performance by 1.5 to 2 times. IEEE Micro, 16(4):42–50, July/ August 1996. CODEN IEMIDZ. ISSN 0272-1732 (print), 1937-4143 (electronic).

Peleg:1997:IMM

[PWW97] Alex Peleg, Sam Wilkie, and Uri Weiser. Intel MMX for multimedia PCs. Communications of the ACM, 40(1):24–38, January 1997. CODEN CACMA2. ISSN 0001-0782 (print), 1557-7317 (electronic).

URL http://www.acm.org/pubs/
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Ramirez:1999:OIM

[Ram99] Ariel Ortiz Ramirez. An overview of Intel’s MMX technology. Linux Journal, 61:??, May 1999. CODEN LIJOFX. ISSN 1075-3583 (print), 1938-3827 (electronic).

Rubinfeld:1996:MVI

[RRM96] Paul Rubinfeld, Bob Rose, and Michael McCallig. Motion video instruction extensions for alpha. Technical report, Semiconductor Engineering Group, 77 Reed Road, HLO2-3/D11 Hudson, MA 01749, USA, October 18, 1996.

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Strey:2001:PAI

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Scherer:1999:OTW

[SGJ^{+}99] Alisa Scherer, Michael Golden, Norbert Juffa, Stephan Meier, Stuart Oberman, Hamid Partovi, and Fred Weber. An out-of-order three-way superscalar multimedia floating-point unit. In 1999 IEEE International Solid-State Circuits Conference, page ?? IEEE Computer Society Press, 1109 Spring Street, Suite 300, Silver Spring, MD 20910, USA, 1999. ISBN 0-7803-5129-0. LCCN ????

Smith:1994:PWA

[Smi94] Ben Smith. Power workstation at a Pentium price: The HP 9000 Series 700 Model 712/60 uses innovative hardware packaging and the superscalar PA-7100LC CPU to achieve breakthroughs in low cost and high performance for a Unix workstation. Byte Magazine, 19(7):161–??, July 1994. CODEN BYTEDJ. ISSN 0360-5280 (print), 1082-7838 (electronic).

Sun:1996:ACN

[Sun96a] Sun Microsystems. Accelerating core networking functions using the UltraSPARC VIS instruction set. Technical Report WPR-0013, Sun Microsystems, 901 San Antonio Road, Palo Alto, CA 94303-4900, USA, August

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Sun:1996:UVI

[Sun96b] Sun Microsystems. UltraSPARC: The Visual Instruction Set (VIS): On chip support for new-media processing. Technical Report WPR-0004, Sun Microsystems, 901 San Antonio Road, Palo Alto, CA 94303-4900, USA, 1996. URL http:

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Sun:2000:SAL

[Sun00] Sun Microsystems, 901 San Antonio Road, Palo Alto, CA 94303-4900, USA. SPARC Assembly Language Reference Manual, February 2000.

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Sun:2002:VIS

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Thakkar:1999:ISS

[TH99] Shreekant (Ticky) Thakkar and Tom Huff. The Internet Streaming SIMD Extensions. Intel Technology Journal, (Q2):8, May 17, 1999.

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Thompson:1998:CPD

[Tho98] Tom Thompson. CPUs: PowerPC does blazing vector. Byte Magazine, 23(7):43–??, July 1998. CODEN BYTEDJ. ISSN 0360-5280 (print), 1082-7838 (electronic).

Tremblay:1996:UFI

[TO96] Marc Tremblay and J. Michael O’Connor. UltraSparc I: A fourissue processor supporting multimedia: Combining on-chip multimedia instructions with a highperformance, four-issue architecture. IEEE Micro, 16(2):42– 50, March/April 1996. CODEN IEMIDZ. ISSN 0272-1732 (print), 1937-4143 (electronic). Presented at Hot Chips VII, Stanford University, Stanford, California, August 1995.

Tremblay:1996:VSN

[TONH96] Marc Tremblay, J. Michael O’Connor, Venkatesh Narayanan, and Liang He. VIS speeds new media processing — enhancing conventional RISC instruction sets to significantly accelerate mediaprocessing algorithms. IEEE Micro, 16(4):10–20, July/August 1996. CODEN IEMIDZ. ISSN 0272-1732 (print), 1937-4143 (electronic).

Weiser:1996:TCP

[Wei96] Uri Weiser. Trade-off considerations and performance of Intel’s MMX technology. In IEEE [IEE96], pages 147–156. ISBN ???? LCCN ????