Last update: Sat Oct 14 02:56:46 MDT 2017
@Article{Haridas:2004:FIC, author = "Satchidanand G. Haridas and Sotirios G. Ziavras", title = "{FPGA} implementation of a {Cholesky} algorithm for a shared-memory multiprocessor architecture", journal = j-PARALLEL-ALGORITHMS-APPL, volume = "19", number = "4", pages = "211--226", month = "????", year = "2004", CODEN = "PAAPEC", DOI = "https://doi.org/10.1080/10637190412331279957", ISSN = "1063-7192", bibdate = "Thu Jul 10 21:46:37 MDT 2008", bibsource = "http://www.math.utah.edu/pub/tex/bib/parallelalgorithmsappl.bib", URL = "http://www.informaworld.com/smpp/content~content=a714592657", acknowledgement = ack-nhfb, journal-URL = "http://www.tandfonline.com/loi/gpaa20", }