Last update: Wed Sep 26 02:10:29 MDT 2018
Top |
Symbols |
Numbers |
Math |
A |
B |
C |
D |
E |
F |
G |
H |
I |
J |
K |
L |
M |
N |
O |
P |
Q |
R |
S |
T |
U |
V |
W |
X |
Y |
Z
BibTeX entry
@InProceedings{Bataineh:1992:PIE,
author = "A. Bataineh and F. Ozguner",
title = "Parallel-and-vector implementation of the event-driven
logic simulation algorithm on the {Cray Y-MP}
supercomputer",
crossref = "IEEE:1992:PSM",
pages = "444--452",
year = "1992",
bibdate = "Wed Apr 15 15:37:20 MDT 1998",
acknowledgement = ack-nhfb,
classification = "B1130B (Computer-aided circuit analysis and design);
B1265B (Logic circuits); C5210B (Computer-aided logic
design); C6185 (Simulation techniques); C7410D
(Electronic engineering)",
corpsource = "Cray Research Inc., Eagan, MN, USA",
keywords = "circuit analysis computing; Cray Y-MP supercomputer;
discrete event simulation; event-driven logic
simulation algorithm; general-purpose shared-memory
parallel machine; large digital circuits; logic CAD;
parallel/vector implementation; vector processors",
sponsororg = "IEEE; ACM",
treatment = "A Application; P Practical",
}
Related entries
- algorithm,
0(0)xxiv--848,
0(0)32,
0(0)42,
0(0)52,
0(0)64,
0(0)94,
0(0)114,
0(0)132,
0(0)166,
0(0)170,
0(0)180,
0(0)204,
0(0)286,
0(0)358,
0(0)453,
0(0)488,
0(0)512,
0(0)522,
0(0)538,
0(0)543,
0(0)578,
0(0)778
- analysis,
0(0)42,
0(0)83,
0(0)142,
0(0)214,
0(0)301,
0(0)512,
0(0)636,
0(0)718
- circuit,
0(0)154,
0(0)468
- computing,
0(0)xxiv--848,
0(0)64,
0(0)73,
0(0)126,
0(0)142,
0(0)154,
0(0)162,
0(0)238,
0(0)275,
0(0)286,
0(0)294,
0(0)301,
0(0)414,
0(0)424,
0(0)453,
0(0)538,
0(0)543,
0(0)551,
0(0)561,
0(0)570,
0(0)636,
0(0)750,
0(0)778,
0(0)797
- Cray,
0(0)73,
0(0)94,
0(0)132,
0(0)180,
0(0)424
- design,
0(0)316,
0(0)326,
0(0)348,
0(0)358,
0(0)468,
0(0)598,
0(0)626,
0(0)636,
0(0)652
- digital,
0(0)73,
0(0)316,
0(0)543,
0(0)626
- electronic,
0(0)258
- engineering,
0(0)64,
0(0)478,
0(0)538,
0(0)561
- general-purpose,
0(0)551
- implementation,
0(0)42,
0(0)132,
0(0)778
- large,
0(0)275,
0(0)301,
0(0)551,
0(0)636
- machine,
0(0)180,
0(0)238,
0(0)245,
0(0)267,
0(0)286,
0(0)294,
0(0)394,
0(0)522,
0(0)551,
0(0)561,
0(0)772,
0(0)818
- memory, shared-,
0(0)104,
0(0)245,
0(0)326,
0(0)348,
0(0)488,
0(0)652
- MP, Y-,
0(0)42,
0(0)73,
0(0)132,
0(0)414
- processor,
0(0)94,
0(0)104,
0(0)114,
0(0)214,
0(0)230,
0(0)316,
0(0)403,
0(0)478,
0(0)512,
0(0)522,
0(0)543,
0(0)642,
0(0)674,
0(0)740,
0(0)750,
0(0)760,
0(0)808,
0(0)818,
0(0)830
- purpose, general-,
0(0)551
- shared-memory,
0(0)104,
0(0)245,
0(0)326,
0(0)348,
0(0)488,
0(0)652
- simulation,
0(0)73,
0(0)142,
0(0)294,
0(0)301,
0(0)316,
0(0)348,
0(0)358,
0(0)386,
0(0)424,
0(0)433,
0(0)512,
0(0)543,
0(0)561,
0(0)570,
0(0)588,
0(0)598,
0(0)636,
0(0)674,
0(0)683,
0(0)692,
0(0)718
- supercomputer,
0(0)xxiv--848,
0(0)14,
0(0)166,
0(0)258,
0(0)301,
0(0)386,
0(0)414,
0(0)424,
0(0)543,
0(0)588,
0(0)616,
0(0)704,
0(0)740,
0(0)808
- technique,
0(0)14,
0(0)20,
0(0)73,
0(0)104,
0(0)126,
0(0)155,
0(0)162,
0(0)238,
0(0)245,
0(0)258,
0(0)267,
0(0)275,
0(0)286,
0(0)294,
0(0)301,
0(0)316,
0(0)326,
0(0)336,
0(0)348,
0(0)368,
0(0)386,
0(0)394,
0(0)403,
0(0)414,
0(0)424,
0(0)453,
0(0)478,
0(0)512,
0(0)522,
0(0)543,
0(0)551,
0(0)578,
0(0)588,
0(0)616,
0(0)638,
0(0)642,
0(0)652,
0(0)661,
0(0)674,
0(0)683,
0(0)692,
0(0)704,
0(0)818,
0(0)830
- vector,
0(0)32,
0(0)94,
0(0)180,
0(0)316,
0(0)358,
0(0)403,
0(0)414,
0(0)468,
0(0)488,
0(0)578,
0(0)642,
0(0)787
- Y-MP,
0(0)42,
0(0)73,
0(0)132,
0(0)414