Entry DePrisco:1998:TRV from tcs1995.bib
Last update: Sun Oct 15 02:56:11 MDT 2017
Top |
Symbols |
Numbers |
Math |
A |
B |
C |
D |
E |
F |
G |
H |
I |
J |
K |
L |
M |
N |
O |
P |
Q |
R |
S |
T |
U |
V |
W |
X |
Y |
Z
BibTeX entry
@Article{DePrisco:1998:TRV,
author = "Roberto {De Prisco} and Angelo Monti and Linda Pagli",
title = "Testing and reconfiguration of {VLSI} linear arrays",
journal = j-THEOR-COMP-SCI,
volume = "197",
number = "1--2",
pages = "171--188",
day = "15",
month = may,
year = "1998",
CODEN = "TCSCDI",
ISSN = "0304-3975 (print), 1879-2294 (electronic)",
ISSN-L = "0304-3975",
bibdate = "Mon Oct 26 09:00:49 MST 1998",
bibsource = "http://www.math.utah.edu/pub/tex/bib/tcs1995.bib",
acknowledgement = ack-nhfb,
classification = "B2570 (Semiconductor integrated circuits); C4240C
(Computational complexity); C5440 (Multiprocessing
systems); C5470 (Performance evaluation and testing)",
conftitle = "Linear Logic '96 (papers in summary form only
received)",
corpsource = "Lab. for Comput. Sci., MIT, Cambridge, MA, USA",
fjournal = "Theoretical Computer Science",
journal-URL = "http://www.sciencedirect.com/science/journal/03043975/",
keywords = "bidirectional arrays; bypass links; computational
complexity; fault pattern; fault tolerance; fault
tolerant computing; NP-hard; optimality; parallel
processing; reconfiguration; reconfigured array;
redundancy; VLSI; VLSI linear arrays",
pubcountry = "Netherlands",
treatment = "A Application; P Practical",
}
Related entries
- array,
141(1)331,
143(1)23,
147(1)211,
179(1)251,
187(1)231,
196(1)289,
197(1)171-1
- C5440,
140(2)319,
143(1)73,
162(2)245,
162(2)283,
169(1)39,
186(1)171
- C5470,
164(1)107,
182(1)159,
182(1)203,
185(2)259,
196(1)319,
196(1)347
- circuit,
137(1)109,
137(2)279,
141(1)283,
143(2)335,
148(1)33,
154(1)23,
156(1)99,
157(1)91,
158(1)193,
161(1)141,
162(1)133,
163(1)283,
174(1)137,
180(1)325,
182(1)171,
188(1)117,
191(1)97,
191(1)215,
197(1)57,
209(1)47,
209(1)389
- computing,
137(1)129,
138(1)211,
139(1)69,
141(1)1,
141(1)175,
147(1)181,
149(1)101,
155(1)157,
156(1)99,
156(1)217,
157(1)115,
161(1)69,
163(1)269,
164(1)107,
164(1)299,
168(2)321,
169(1)67,
174(1)123,
180(1)115,
180(1)287,
181(1)159,
181(1)181,
181(1)195,
182(1)159,
185(2)259,
187(1)81,
187(1)87,
187(1)105,
187(1)117,
187(1)123,
187(1)147,
187(1)221,
187(1)231,
187(1)249,
187(1)263,
187(1)z,
190(1)61,
191(1)1,
192(2)315,
194(1)123,
194(1)225,
194(1)241,
194(1)242-1,
194(1)z,
195(1)3,
196(1)109,
196(1)153,
196(1)319,
197(1)79,
197(1)157,
199(1)145,
209(1)331,
209(1)389
- De Prisco, Roberto,
143(1)175,
156(1)315
- evaluation,
140(1)73,
142(1)125,
143(1)167,
146(1)145,
162(1)133,
163(1)269,
164(1)107,
171(1)25,
171(1)179,
178(1)237,
181(1)45,
182(1)159,
182(1)203,
185(2)259,
187(1)105,
187(1)203,
187(1)231,
195(2)155,
196(1)31,
196(1)241,
196(1)319,
196(1)347,
210(1)199
- fault,
164(1)107,
170(1)47,
182(1)159,
185(2)259,
196(1)319
- hard;, NP-,
143(1)93,
143(1)113,
147(1)181,
161(1)123,
181(2)379
- links,
158(1)117,
196(1)153
- Monti, Angelo,
179(1)251,
197(1)171-1
- multiprocessing,
140(2)319,
143(1)73,
149(2)299,
154(1)107,
156(1)203,
162(2)245,
162(2)283,
169(1)39,
186(1)171
- NP-hard,
143(1)93,
143(1)113,
147(1)181,
161(1)123,
162(2)225,
169(1)23,
181(2)379,
191(1)229
- optimality,
168(2)367,
197(1)189
- Pagli, Linda,
197(1)171-1
- pattern,
137(1)25,
138(1)113,
140(2)319,
141(1)53,
141(1)253,
141(1)283,
145(1)1,
145(1)159,
145(1)329,
145(1)357,
147(1)19,
152(2)171,
154(2)165,
154(2)183,
154(2)203,
155(2)321,
155(2)349,
156(1)217,
158(1)177,
160(1)217,
163(1)117,
163(1)303,
172(1)281,
173(2)349,
178(1)129,
178(1)225,
178(1)275,
180(1)115,
181(2)379,
184(1)195,
185(1)47,
186(1)231,
192(1)3,
196(1)71,
201(1)263,
205(1)243,
206(1)1
- performance,
138(1)141,
140(1)73,
163(1)239,
164(1)107,
178(1)119,
181(1)45,
182(1)159,
182(1)203,
182(1)233,
185(2)259,
196(1)31,
196(1)241,
196(1)289,
196(1)319,
196(1)347,
215(1)263
- Prisco, Roberto, De,
143(1)175,
156(1)315
- processing,
140(2)319,
142(1)125,
144(1)125,
145(1)189,
146(1)145,
147(1)211,
149(1)151,
152(2)171,
153(1)65,
154(2)165,
155(2)321,
155(2)439,
158(1)1,
160(1)321,
161(1)205,
162(2)297,
163(1)117,
163(1)177,
163(1)303,
166(1)49,
170(1)1,
171(1)25,
171(1)179,
172(1)67,
173(1)49,
173(1)113,
173(1)151,
176(1)283,
178(1)129,
178(1)225,
178(1)275,
182(1)159,
183(1)33,
185(2)259,
186(1)1,
189(1)179,
190(2)167,
190(2)211,
190(2)279,
190(2)317,
190(2)363,
192(2)233,
193(1)149,
193(1)215,
194(1)248-1,
196(1)45,
199(1)105
- reconfiguration,
167(1)235,
197(1)171-1
- redundancy,
135(1)67,
142(2)141,
162(2)245,
177(2)425
- Semiconductor,
164(1)107,
172(1)1
- testing,
139(1)275,
142(2)257,
146(1)341,
150(1)161,
162(1)133,
164(1)107,
167(1)131,
167(1)193,
173(1)113,
173(1)209,
173(1)235,
174(1)231,
175(2)373,
176(1)1,
177(1)183,
177(2)407,
180(1)17,
180(1)217,
180(1)309,
182(1)159,
182(1)203,
183(2)215,
183(2)229,
183(2)253,
185(2)259,
186(1)135,
188(1)79,
192(1)55,
195(2)259,
196(1)241,
196(1)319,
196(1)347,
197(1)171-1,
201(1)85
- tolerance,
151(1)257,
165(2)483,
182(1)159,
188(1)79
- tolerant,
164(1)107,
182(1)159,
185(2)259,
196(1)319
- VLSI,
162(1)133,
197(1)57,
197(1)171-1,
203(1)31