Last update: Sun Mar 31 02:13:37 MDT 2019
@Article{Lee:2009:PBA, author = "Jaesung Lee and Hyuk-Jae Lee and Chanho Lee", title = "A Phase-Based Approach for On-Chip Bus Architecture Optimization", journal = j-COMP-J, volume = "52", number = "6", pages = "626--645", month = aug, year = "2009", CODEN = "CMPJA6", DOI = "https://doi.org/10.1093/comjnl/bxn059", ISSN = "0010-4620 (print), 1460-2067 (electronic)", ISSN-L = "0010-4620", bibdate = "Wed Apr 28 14:33:35 MDT 2010", bibsource = "http://comjnl.oxfordjournals.org/content/vol52/issue6/index.dtl; http://www.math.utah.edu/pub/tex/bib/compj2000.bib", URL = "http://comjnl.oxfordjournals.org/cgi/content/abstract/52/6/626; http://comjnl.oxfordjournals.org/cgi/reprint/52/6/626", acknowledgement = ack-nhfb, fjournal = "The Computer Journal", journal-URL = "http://comjnl.oxfordjournals.org/", }