Entry Payson:1991:HAB from dectechj.bib

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BibTeX entry

@Article{Payson:1991:HAB,
  author =       "Christopher J. Payson and Christopher J. Cianciolo and
                 Robert N. Crouse and Catherine F. Winsor",
  title =        "Hardware Accelerators for Bitonal Image Processing",
  journal =      j-DEC-TECH-J,
  volume =       "3",
  number =       "4",
  pages =        "9--25 (or 9--26??)",
  month =        "Fall",
  year =         "1991",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "/usr/local/src/bib/bibliography/Database/Graefe.bib;
                 http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v3n4/Hardware_Accelerators_for_Bito_01jul1992DTJ401P8.ps;
                 http://www.digital.com:80/info/DTJ401/DTJ401SC.TXT",
  abstract =     "Electronic imaging systems transfer views of
                 real-world scenes or objects into digital bits for
                 storage, manipulation, and viewing. In the area of
                 bitonal images, a large market exists in document
                 management, which consists of scanning volumes of
                 papers for storage and retrieval. However, high scan
                 densities produce huge volumes of data, requiring
                 compression and decompression techniques to preserve
                 system memory and improve system throughput. These
                 techniques, as well as general image processing
                 algorithms, are compute-intensive and require high
                 memory bandwidth. To address the memory issues, and to
                 achieve interactive image display performance, Digital
                 has designed a series of bitonal image hardware
                 accelerators. The intent was to create interactive
                 media view stations, with imaging applications
                 alongside other applications. In addition to achieving
                 memory, performance, and versatility goals, the
                 hardware accelerators have significantly improved final
                 image legibility.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5260B (Computer vision and picture processing); C5150
                 (Other circuits for digital computers); C6130D
                 (Document processing techniques)",
  classification = "C5150 (Other circuits for digital computers); C5260B
                 (Computer vision and picture processing); C6130D
                 (Document processing techniques)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "add-on boards; Bitonal image processing; bitonal image
                 processing; Bitonal images; bitonal images;
                 computerised picture processing; document; Document
                 management; image processing; Interactive image
                 display; interactive image display; management; Media
                 view stations; media view stations",
  thesaurus =    "Add-on boards; Computerised picture processing;
                 Document image processing",
  treatment =    "P Practical",
}

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