Entry Seavey:1992:NDP from dectechj.bib
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BibTeX entry
@Article{Seavey:1992:NDP,
author = "Marden H. Seavey and John V. Faricelli and Nadim A.
Khalil and G. Nanz and L. M. Richardson and C. O.
Schiebl and H. R. Soleimani and M. Thurner",
title = "Numerical device and process simulation tools in
transistor design",
journal = j-DEC-TECH-J,
volume = "4",
number = "2",
pages = "25--38",
month = "Spring",
year = "1992",
CODEN = "DTJOEL",
ISSN = "0898-901X",
bibdate = "Thu Mar 20 18:15:43 MST 1997",
bibsource = "http://www.math.utah.edu/pub/tex/bib/dectechj.bib;
UnCover library database",
abstract = "Numerical device and process simulation programs are
fundamental tools in the design and characterization of
silicon transistors. These tools employ numerical
mathematical methods to simulate the operation of the
elemental transistor structures that are the building
blocks of CMOS VLSI circuitry. When designing these
basic structures, CMOS process and device design teams
require efficient, high-performance simulators that use
accurate physical models. Digital has developed thermal
annealing, mobility, and avalanche models, and has
improved the numerical methods used in its process and
device simulation programs. Also, supporting software
was developed to help integrate the various simulation
tools.",
acknowledgement = ack-nhfb,
classcodes = "B1130B (Computer-aided circuit analysis and design);
B2570D (CMOS integrated circuits); C7410D (Electronic
engineering)",
classification = "B1130B (Computer-aided circuit analysis and design);
B2570D (CMOS integrated circuits); C7410D (Electronic
engineering)",
keywords = "Avalanche models; avalanche models; circuit CAD; CMOS
integrated circuits; CMOS VLSI; Device simulation
programs; device simulation programs; digital
simulation; mathematical methods; Mathematical methods;
Mobility; mobility; process simulation; Process
simulation; semiconductor device models; simulators;
Simulators; thermal annealing; Thermal annealing;
Transistor design; transistor design",
thesaurus = "Circuit CAD; CMOS integrated circuits; Digital
simulation; Semiconductor device models",
treatment = "P Practical",
}
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8(2)72,
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7(2)56
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2(4)90,
2(4)102,
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3(1)65,
3(1)70,
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3(2)19,
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4(2)114,
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1(2)48,
1(6)91,
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1(9)51,
2(1)16,
2(1)49,
2(2)52,
2(2)73,
2(2)89,
2(3)24,
2(3)44,
2(3)84,
2(4)13,
2(4)43,
2(4)102,
2(4)118,
3(1)33,
3(1)58,
3(1)79,
3(2)31,
3(3)1,
3(3)78,
4(1)68,
4(2)39,
4(2)51,
4(2)73,
4(2)100,
4(2)114,
4(3)82,
4(4)137,
4(4)181,
4(4)193,
5(1)70,
5(2)100,
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5(4)18,
5(4)36,
5(4)69,
6(2)49,
6(3)20,
6(3)44,
6(4)26,
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7(1)100,
7(1)136,
7(2)5,
7(4)20,
7(4)101,
8(1)46,
8(2)32,
8(2)72,
8(2)83,
8(2)96
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1(9)37,
1(9)78,
2(1)83,
2(4)25,
2(4)90,
3(2)10,
3(3)1,
3(3)78,
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5(1)34,
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2(2)36,
2(2)64,
3(2)10,
4(2)12,
4(2)51,
4(2)73,
4(2)83,
4(2)114,
4(3)47,
4(3)60,
4(3)73,
4(4)35,
7(1)100
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1(9)16,
1(9)44,
1(9)61,
2(1)16,
2(1)73,
2(2)27,
2(2)64,
2(2)73,
2(3)16,
2(3)24,
2(3)44,
2(3)64,
2(3)84,
2(4)43,
2(4)130,
3(1)45,
3(1)58,
3(1)79,
3(2)19,
3(3)36,
3(4)9,
3(4)55,
3(4)61,
4(1)31,
4(1)68,
4(2)39,
4(2)51,
4(2)73,
4(2)114,
4(3)24,
4(3)38,
4(3)47,
4(3)73,
4(3)82,
4(4)111,
4(4)153,
4(4)181,
4(4)193,
5(1)1,
5(1)21,
5(1)34,
5(1)70,
5(1)99,
5(1)117,
5(1)130,
5(2)65,
5(2)77,
5(3)63,
6(2)49,
6(2)62,
6(3)8,
6(3)29,
7(1)43,
7(1)77,
7(1)100,
7(1)136,
7(2)56,
7(3)24,
7(3)39,
7(3)50,
7(4)34,
7(4)89,
8(1)5,
8(1)32,
8(2)5,
8(2)46,
8(2)72,
8(2)117
- when,
3(1)45,
3(2)31,
4(1)31,
4(3)92,
5(2)77,
5(4)36,
6(2)62,
8(2)72