Entry Fite:1990:DSV from dectechj.bib

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BibTeX entry

@Article{Fite:1990:DSV,
  author =       "D. B. {Fite, Jr.} and T. Fossum and D. Manley",
  title =        "Design strategy for the {VAX 9000} system",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "4",
  pages =        "13--24",
  month =        "Fall",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "The VAX 9000 system is Digital's newest high-end
                 processor in the VAX family. This paper describes the
                 design strategy used to achieve high performance and
                 shows how RISC concepts were applied to a CISC
                 architecture. New opportunities for parallelism in VAX
                 program execution were found by breaking the VAX
                 instructions into simple tasks which could be pipelined
                 efficiently. By using independent, dedicated pipeline
                 stages, execution rates approach one instruction per
                 cycle.",
  acknowledgement = ack-nhfb,
  affiliation =  "Digital Equipment Corp., Maynard, MA, USA",
  classcodes =   "C5420 (Mainframes and minicomputers); C5440
                 (Multiprocessor systems and techniques); C5220
                 (Computer architecture)",
  classification = "C5220 (Computer architecture); C5420 (Mainframes and
                 minicomputers); C5440 (Multiprocessor systems and
                 techniques)",
  corpsource =   "Digital Equipment Corp., Maynard, MA, USA",
  keywords =     "architecture; CISC; CISC architecture; DEC computers;
                 Design strategy; design strategy; instruction set
                 computing; mainframes; parallel processing;
                 parallelism; Parallelism; reduced; RISC; VAX 9000
                 system",
  thesaurus =    "DEC computers; Mainframes; Parallel processing;
                 Reduced instruction set computing",
  treatment =    "P Practical",
}

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