Entry Weber:1990:COR from dectechj.bib

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BibTeX entry

@Article{Weber:1990:COR,
  author =       "Larry B. Weber",
  title =        "Compiler optimization in {RISC} systems",
  journal =      j-DEC-TECH-J,
  volume =       "2",
  number =       "2",
  pages =        "89--95",
  month =        "Spring",
  year =         "1990",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  abstract =     "Compiler optimization determines the level of RISC
                 system performance. The architecture design of
                 compilers from MIPS Computer Systems, Inc. combined
                 with support tools facilitates compiler optimization
                 and overall system throughput. The compiler design
                 takes advantage of small and high-speed cache memory to
                 enhance performance. The cord tool positions the
                 program in memory to ensure that the most frequently
                 used memory locations never compete for the same cache
                 locations. Portability is crucial to compiler
                 effectiveness. MIPS compilers implement many
                 industry-wide extensions to the standard languages to
                 make them compatible with other implementations.",
  acknowledgement = ack-nhfb,
  classcodes =   "C6150J (Operating systems); C5220 (Computer
                 architecture)",
  classification = "C5220 (Computer architecture); C6150J (Operating
                 systems)",
  keywords =     "cache memory; Cache memory; Compiler optimisation;
                 compiler optimisation; memory locations; Memory
                 locations; Performance; performance; program compilers;
                 reduced instruction set computing; RISC systems",
  thesaurus =    "Program compilers; Reduced instruction set computing",
  treatment =    "P Practical",
}

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