Entry McKinney:1994:DDF from dectechj.bib

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BibTeX entry

@Article{McKinney:1994:DDF,
  author =       "Dina L. McKinney and Masooma Bhaiwala and Kwong-Tak A.
                 Chui and Christopher L. Houghton and James R. Mullens
                 and Daniel L. Leibholz and Sanjay J. Patel and Delvan
                 A. Ramey and Mark B. Rosenbluth",
  title =        "{Digital}'s {DECchip} 21066: The First Cost-focused
                 {Alpha AXP} Chip",
  journal =      j-DEC-TECH-J,
  volume =       "6",
  number =       "1",
  pages =        "66--77",
  month =        "Winter",
  year =         "1994",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v6n1/Digitals_DECchip_21066_The_F_01jul1994DTJD05P8.ps;
                 http://www.digital.com:80/info/DTJD05/DTJD05SC.TXT",
  abstract =     "The DECchip 21066 microprocessor is the first Alpha
                 AXP microprocessor to target cost-focused system
                 applications and the second in a family of chips to
                 implement the Alpha AXP architecture. The chip is a
                 0.675-micrometer ($ \mu $ m), CMOS-based, superscalar,
                 superpipelined processor that uses dual instruction
                 issue. It incorporates a high level of system
                 integration to provide best-in-class system performance
                 for low-cost system applications. The DECchip 21066
                 microprocessor integrates on-chip, fully pipelined,
                 integer and floating-point processors, a high-bandwidth
                 memory controller, an industry-standard PCI I/O
                 controller, graphics-assisting hardware, internal
                 instruction and data caches, and an external cache
                 controller. Cost-saving packaging techniques and an
                 on-chip, analog phase-locked loop enable the chip to
                 meet the cost demands of personal computers and desktop
                 systems. This paper discusses the trade-offs and
                 results of the design, verification, and implementation
                 of the DECchip 21066 microprocessor.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); C5130
                 (Microprocessor chips)",
  classification = "B1265F (Microprocessors and microcomputers); C5130
                 (Microprocessor chips)",
  keywords =     "Alpha AXP chip; Alpha AXP microprocessor;
                 Cost-focused; cost-focused; DEC computers; DECchip
                 21066; Design; design; dual instruction; Dual
                 instruction issue; issue; microprocessor chips;
                 superpipelined; Superpipelined; Superscalar;
                 superscalar; Verification; verification",
  thesaurus =    "DEC computers; Microprocessor chips",
  treatment =    "P Practical",
}

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