Entry Anderson:1992:LVN from dectechj.bib

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BibTeX entry

@Article{Anderson:1992:LVN,
  author =       "Walker Anderson",
  title =        "Logical Verification of the {NVAX CPU} Chip Design",
  journal =      j-DEC-TECH-J,
  volume =       "4",
  number =       "3",
  pages =        "38--46",
  month =        "Summer",
  year =         "1992",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v4n3/Logical_Verification_of_the_NV_01jan1993DTJ703P8.ps;
                 http://www.digital.com:80/info/DTJ703/DTJ703SC.TXT",
  abstract =     "Digital's NVAX high-performance microprocessor has a
                 complex logical design. A rigorous simulation based
                 verification effort was undertaken to ensure that there
                 were no logical errors. At the core of the effort were
                 implementation-oriented, directed, pseudo random
                 exercisers. These exercisers were supplemented with
                 implementation-specific focused tests and existing VAX
                 architectural tests. Only 15 logical bugs, all
                 unobtrusive, were detected in the first pass design,
                 and the operating system booted with first-pass chips
                 in a prototype system.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265F (Microprocessors and microcomputers); B1265B
                 (Logic circuits); C5130 (Microprocessor chips); C5210
                 (Logic design methods)",
  classification = "B1265B (Logic circuits); B1265F (Microprocessors and
                 microcomputers); C5130 (Microprocessor chips); C5210
                 (Logic design methods)",
  keywords =     "logic CAD; logic testing; Logic verification; logic
                 verification; microprocessor chips; NVAX CPU chip
                 design; Operating system; operating system; Prototype
                 system; prototype system; rigorous; Rigorous
                 simulation-based verification effort; simulation-based
                 verification effort",
  thesaurus =    "Logic CAD; Logic testing; Microprocessor chips",
  treatment =    "P Practical",
}

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