Entry Kantrowitz:1995:FVM from dectechj.bib

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BibTeX entry

@Article{Kantrowitz:1995:FVM,
  author =       "Michael Kantrowitz and Lisa M. Noack",
  title =        "Functional Verification of a Multiple-issue,
                 Pipelined, Superscalar {Alpha} Processor --- the
                 {Alpha} 21164 {CPU} Chip",
  journal =      j-DEC-TECH-J,
  volume =       "7",
  number =       "1",
  pages =        "136--144",
  month =        "Winter",
  year =         "1995",
  CODEN =        "DTJOEL",
  ISSN =         "0898-901X",
  bibdate =      "Thu Mar 20 18:15:43 MST 1997",
  bibsource =    "http://www.math.utah.edu/pub/tex/bib/dectechj.bib",
  URL =          "ftp://ftp.digital.com/pub/Digital/info/DTJ/v7n1/Functional_Verification_of_a_M_01jul1995DTJH10P8.ps;
                 http://www.digital.com:80/info/DTJH10/DTJH10SC.TXT",
  abstract =     "Digital's Alpha 21164 processor is a complex
                 quad-issue, pipelined, superscalar implementation of
                 the Alpha architecture. Functional verification was
                 performed on the logic design and the PALcode
                 interface. The simulation-based verification effort
                 used implementation-directed, pseudorandom exercisers,
                 supplemented with implementation-specific,
                 hand-generated tests. Extensive coverage analysis was
                 performed to direct the verification effort. Only eight
                 logical bugs, all unobtrusive, were detected in the
                 first prototype design, and multiple operating systems
                 were booted with these chips in a prototype system. All
                 bugs were corrected before any 21164-based systems were
                 shipped to customers.",
  acknowledgement = ack-nhfb,
  classcodes =   "B1265B (Logic circuits); B1265F (Microprocessors and
                 microcomputers); C5210 (Logic design methods); C5130
                 (Microprocessor chips); C6110F (Formal methods)",
  classification = "B1265B (Logic circuits); B1265F (Microprocessors and
                 microcomputers); C5130 (Microprocessor chips); C5210
                 (Logic design methods); C6110F (Formal methods)",
  keywords =     "Alpha 21164 CPU chip; Alpha processor; design; formal
                 verification; logic; Logic design; logic design; logic
                 testing; microprocessor chips; PALcode interface;
                 Pseudorandom exercisers; pseudorandom exercisers;
                 Verification; verification",
  thesaurus =    "Formal verification; Logic design; Logic testing;
                 Microprocessor chips",
  treatment =    "P Practical",
}

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